^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2005 Simtec Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Ben Dooks <ben@simtec.co.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Simtec Generic I2C Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/i2c-algo-bit.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) struct simtec_i2c_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct resource *ioarea;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) void __iomem *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct i2c_adapter adap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) struct i2c_algo_bit_data bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define CMD_SET_SDA (1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define CMD_SET_SCL (1<<3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define STATE_SDA (1<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define STATE_SCL (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* i2c bit-bus functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static void simtec_i2c_setsda(void *pw, int state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct simtec_i2c_data *pd = pw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) writeb(CMD_SET_SDA | (state ? STATE_SDA : 0), pd->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static void simtec_i2c_setscl(void *pw, int state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct simtec_i2c_data *pd = pw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) writeb(CMD_SET_SCL | (state ? STATE_SCL : 0), pd->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static int simtec_i2c_getsda(void *pw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct simtec_i2c_data *pd = pw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) return readb(pd->reg) & STATE_SDA ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static int simtec_i2c_getscl(void *pw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct simtec_i2c_data *pd = pw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) return readb(pd->reg) & STATE_SCL ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /* device registration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static int simtec_i2c_probe(struct platform_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct simtec_i2c_data *pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) int size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) pd = kzalloc(sizeof(struct simtec_i2c_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if (pd == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) platform_set_drvdata(dev, pd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) res = platform_get_resource(dev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) if (res == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) dev_err(&dev->dev, "cannot find IO resource\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) ret = -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) size = resource_size(res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) pd->ioarea = request_mem_region(res->start, size, dev->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) if (pd->ioarea == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) dev_err(&dev->dev, "cannot request IO\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) ret = -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) pd->reg = ioremap(res->start, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if (pd->reg == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) dev_err(&dev->dev, "cannot map IO\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) ret = -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) goto err_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /* setup the private data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) pd->adap.owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) pd->adap.algo_data = &pd->bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) pd->adap.dev.parent = &dev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) strlcpy(pd->adap.name, "Simtec I2C", sizeof(pd->adap.name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) pd->bit.data = pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) pd->bit.setsda = simtec_i2c_setsda;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) pd->bit.setscl = simtec_i2c_setscl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) pd->bit.getsda = simtec_i2c_getsda;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) pd->bit.getscl = simtec_i2c_getscl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) pd->bit.timeout = HZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) pd->bit.udelay = 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) ret = i2c_bit_add_bus(&pd->adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) goto err_all;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) err_all:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) iounmap(pd->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) err_res:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) release_mem_region(pd->ioarea->start, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) kfree(pd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static int simtec_i2c_remove(struct platform_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct simtec_i2c_data *pd = platform_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) i2c_del_adapter(&pd->adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) iounmap(pd->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) release_mem_region(pd->ioarea->start, resource_size(pd->ioarea));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) kfree(pd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /* device driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static struct platform_driver simtec_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .name = "simtec-i2c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .probe = simtec_i2c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .remove = simtec_i2c_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) module_platform_driver(simtec_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) MODULE_DESCRIPTION("Simtec Generic I2C Bus driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) MODULE_ALIAS("platform:simtec-i2c");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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