^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) i2c Support for Apple SMU Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) Copyright (c) 2005 Benjamin Herrenschmidt, IBM Corp.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) <benh@kernel.crashing.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/prom.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/pmac_low_i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) MODULE_DESCRIPTION("I2C driver for Apple PowerMac");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * SMBUS-type transfer entrypoint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static s32 i2c_powermac_smbus_xfer( struct i2c_adapter* adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) u16 addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) unsigned short flags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) char read_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) u8 command,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) int size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) union i2c_smbus_data* data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct pmac_i2c_bus *bus = i2c_get_adapdata(adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) int rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) int read = (read_write == I2C_SMBUS_READ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) int addrdir = (addr << 1) | read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) int mode, subsize, len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) u32 subaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) u8 *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) u8 local[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) if (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) mode = pmac_i2c_mode_std;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) subsize = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) subaddr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) mode = read ? pmac_i2c_mode_combined : pmac_i2c_mode_stdsub;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) subsize = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) subaddr = command;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) switch (size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) case I2C_SMBUS_QUICK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) buf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) case I2C_SMBUS_BYTE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) case I2C_SMBUS_BYTE_DATA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) buf = &data->byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) case I2C_SMBUS_WORD_DATA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) if (!read) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) local[0] = data->word & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) local[1] = (data->word >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) buf = local;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) len = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /* Note that these are broken vs. the expected smbus API where
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * on reads, the length is actually returned from the function,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * but I think the current API makes no sense and I don't want
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * any driver that I haven't verified for correctness to go
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * anywhere near a pmac i2c bus anyway ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * I'm also not completely sure what kind of phases to do between
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * the actual command and the data (what I am _supposed_ to do that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * is). For now, I assume writes are a single stream and reads have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * a repeat start/addr phase (but not stop in between)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) case I2C_SMBUS_BLOCK_DATA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) buf = data->block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) len = data->block[0] + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) case I2C_SMBUS_I2C_BLOCK_DATA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) buf = &data->block[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) len = data->block[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) rc = pmac_i2c_open(bus, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) dev_err(&adap->dev, "Failed to open I2C, err %d\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) rc = pmac_i2c_setmode(bus, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) dev_err(&adap->dev, "Failed to set I2C mode %d, err %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) mode, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) goto bail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) rc = pmac_i2c_xfer(bus, addrdir, subsize, subaddr, buf, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (rc == -ENXIO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) dev_dbg(&adap->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) "I2C transfer at 0x%02x failed, size %d, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) "err %d\n", addrdir >> 1, size, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) dev_err(&adap->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) "I2C transfer at 0x%02x failed, size %d, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) "err %d\n", addrdir >> 1, size, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) goto bail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) if (size == I2C_SMBUS_WORD_DATA && read) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) data->word = ((u16)local[1]) << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) data->word |= local[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) bail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) pmac_i2c_close(bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * Generic i2c master transfer entrypoint. This driver only support single
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * messages (for "lame i2c" transfers). Anything else should use the smbus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) * entry point
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static int i2c_powermac_master_xfer( struct i2c_adapter *adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) struct i2c_msg *msgs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) int num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) struct pmac_i2c_bus *bus = i2c_get_adapdata(adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) int rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) int addrdir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) if (msgs->flags & I2C_M_TEN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) addrdir = i2c_8bit_addr_from_msg(msgs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) rc = pmac_i2c_open(bus, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) dev_err(&adap->dev, "Failed to open I2C, err %d\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) rc = pmac_i2c_setmode(bus, pmac_i2c_mode_std);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) dev_err(&adap->dev, "Failed to set I2C mode %d, err %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) pmac_i2c_mode_std, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) goto bail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) rc = pmac_i2c_xfer(bus, addrdir, 0, 0, msgs->buf, msgs->len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (rc < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) if (rc == -ENXIO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) dev_dbg(&adap->dev, "I2C %s 0x%02x failed, err %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) addrdir & 1 ? "read from" : "write to",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) addrdir >> 1, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) dev_err(&adap->dev, "I2C %s 0x%02x failed, err %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) addrdir & 1 ? "read from" : "write to",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) addrdir >> 1, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) bail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) pmac_i2c_close(bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) return rc < 0 ? rc : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static u32 i2c_powermac_func(struct i2c_adapter * adapter)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_I2C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) /* For now, we only handle smbus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static const struct i2c_algorithm i2c_powermac_algorithm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .smbus_xfer = i2c_powermac_smbus_xfer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) .master_xfer = i2c_powermac_master_xfer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .functionality = i2c_powermac_func,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static const struct i2c_adapter_quirks i2c_powermac_quirks = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .max_num_msgs = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static int i2c_powermac_remove(struct platform_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) struct i2c_adapter *adapter = platform_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) i2c_del_adapter(adapter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) memset(adapter, 0, sizeof(*adapter));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static u32 i2c_powermac_get_addr(struct i2c_adapter *adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) struct pmac_i2c_bus *bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) u32 prop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) /* First check for valid "reg" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) ret = of_property_read_u32(node, "reg", &prop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) if (ret == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) return (prop & 0xff) >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) /* Then check old-style "i2c-address" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) ret = of_property_read_u32(node, "i2c-address", &prop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) if (ret == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) return (prop & 0xff) >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) /* Now handle some devices with missing "reg" properties */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) if (of_node_name_eq(node, "cereal"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) return 0x60;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) else if (of_node_name_eq(node, "deq"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) return 0x34;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) dev_warn(&adap->dev, "No i2c address for %pOF\n", node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) return 0xffffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) static void i2c_powermac_create_one(struct i2c_adapter *adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) const char *type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) u32 addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) struct i2c_board_info info = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) struct i2c_client *newdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) strncpy(info.type, type, sizeof(info.type));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) info.addr = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) newdev = i2c_new_client_device(adap, &info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (IS_ERR(newdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) dev_err(&adap->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) "i2c-powermac: Failure to register missing %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static void i2c_powermac_add_missing(struct i2c_adapter *adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) struct pmac_i2c_bus *bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) bool found_onyx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) struct device_node *busnode = pmac_i2c_get_bus_node(bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) /* Check for the onyx audio codec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) #define ONYX_REG_CONTROL 67
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) if (of_device_is_compatible(busnode, "k2-i2c") && !found_onyx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) union i2c_smbus_data data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) rc = i2c_smbus_xfer(adap, 0x46, 0, I2C_SMBUS_READ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) ONYX_REG_CONTROL, I2C_SMBUS_BYTE_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) if (rc >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) i2c_powermac_create_one(adap, "MAC,pcm3052", 0x46);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) rc = i2c_smbus_xfer(adap, 0x47, 0, I2C_SMBUS_READ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) ONYX_REG_CONTROL, I2C_SMBUS_BYTE_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) if (rc >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) i2c_powermac_create_one(adap, "MAC,pcm3052", 0x47);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) static bool i2c_powermac_get_type(struct i2c_adapter *adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) struct device_node *node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) u32 addr, char *type, int type_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) char tmp[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) * Note: we do _NOT_ want the standard i2c drivers to match with any of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) * our powermac stuff unless they have been specifically modified to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) * handle it on a case by case basis. For example, for thermal control,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) * things like lm75 etc... shall match with their corresponding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) * windfarm drivers, _NOT_ the generic ones, so we force a prefix of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) * 'MAC', onto the modalias to make that happen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /* First try proper modalias */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) if (of_modalias_node(node, tmp, sizeof(tmp)) >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) snprintf(type, type_size, "MAC,%s", tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) /* Now look for known workarounds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) if (of_node_name_eq(node, "deq")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) /* Apple uses address 0x34 for TAS3001 and 0x35 for TAS3004 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) if (addr == 0x34) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) snprintf(type, type_size, "MAC,tas3001");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) } else if (addr == 0x35) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) snprintf(type, type_size, "MAC,tas3004");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) dev_err(&adap->dev, "i2c-powermac: modalias failure on %pOF\n", node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) static void i2c_powermac_register_devices(struct i2c_adapter *adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) struct pmac_i2c_bus *bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) struct i2c_client *newdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) struct device_node *node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) bool found_onyx = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) * In some cases we end up with the via-pmu node itself, in this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) * case we skip this function completely as the device-tree will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) * not contain anything useful.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) if (of_node_name_eq(adap->dev.of_node, "via-pmu"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) for_each_child_of_node(adap->dev.of_node, node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) struct i2c_board_info info = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) u32 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) /* Get address & channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) addr = i2c_powermac_get_addr(adap, bus, node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) if (addr == 0xffffffff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) /* Multibus setup, check channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) if (!pmac_i2c_match_adapter(node, adap))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) dev_dbg(&adap->dev, "i2c-powermac: register %pOF\n", node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) * Keep track of some device existence to handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) * workarounds later.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) if (of_device_is_compatible(node, "pcm3052"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) found_onyx = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) /* Make up a modalias */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) if (!i2c_powermac_get_type(adap, node, addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) info.type, sizeof(info.type))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) /* Fill out the rest of the info structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) info.addr = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) info.irq = irq_of_parse_and_map(node, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) info.of_node = of_node_get(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) newdev = i2c_new_client_device(adap, &info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) if (IS_ERR(newdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) dev_err(&adap->dev, "i2c-powermac: Failure to register"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) " %pOF\n", node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) of_node_put(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) /* We do not dispose of the interrupt mapping on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) * purpose. It's not necessary (interrupt cannot be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) * re-used) and somebody else might have grabbed it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) * via direct DT lookup so let's not bother
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) /* Additional workarounds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) i2c_powermac_add_missing(adap, bus, found_onyx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) static int i2c_powermac_probe(struct platform_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) struct pmac_i2c_bus *bus = dev_get_platdata(&dev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) struct device_node *parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) struct i2c_adapter *adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) if (bus == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) adapter = pmac_i2c_get_adapter(bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) /* Ok, now we need to make up a name for the interface that will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) * match what we used to do in the past, that is basically the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) * controller's parent device node for keywest. PMU didn't have a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) * naming convention and SMU has a different one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) switch(pmac_i2c_get_type(bus)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) case pmac_i2c_bus_keywest:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) parent = of_get_parent(pmac_i2c_get_controller(bus));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) if (parent == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) snprintf(adapter->name, sizeof(adapter->name), "%pOFn %d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) parent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) pmac_i2c_get_channel(bus));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) of_node_put(parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) case pmac_i2c_bus_pmu:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) snprintf(adapter->name, sizeof(adapter->name), "pmu %d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) pmac_i2c_get_channel(bus));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) case pmac_i2c_bus_smu:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) /* This is not what we used to do but I'm fixing drivers at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) * the same time as this change
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) snprintf(adapter->name, sizeof(adapter->name), "smu %d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) pmac_i2c_get_channel(bus));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) platform_set_drvdata(dev, adapter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) adapter->algo = &i2c_powermac_algorithm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) adapter->quirks = &i2c_powermac_quirks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) i2c_set_adapdata(adapter, bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) adapter->dev.parent = &dev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) /* Clear of_node to skip automatic registration of i2c child nodes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) adapter->dev.of_node = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) rc = i2c_add_adapter(adapter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) printk(KERN_ERR "i2c-powermac: Adapter %s registration "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) "failed\n", adapter->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) memset(adapter, 0, sizeof(*adapter));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) printk(KERN_INFO "PowerMac i2c bus %s registered\n", adapter->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) /* Use custom child registration due to Apple device-tree funkyness */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) adapter->dev.of_node = dev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) i2c_powermac_register_devices(adapter, bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) static struct platform_driver i2c_powermac_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) .probe = i2c_powermac_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) .remove = i2c_powermac_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) .name = "i2c-powermac",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) .bus = &platform_bus_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) module_platform_driver(i2c_powermac_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) MODULE_ALIAS("platform:i2c-powermac");