^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * i2c_pca_platform.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Platform driver for the PCA9564 I2C controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2008 Pengutronix
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/i2c-algo-pca.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/platform_data/i2c-pca-platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct i2c_pca_pf_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) void __iomem *reg_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) int irq; /* if 0, use polling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct gpio_desc *gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) wait_queue_head_t wait;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct i2c_adapter adap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct i2c_algo_pca_data algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) unsigned long io_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) unsigned long io_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* Read/Write functions for different register alignments */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static int i2c_pca_pf_readbyte8(void *pd, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct i2c_pca_pf_data *i2c = pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) return ioread8(i2c->reg_base + reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static int i2c_pca_pf_readbyte16(void *pd, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct i2c_pca_pf_data *i2c = pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) return ioread8(i2c->reg_base + reg * 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static int i2c_pca_pf_readbyte32(void *pd, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct i2c_pca_pf_data *i2c = pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) return ioread8(i2c->reg_base + reg * 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static void i2c_pca_pf_writebyte8(void *pd, int reg, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct i2c_pca_pf_data *i2c = pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) iowrite8(val, i2c->reg_base + reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static void i2c_pca_pf_writebyte16(void *pd, int reg, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct i2c_pca_pf_data *i2c = pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) iowrite8(val, i2c->reg_base + reg * 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static void i2c_pca_pf_writebyte32(void *pd, int reg, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct i2c_pca_pf_data *i2c = pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) iowrite8(val, i2c->reg_base + reg * 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static int i2c_pca_pf_waitforcompletion(void *pd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) struct i2c_pca_pf_data *i2c = pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) unsigned long timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) long ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) if (i2c->irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) ret = wait_event_timeout(i2c->wait,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) i2c->algo_data.read_byte(i2c, I2C_PCA_CON)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) & I2C_PCA_CON_SI, i2c->adap.timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /* Do polling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) timeout = jiffies + i2c->adap.timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) ret = time_before(jiffies, timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) if (i2c->algo_data.read_byte(i2c, I2C_PCA_CON)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) & I2C_PCA_CON_SI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) udelay(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) } while (ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return ret > 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static void i2c_pca_pf_dummyreset(void *pd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct i2c_pca_pf_data *i2c = pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) dev_warn(&i2c->adap.dev, "No reset-pin found. Chip may get stuck!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static void i2c_pca_pf_resetchip(void *pd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) struct i2c_pca_pf_data *i2c = pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) gpiod_set_value(i2c->gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) ndelay(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) gpiod_set_value(i2c->gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static irqreturn_t i2c_pca_pf_handler(int this_irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct i2c_pca_pf_data *i2c = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) if ((i2c->algo_data.read_byte(i2c, I2C_PCA_CON) & I2C_PCA_CON_SI) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) wake_up(&i2c->wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static int i2c_pca_pf_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) struct i2c_pca_pf_data *i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) struct i2c_pca9564_pf_platform_data *platform_data =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) dev_get_platdata(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) struct device_node *np = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) irq = platform_get_irq_optional(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) /* If irq is 0, we do polling. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) if (irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) irq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) i2c = devm_kzalloc(&pdev->dev, sizeof(*i2c), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (!i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) i2c->reg_base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) if (IS_ERR(i2c->reg_base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return PTR_ERR(i2c->reg_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) init_waitqueue_head(&i2c->wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) i2c->io_base = res->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) i2c->io_size = resource_size(res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) i2c->irq = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) i2c->adap.nr = pdev->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) i2c->adap.owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) snprintf(i2c->adap.name, sizeof(i2c->adap.name),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) "PCA9564/PCA9665 at 0x%08lx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) (unsigned long) res->start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) i2c->adap.algo_data = &i2c->algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) i2c->adap.dev.parent = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) i2c->adap.dev.of_node = np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) i2c->gpio = devm_gpiod_get_optional(&pdev->dev, "reset", GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) if (IS_ERR(i2c->gpio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) return PTR_ERR(i2c->gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) i2c->adap.timeout = HZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) ret = device_property_read_u32(&pdev->dev, "clock-frequency",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) &i2c->algo_data.i2c_clock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) i2c->algo_data.i2c_clock = 59000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) if (platform_data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) i2c->adap.timeout = platform_data->timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) i2c->algo_data.i2c_clock = platform_data->i2c_clock_speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) i2c->algo_data.data = i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) i2c->algo_data.wait_for_completion = i2c_pca_pf_waitforcompletion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) if (i2c->gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) i2c->algo_data.reset_chip = i2c_pca_pf_resetchip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) i2c->algo_data.reset_chip = i2c_pca_pf_dummyreset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) switch (res->flags & IORESOURCE_MEM_TYPE_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) case IORESOURCE_MEM_32BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) i2c->algo_data.write_byte = i2c_pca_pf_writebyte32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) i2c->algo_data.read_byte = i2c_pca_pf_readbyte32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) case IORESOURCE_MEM_16BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) i2c->algo_data.write_byte = i2c_pca_pf_writebyte16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) i2c->algo_data.read_byte = i2c_pca_pf_readbyte16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) case IORESOURCE_MEM_8BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) i2c->algo_data.write_byte = i2c_pca_pf_writebyte8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) i2c->algo_data.read_byte = i2c_pca_pf_readbyte8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) if (irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) ret = devm_request_irq(&pdev->dev, irq, i2c_pca_pf_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) IRQF_TRIGGER_FALLING, pdev->name, i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) ret = i2c_pca_add_numbered_bus(&i2c->adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) platform_set_drvdata(pdev, i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) dev_info(&pdev->dev, "registered.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) static int i2c_pca_pf_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) struct i2c_pca_pf_data *i2c = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) i2c_del_adapter(&i2c->adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static const struct of_device_id i2c_pca_of_match_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) { .compatible = "nxp,pca9564" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) { .compatible = "nxp,pca9665" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) MODULE_DEVICE_TABLE(of, i2c_pca_of_match_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static struct platform_driver i2c_pca_pf_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) .probe = i2c_pca_pf_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) .remove = i2c_pca_pf_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) .name = "i2c-pca-platform",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) .of_match_table = of_match_ptr(i2c_pca_of_match_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) module_platform_driver(i2c_pca_pf_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) MODULE_AUTHOR("Wolfram Sang <kernel@pengutronix.de>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) MODULE_DESCRIPTION("I2C-PCA9564/PCA9665 platform driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) MODULE_LICENSE("GPL");