^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * i2c-pca-isa.c driver for PCA9564 on ISA boards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2004 Arcom Control Systems
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2008 Pengutronix
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/moduleparam.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/wait.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/isa.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/i2c-algo-pca.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define DRIVER "i2c-pca-isa"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define IO_SIZE 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static unsigned long base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static int irq = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /* Data sheet recommends 59kHz for 100kHz operation due to variation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * in the actual clock rate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static int clock = 59000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static struct i2c_adapter pca_isa_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static wait_queue_head_t pca_wait;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static void pca_isa_writebyte(void *pd, int reg, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #ifdef DEBUG_IO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static char *names[] = { "T/O", "DAT", "ADR", "CON" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) printk(KERN_DEBUG "*** write %s at %#lx <= %#04x\n", names[reg],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) base+reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) outb(val, base+reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static int pca_isa_readbyte(void *pd, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) int res = inb(base+reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #ifdef DEBUG_IO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static char *names[] = { "STA", "DAT", "ADR", "CON" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) printk(KERN_DEBUG "*** read %s => %#04x\n", names[reg], res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static int pca_isa_waitforcompletion(void *pd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) unsigned long timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) long ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) if (irq > -1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) ret = wait_event_timeout(pca_wait,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) pca_isa_readbyte(pd, I2C_PCA_CON)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) & I2C_PCA_CON_SI, pca_isa_ops.timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /* Do polling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) timeout = jiffies + pca_isa_ops.timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) ret = time_before(jiffies, timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) if (pca_isa_readbyte(pd, I2C_PCA_CON)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) & I2C_PCA_CON_SI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) udelay(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) } while (ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) return ret > 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) static void pca_isa_resetchip(void *pd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /* apparently only an external reset will do it. not a lot can be done */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) printk(KERN_WARNING DRIVER ": Haven't figured out how to do a reset yet\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static irqreturn_t pca_handler(int this_irq, void *dev_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) wake_up(&pca_wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static struct i2c_algo_pca_data pca_isa_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /* .data intentionally left NULL, not needed with ISA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .write_byte = pca_isa_writebyte,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .read_byte = pca_isa_readbyte,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .wait_for_completion = pca_isa_waitforcompletion,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .reset_chip = pca_isa_resetchip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static struct i2c_adapter pca_isa_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .algo_data = &pca_isa_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .name = "PCA9564/PCA9665 ISA Adapter",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .timeout = HZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static int pca_isa_match(struct device *dev, unsigned int id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) int match = base != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (match) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) if (irq <= -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) dev_warn(dev, "Using polling mode (specify irq)\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) dev_err(dev, "Please specify I/O base\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return match;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static int pca_isa_probe(struct device *dev, unsigned int id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) init_waitqueue_head(&pca_wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) dev_info(dev, "i/o base %#08lx. irq %d\n", base, irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #ifdef CONFIG_PPC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) if (check_legacy_ioport(base)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) dev_err(dev, "I/O address %#08lx is not available\n", base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) if (!request_region(base, IO_SIZE, "i2c-pca-isa")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) dev_err(dev, "I/O address %#08lx is in use\n", base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) if (irq > -1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) if (request_irq(irq, pca_handler, 0, "i2c-pca-isa", &pca_isa_ops) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) dev_err(dev, "Request irq%d failed\n", irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) goto out_region;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) pca_isa_data.i2c_clock = clock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) if (i2c_pca_add_bus(&pca_isa_ops) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) dev_err(dev, "Failed to add i2c bus\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) goto out_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) out_irq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) if (irq > -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) free_irq(irq, &pca_isa_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) out_region:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) release_region(base, IO_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static int pca_isa_remove(struct device *dev, unsigned int id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) i2c_del_adapter(&pca_isa_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if (irq > -1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) disable_irq(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) free_irq(irq, &pca_isa_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) release_region(base, IO_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) static struct isa_driver pca_isa_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .match = pca_isa_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .probe = pca_isa_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) .remove = pca_isa_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) .name = DRIVER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) MODULE_DESCRIPTION("ISA base PCA9564/PCA9665 driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) module_param_hw(base, ulong, ioport, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) MODULE_PARM_DESC(base, "I/O base address");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) module_param_hw(irq, int, irq, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) MODULE_PARM_DESC(irq, "IRQ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) module_param(clock, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) MODULE_PARM_DESC(clock, "Clock rate in hertz.\n\t\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) "For PCA9564: 330000,288000,217000,146000,"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) "88000,59000,44000,36000\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) "\t\tFor PCA9665:\tStandard: 60300 - 100099\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) "\t\t\t\tFast: 100100 - 400099\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) "\t\t\t\tFast+: 400100 - 10000099\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) "\t\t\t\tTurbo: Up to 1265800");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) module_isa_driver(pca_isa_driver, 1);