Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * I2C bus driver for Kontron COM modules
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (c) 2010-2013 Kontron Europe GmbH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Author: Michael Brunner <michael.brunner@kontron.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * The driver is based on the i2c-ocores driver by Peter Korsgaard.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/mfd/kempld.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #define KEMPLD_I2C_PRELOW	0x0b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define KEMPLD_I2C_PREHIGH	0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define KEMPLD_I2C_DATA		0x0e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define KEMPLD_I2C_CTRL		0x0d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define I2C_CTRL_IEN		0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define I2C_CTRL_EN		0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define KEMPLD_I2C_STAT		0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define I2C_STAT_IF		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define I2C_STAT_TIP		0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define I2C_STAT_ARBLOST	0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define I2C_STAT_BUSY		0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define I2C_STAT_NACK		0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define KEMPLD_I2C_CMD		0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define I2C_CMD_START		0x91
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define I2C_CMD_STOP		0x41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define I2C_CMD_READ		0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define I2C_CMD_WRITE		0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define I2C_CMD_READ_ACK	0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define I2C_CMD_READ_NACK	0x29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define I2C_CMD_IACK		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define KEMPLD_I2C_FREQ_MAX	2700	/* 2.7 mHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define KEMPLD_I2C_FREQ_STD	100	/* 100 kHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	STATE_DONE = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	STATE_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	STATE_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	STATE_ADDR10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	STATE_START,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	STATE_WRITE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	STATE_READ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	STATE_ERROR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) struct kempld_i2c_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	struct device			*dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	struct kempld_device_data	*pld;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	struct i2c_adapter		adap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	struct i2c_msg			*msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	int				pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	int				nmsgs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	int				state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	bool				was_active;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) static unsigned int bus_frequency = KEMPLD_I2C_FREQ_STD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) module_param(bus_frequency, uint, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) MODULE_PARM_DESC(bus_frequency, "Set I2C bus frequency in kHz (default="
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 				__MODULE_STRING(KEMPLD_I2C_FREQ_STD)")");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) static int i2c_bus = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) module_param(i2c_bus, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) MODULE_PARM_DESC(i2c_bus, "Set I2C bus number (default=-1 for dynamic assignment)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) static bool i2c_gpio_mux;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) module_param(i2c_gpio_mux, bool, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) MODULE_PARM_DESC(i2c_gpio_mux, "Enable I2C port on GPIO out (default=false)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80)  * kempld_get_mutex must be called prior to calling this function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) static int kempld_i2c_process(struct kempld_i2c_data *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	struct kempld_device_data *pld = i2c->pld;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	u8 stat = kempld_read8(pld, KEMPLD_I2C_STAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	struct i2c_msg *msg = i2c->msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	u8 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	/* Ready? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	if (stat & I2C_STAT_TIP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	if (i2c->state == STATE_DONE || i2c->state == STATE_ERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		/* Stop has been sent */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		kempld_write8(pld, KEMPLD_I2C_CMD, I2C_CMD_IACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		if (i2c->state == STATE_ERROR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 			return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	/* Error? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	if (stat & I2C_STAT_ARBLOST) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		i2c->state = STATE_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		kempld_write8(pld, KEMPLD_I2C_CMD, I2C_CMD_STOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		return -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	if (i2c->state == STATE_INIT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		if (stat & I2C_STAT_BUSY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 			return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		i2c->state = STATE_ADDR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	if (i2c->state == STATE_ADDR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		/* 10 bit address? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		if (i2c->msg->flags & I2C_M_TEN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 			addr = 0xf0 | ((i2c->msg->addr >> 7) & 0x6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 			/* Set read bit if necessary */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 			addr |= (i2c->msg->flags & I2C_M_RD) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 			i2c->state = STATE_ADDR10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 			addr = i2c_8bit_addr_from_msg(i2c->msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 			i2c->state = STATE_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		kempld_write8(pld, KEMPLD_I2C_DATA, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 		kempld_write8(pld, KEMPLD_I2C_CMD, I2C_CMD_START);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	/* Second part of 10 bit addressing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	if (i2c->state == STATE_ADDR10) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		kempld_write8(pld, KEMPLD_I2C_DATA, i2c->msg->addr & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		kempld_write8(pld, KEMPLD_I2C_CMD, I2C_CMD_WRITE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		i2c->state = STATE_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	if (i2c->state == STATE_START || i2c->state == STATE_WRITE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		i2c->state = (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		if (stat & I2C_STAT_NACK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 			i2c->state = STATE_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 			kempld_write8(pld, KEMPLD_I2C_CMD, I2C_CMD_STOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 			return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		msg->buf[i2c->pos++] = kempld_read8(pld, KEMPLD_I2C_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	if (i2c->pos >= msg->len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		i2c->nmsgs--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		i2c->msg++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		i2c->pos = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		msg = i2c->msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		if (i2c->nmsgs) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 			if (!(msg->flags & I2C_M_NOSTART)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 				i2c->state = STATE_ADDR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 				return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 			} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 				i2c->state = (msg->flags & I2C_M_RD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 					? STATE_READ : STATE_WRITE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 			i2c->state = STATE_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 			kempld_write8(pld, KEMPLD_I2C_CMD, I2C_CMD_STOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	if (i2c->state == STATE_READ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		kempld_write8(pld, KEMPLD_I2C_CMD, i2c->pos == (msg->len - 1) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 			      I2C_CMD_READ_NACK : I2C_CMD_READ_ACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		kempld_write8(pld, KEMPLD_I2C_DATA, msg->buf[i2c->pos++]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		kempld_write8(pld, KEMPLD_I2C_CMD, I2C_CMD_WRITE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static int kempld_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 				int num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	struct kempld_i2c_data *i2c = i2c_get_adapdata(adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	struct kempld_device_data *pld = i2c->pld;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	unsigned long timeout = jiffies + HZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	i2c->msg = msgs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	i2c->pos = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	i2c->nmsgs = num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	i2c->state = STATE_INIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	/* Handle the transfer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	while (time_before(jiffies, timeout)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		kempld_get_mutex(pld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		ret = kempld_i2c_process(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		kempld_release_mutex(pld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		if (i2c->state == STATE_DONE || i2c->state == STATE_ERROR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 			return (i2c->state == STATE_DONE) ? num : ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		if (ret == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 			timeout = jiffies + HZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		usleep_range(5, 15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	i2c->state = STATE_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)  * kempld_get_mutex must be called prior to calling this function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static void kempld_i2c_device_init(struct kempld_i2c_data *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	struct kempld_device_data *pld = i2c->pld;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	u16 prescale_corr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	long prescale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	u8 ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	u8 stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	u8 cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	/* Make sure the device is disabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	ctrl = kempld_read8(pld, KEMPLD_I2C_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	ctrl &= ~(I2C_CTRL_EN | I2C_CTRL_IEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	kempld_write8(pld, KEMPLD_I2C_CTRL, ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	if (bus_frequency > KEMPLD_I2C_FREQ_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		bus_frequency = KEMPLD_I2C_FREQ_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	if (pld->info.spec_major == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		prescale = pld->pld_clock / (bus_frequency * 5) - 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		prescale = pld->pld_clock / (bus_frequency * 4) - 3000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	if (prescale < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 		prescale = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	/* Round to the best matching value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	prescale_corr = prescale / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	if (prescale % 1000 >= 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		prescale_corr++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	kempld_write8(pld, KEMPLD_I2C_PRELOW, prescale_corr & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	kempld_write8(pld, KEMPLD_I2C_PREHIGH, prescale_corr >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	/* Activate I2C bus output on GPIO pins */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	cfg = kempld_read8(pld, KEMPLD_CFG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	if (i2c_gpio_mux)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 		cfg |= KEMPLD_CFG_GPIO_I2C_MUX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		cfg &= ~KEMPLD_CFG_GPIO_I2C_MUX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	kempld_write8(pld, KEMPLD_CFG, cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	/* Enable the device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	kempld_write8(pld, KEMPLD_I2C_CMD, I2C_CMD_IACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	ctrl |= I2C_CTRL_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	kempld_write8(pld, KEMPLD_I2C_CTRL, ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	stat = kempld_read8(pld, KEMPLD_I2C_STAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	if (stat & I2C_STAT_BUSY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		kempld_write8(pld, KEMPLD_I2C_CMD, I2C_CMD_STOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) static u32 kempld_i2c_func(struct i2c_adapter *adap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	return I2C_FUNC_I2C | I2C_FUNC_10BIT_ADDR | I2C_FUNC_SMBUS_EMUL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) static const struct i2c_algorithm kempld_i2c_algorithm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	.master_xfer	= kempld_i2c_xfer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	.functionality	= kempld_i2c_func,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) static const struct i2c_adapter kempld_i2c_adapter = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	.owner		= THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	.name		= "i2c-kempld",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	.class		= I2C_CLASS_HWMON | I2C_CLASS_SPD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	.algo		= &kempld_i2c_algorithm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) static int kempld_i2c_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	struct kempld_device_data *pld = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	struct kempld_i2c_data *i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	u8 ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	i2c = devm_kzalloc(&pdev->dev, sizeof(*i2c), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	if (!i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	i2c->pld = pld;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	i2c->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	i2c->adap = kempld_i2c_adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	i2c->adap.dev.parent = i2c->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	i2c_set_adapdata(&i2c->adap, i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	platform_set_drvdata(pdev, i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	kempld_get_mutex(pld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	ctrl = kempld_read8(pld, KEMPLD_I2C_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	if (ctrl & I2C_CTRL_EN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 		i2c->was_active = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	kempld_i2c_device_init(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	kempld_release_mutex(pld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	/* Add I2C adapter to I2C tree */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	if (i2c_bus >= -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 		i2c->adap.nr = i2c_bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	ret = i2c_add_numbered_adapter(&i2c->adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	dev_info(i2c->dev, "I2C bus initialized at %dkHz\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 		 bus_frequency);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) static int kempld_i2c_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	struct kempld_i2c_data *i2c = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	struct kempld_device_data *pld = i2c->pld;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	u8 ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	kempld_get_mutex(pld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	 * Disable I2C logic if it was not activated before the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	 * driver loaded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	if (!i2c->was_active) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 		ctrl = kempld_read8(pld, KEMPLD_I2C_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 		ctrl &= ~I2C_CTRL_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 		kempld_write8(pld, KEMPLD_I2C_CTRL, ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	kempld_release_mutex(pld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	i2c_del_adapter(&i2c->adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static int kempld_i2c_suspend(struct platform_device *pdev, pm_message_t state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	struct kempld_i2c_data *i2c = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	struct kempld_device_data *pld = i2c->pld;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	u8 ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	kempld_get_mutex(pld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	ctrl = kempld_read8(pld, KEMPLD_I2C_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	ctrl &= ~I2C_CTRL_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	kempld_write8(pld, KEMPLD_I2C_CTRL, ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	kempld_release_mutex(pld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) static int kempld_i2c_resume(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	struct kempld_i2c_data *i2c = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	struct kempld_device_data *pld = i2c->pld;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	kempld_get_mutex(pld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	kempld_i2c_device_init(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	kempld_release_mutex(pld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) #define kempld_i2c_suspend	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) #define kempld_i2c_resume	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) static struct platform_driver kempld_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 		.name = "kempld-i2c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	.probe		= kempld_i2c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	.remove		= kempld_i2c_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	.suspend	= kempld_i2c_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	.resume		= kempld_i2c_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) module_platform_driver(kempld_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) MODULE_DESCRIPTION("KEM PLD I2C Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) MODULE_AUTHOR("Michael Brunner <michael.brunner@kontron.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) MODULE_ALIAS("platform:kempld_i2c");