^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* ------------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) /* i2c-elektor.c i2c-hw access for PCF8584 style isa bus adaptes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) /* ------------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) /* Copyright (C) 1995-97 Simon G. Vogl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) 1998-99 Hans Berglund
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) /* ------------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) /* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and even
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) Frodo Looijaard <frodol@dds.nl> */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /* Partially rewriten by Oleg I. Vdovikin for mmapped support of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) for Alpha Processor Inc. UP-2000(+) boards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/wait.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/isa.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/i2c-algo-pcf.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include "../algos/i2c-algo-pcf.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define DEFAULT_BASE 0x330
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static int base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static u8 __iomem *base_iomem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static int clock = 0x1c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static int own = 0x55;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static int mmapped;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /* vdovikin: removed static struct i2c_pcf_isa gpi; code -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) this module in real supports only one device, due to missing arguments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) in some functions, called from the algo-pcf module. Sometimes it's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) need to be rewriten - but for now just remove this for simpler reading */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static wait_queue_head_t pcf_wait;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static int pcf_pending;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static struct i2c_adapter pcf_isa_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /* ----- local functions ---------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static void pcf_isa_setbyte(void *data, int ctl, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) u8 __iomem *address = ctl ? (base_iomem + 1) : base_iomem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* enable irq if any specified for serial operation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) if (ctl && irq && (val & I2C_PCF_ESO)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) val |= I2C_PCF_ENI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) pr_debug("%s: Write %p 0x%02X\n", pcf_isa_ops.name, address, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) iowrite8(val, address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #ifdef __alpha__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /* API UP2000 needs some hardware fudging to make the write stick */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) iowrite8(val, address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static int pcf_isa_getbyte(void *data, int ctl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) u8 __iomem *address = ctl ? (base_iomem + 1) : base_iomem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) int val = ioread8(address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) pr_debug("%s: Read %p 0x%02X\n", pcf_isa_ops.name, address, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return (val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static int pcf_isa_getown(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return (own);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static int pcf_isa_getclock(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return (clock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static void pcf_isa_waitforpin(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) DEFINE_WAIT(wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) int timeout = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) if (irq > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) spin_lock_irqsave(&lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) if (pcf_pending == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) spin_unlock_irqrestore(&lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) prepare_to_wait(&pcf_wait, &wait, TASK_INTERRUPTIBLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if (schedule_timeout(timeout*HZ)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) spin_lock_irqsave(&lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) if (pcf_pending == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) pcf_pending = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) spin_unlock_irqrestore(&lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) finish_wait(&pcf_wait, &wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) pcf_pending = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) spin_unlock_irqrestore(&lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) udelay(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static irqreturn_t pcf_isa_handler(int this_irq, void *dev_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) spin_lock(&lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) pcf_pending = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) spin_unlock(&lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) wake_up_interruptible(&pcf_wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static int pcf_isa_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) spin_lock_init(&lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) if (!mmapped) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) if (!request_region(base, 2, pcf_isa_ops.name)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) printk(KERN_ERR "%s: requested I/O region (%#x:2) is "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) "in use\n", pcf_isa_ops.name, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) base_iomem = ioport_map(base, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) if (!base_iomem) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) printk(KERN_ERR "%s: remap of I/O region %#x failed\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) pcf_isa_ops.name, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) release_region(base, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (!request_mem_region(base, 2, pcf_isa_ops.name)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) printk(KERN_ERR "%s: requested memory region (%#x:2) "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) "is in use\n", pcf_isa_ops.name, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) base_iomem = ioremap(base, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) if (base_iomem == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) printk(KERN_ERR "%s: remap of memory region %#x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) "failed\n", pcf_isa_ops.name, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) release_mem_region(base, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) pr_debug("%s: registers %#x remapped to %p\n", pcf_isa_ops.name, base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) base_iomem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) if (irq > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) if (request_irq(irq, pcf_isa_handler, 0, pcf_isa_ops.name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) NULL) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) printk(KERN_ERR "%s: Request irq%d failed\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) pcf_isa_ops.name, irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) irq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) enable_irq(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) /* ------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) * Encapsulate the above functions in the correct operations structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) * This is only done when more than one hardware adapter is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static struct i2c_algo_pcf_data pcf_isa_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) .setpcf = pcf_isa_setbyte,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .getpcf = pcf_isa_getbyte,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .getown = pcf_isa_getown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) .getclock = pcf_isa_getclock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .waitforpin = pcf_isa_waitforpin,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static struct i2c_adapter pcf_isa_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .algo_data = &pcf_isa_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .name = "i2c-elektor",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static int elektor_match(struct device *dev, unsigned int id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #ifdef __alpha__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) /* check to see we have memory mapped PCF8584 connected to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) Cypress cy82c693 PCI-ISA bridge as on UP2000 board */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) if (base == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) struct pci_dev *cy693_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) cy693_dev = pci_get_device(PCI_VENDOR_ID_CONTAQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) PCI_DEVICE_ID_CONTAQ_82C693, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) if (cy693_dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) unsigned char config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) /* yeap, we've found cypress, let's check config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) if (!pci_read_config_byte(cy693_dev, 0x47, &config)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) dev_dbg(dev, "found cy82c693, config "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) "register 0x47 = 0x%02x\n", config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) /* UP2000 board has this register set to 0xe1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) but the most significant bit as seems can be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) reset during the proper initialisation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) sequence if guys from API decides to do that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) (so, we can even enable Tsunami Pchip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) window for the upper 1 Gb) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) /* so just check for ROMCS at 0xe0000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) ROMCS enabled for writes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) and external XD Bus buffer in use. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) if ((config & 0x7f) == 0x61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) /* seems to be UP2000 like board */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) base = 0xe0000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) mmapped = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) /* UP2000 drives ISA with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 8.25 MHz (PCI/4) clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) (this can be read from cypress) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) clock = I2C_PCF_CLK | I2C_PCF_TRNS90;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) dev_info(dev, "found API UP2000 like "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) "board, will probe PCF8584 "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) "later\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) pci_dev_put(cy693_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) /* sanity checks for mmapped I/O */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (mmapped && base < 0xc8000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) dev_err(dev, "incorrect base address (%#x) specified "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) "for mmapped I/O\n", base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) if (base == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) base = DEFAULT_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) static int elektor_probe(struct device *dev, unsigned int id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) init_waitqueue_head(&pcf_wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) if (pcf_isa_init())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) pcf_isa_ops.dev.parent = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) if (i2c_pcf_add_bus(&pcf_isa_ops) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) dev_info(dev, "found device at %#x\n", base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) if (irq > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) disable_irq(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) free_irq(irq, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) if (!mmapped) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) ioport_unmap(base_iomem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) release_region(base, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) iounmap(base_iomem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) release_mem_region(base, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static int elektor_remove(struct device *dev, unsigned int id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) i2c_del_adapter(&pcf_isa_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) if (irq > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) disable_irq(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) free_irq(irq, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) if (!mmapped) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) ioport_unmap(base_iomem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) release_region(base, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) iounmap(base_iomem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) release_mem_region(base, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) static struct isa_driver i2c_elektor_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) .match = elektor_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) .probe = elektor_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) .remove = elektor_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) .name = "i2c-elektor",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) MODULE_AUTHOR("Hans Berglund <hb@spacetec.no>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) MODULE_DESCRIPTION("I2C-Bus adapter routines for PCF8584 ISA bus adapter");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) module_param_hw(base, int, ioport_or_iomem, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) module_param_hw(irq, int, irq, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) module_param(clock, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) module_param(own, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) module_param_hw(mmapped, int, other, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) module_isa_driver(i2c_elektor_driver, 1);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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