Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * AMD MP2 platform driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Setup the I2C adapters enumerated in the ACPI namespace.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * MP2 controllers have 2 separate busses, up to 2 I2C adapters may be listed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Authors: Nehal Bakulchandra Shah <Nehal-bakulchandra.shah@amd.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *          Elie Morisse <syniurge@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include "i2c-amd-mp2.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define AMD_MP2_I2C_MAX_RW_LENGTH ((1 << 12) - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define AMD_I2C_TIMEOUT (msecs_to_jiffies(250))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)  * struct amd_i2c_dev - MP2 bus/i2c adapter context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  * @common: shared context with the MP2 PCI driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  * @pdev: platform driver node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  * @adap: i2c adapter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)  * @cmd_complete: xfer completion object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) struct amd_i2c_dev {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	struct amd_i2c_common common;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	struct platform_device *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	struct i2c_adapter adap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	struct completion cmd_complete;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define amd_i2c_dev_common(__common) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	container_of(__common, struct amd_i2c_dev, common)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) static int i2c_amd_dma_map(struct amd_i2c_common *i2c_common)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	struct device *dev_pci = &i2c_common->mp2_dev->pci_dev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	struct amd_i2c_dev *i2c_dev = amd_i2c_dev_common(i2c_common);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	enum dma_data_direction dma_direction =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 			i2c_common->msg->flags & I2C_M_RD ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 			DMA_FROM_DEVICE : DMA_TO_DEVICE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	i2c_common->dma_buf = i2c_get_dma_safe_msg_buf(i2c_common->msg, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	i2c_common->dma_addr = dma_map_single(dev_pci, i2c_common->dma_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 					      i2c_common->msg->len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 					      dma_direction);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	if (unlikely(dma_mapping_error(dev_pci, i2c_common->dma_addr))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		dev_err(&i2c_dev->pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 			"Error while mapping dma buffer %p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 			i2c_common->dma_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) static void i2c_amd_dma_unmap(struct amd_i2c_common *i2c_common)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	struct device *dev_pci = &i2c_common->mp2_dev->pci_dev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	enum dma_data_direction dma_direction =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 			i2c_common->msg->flags & I2C_M_RD ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 			DMA_FROM_DEVICE : DMA_TO_DEVICE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	dma_unmap_single(dev_pci, i2c_common->dma_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 			 i2c_common->msg->len, dma_direction);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	i2c_put_dma_safe_msg_buf(i2c_common->dma_buf, i2c_common->msg, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) static void i2c_amd_start_cmd(struct amd_i2c_dev *i2c_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	struct amd_i2c_common *i2c_common = &i2c_dev->common;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	reinit_completion(&i2c_dev->cmd_complete);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	i2c_common->cmd_success = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) static void i2c_amd_cmd_completion(struct amd_i2c_common *i2c_common)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	struct amd_i2c_dev *i2c_dev = amd_i2c_dev_common(i2c_common);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	union i2c_event *event = &i2c_common->eventval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	if (event->r.status == i2c_readcomplete_event)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		dev_dbg(&i2c_dev->pdev->dev, "%s readdata:%*ph\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 			__func__, event->r.length,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 			i2c_common->msg->buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	complete(&i2c_dev->cmd_complete);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) static int i2c_amd_check_cmd_completion(struct amd_i2c_dev *i2c_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	struct amd_i2c_common *i2c_common = &i2c_dev->common;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	unsigned long timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	timeout = wait_for_completion_timeout(&i2c_dev->cmd_complete,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 					      i2c_dev->adap.timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	if ((i2c_common->reqcmd == i2c_read ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	     i2c_common->reqcmd == i2c_write) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	    i2c_common->msg->len > 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		i2c_amd_dma_unmap(i2c_common);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	if (timeout == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		amd_mp2_rw_timeout(i2c_common);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	amd_mp2_process_event(i2c_common);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	if (!i2c_common->cmd_success)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static int i2c_amd_enable_set(struct amd_i2c_dev *i2c_dev, bool enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	struct amd_i2c_common *i2c_common = &i2c_dev->common;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	i2c_amd_start_cmd(i2c_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	amd_mp2_bus_enable_set(i2c_common, enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	return i2c_amd_check_cmd_completion(i2c_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static int i2c_amd_xfer_msg(struct amd_i2c_dev *i2c_dev, struct i2c_msg *pmsg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	struct amd_i2c_common *i2c_common = &i2c_dev->common;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	i2c_amd_start_cmd(i2c_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	i2c_common->msg = pmsg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	if (pmsg->len > 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		if (i2c_amd_dma_map(i2c_common))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 			return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	if (pmsg->flags & I2C_M_RD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		amd_mp2_rw(i2c_common, i2c_read);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		amd_mp2_rw(i2c_common, i2c_write);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	return i2c_amd_check_cmd_completion(i2c_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static int i2c_amd_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	struct amd_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	struct i2c_msg *pmsg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	/* the adapter might have been deleted while waiting for the bus lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	if (unlikely(!i2c_dev->common.mp2_dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	amd_mp2_pm_runtime_get(i2c_dev->common.mp2_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	for (i = 0; i < num; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		pmsg = &msgs[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		err = i2c_amd_xfer_msg(i2c_dev, pmsg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	amd_mp2_pm_runtime_put(i2c_dev->common.mp2_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	return err ? err : num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) static u32 i2c_amd_func(struct i2c_adapter *a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static const struct i2c_algorithm i2c_amd_algorithm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	.master_xfer = i2c_amd_xfer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	.functionality = i2c_amd_func,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static int i2c_amd_suspend(struct amd_i2c_common *i2c_common)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	struct amd_i2c_dev *i2c_dev = amd_i2c_dev_common(i2c_common);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	i2c_amd_enable_set(i2c_dev, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static int i2c_amd_resume(struct amd_i2c_common *i2c_common)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	struct amd_i2c_dev *i2c_dev = amd_i2c_dev_common(i2c_common);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	return i2c_amd_enable_set(i2c_dev, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static const u32 supported_speeds[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	I2C_MAX_HIGH_SPEED_MODE_FREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	I2C_MAX_TURBO_MODE_FREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	I2C_MAX_FAST_MODE_PLUS_FREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	I2C_MAX_FAST_MODE_FREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	I2C_MAX_STANDARD_MODE_FREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) static enum speed_enum i2c_amd_get_bus_speed(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	u32 acpi_speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	acpi_speed = i2c_acpi_find_bus_speed(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	/* round down to the lowest standard speed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	for (i = 0; i < ARRAY_SIZE(supported_speeds); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		if (acpi_speed >= supported_speeds[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	acpi_speed = i < ARRAY_SIZE(supported_speeds) ? supported_speeds[i] : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	switch (acpi_speed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	case I2C_MAX_STANDARD_MODE_FREQ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		return speed100k;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	case I2C_MAX_FAST_MODE_FREQ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		return speed400k;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	case I2C_MAX_FAST_MODE_PLUS_FREQ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		return speed1000k;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	case I2C_MAX_TURBO_MODE_FREQ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		return speed1400k;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	case I2C_MAX_HIGH_SPEED_MODE_FREQ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		return speed3400k;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		return speed400k;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static const struct i2c_adapter_quirks amd_i2c_dev_quirks = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	.max_read_len = AMD_MP2_I2C_MAX_RW_LENGTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	.max_write_len = AMD_MP2_I2C_MAX_RW_LENGTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static int i2c_amd_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	struct amd_i2c_dev *i2c_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	acpi_handle handle = ACPI_HANDLE(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	struct acpi_device *adev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	struct amd_mp2_dev *mp2_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	const char *uid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	if (acpi_bus_get_device(handle, &adev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	/* The ACPI namespace doesn't contain information about which MP2 PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	 * device an AMDI0011 ACPI device is related to, so assume that there's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	 * only one MP2 PCI device per system.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	mp2_dev = amd_mp2_find_device();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	if (!mp2_dev || !mp2_dev->probed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		/* The MP2 PCI device should get probed later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		return -EPROBE_DEFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	if (!i2c_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	i2c_dev->common.mp2_dev = mp2_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	i2c_dev->pdev = pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	platform_set_drvdata(pdev, i2c_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	i2c_dev->common.cmd_completion = &i2c_amd_cmd_completion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	i2c_dev->common.suspend = &i2c_amd_suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	i2c_dev->common.resume = &i2c_amd_resume;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	uid = adev->pnp.unique_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	if (!uid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 		dev_err(&pdev->dev, "missing UID/bus id!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	} else if (strcmp(uid, "0") == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		i2c_dev->common.bus_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	} else if (strcmp(uid, "1") == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 		i2c_dev->common.bus_id = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 		dev_err(&pdev->dev, "incorrect UID/bus id \"%s\"!\n", uid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	dev_dbg(&pdev->dev, "bus id is %u\n", i2c_dev->common.bus_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	/* Register the adapter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	amd_mp2_pm_runtime_get(mp2_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	i2c_dev->common.reqcmd = i2c_none;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	if (amd_mp2_register_cb(&i2c_dev->common))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	device_link_add(&i2c_dev->pdev->dev, &mp2_dev->pci_dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 			DL_FLAG_AUTOREMOVE_CONSUMER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	i2c_dev->common.i2c_speed = i2c_amd_get_bus_speed(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	/* Setup i2c adapter description */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	i2c_dev->adap.owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	i2c_dev->adap.algo = &i2c_amd_algorithm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	i2c_dev->adap.quirks = &amd_i2c_dev_quirks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	i2c_dev->adap.dev.parent = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	i2c_dev->adap.algo_data = i2c_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	i2c_dev->adap.timeout = AMD_I2C_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	ACPI_COMPANION_SET(&i2c_dev->adap.dev, ACPI_COMPANION(&pdev->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	i2c_dev->adap.dev.of_node = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	snprintf(i2c_dev->adap.name, sizeof(i2c_dev->adap.name),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 		 "AMD MP2 i2c bus %u", i2c_dev->common.bus_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	i2c_set_adapdata(&i2c_dev->adap, i2c_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	init_completion(&i2c_dev->cmd_complete);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	/* Enable the bus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	if (i2c_amd_enable_set(i2c_dev, true))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 		dev_err(&pdev->dev, "initial bus enable failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	/* Attach to the i2c layer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	ret = i2c_add_adapter(&i2c_dev->adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	amd_mp2_pm_runtime_put(mp2_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 		dev_err(&pdev->dev, "i2c add adapter failed = %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) static int i2c_amd_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	struct amd_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	struct amd_i2c_common *i2c_common = &i2c_dev->common;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	i2c_lock_bus(&i2c_dev->adap, I2C_LOCK_ROOT_ADAPTER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	i2c_amd_enable_set(i2c_dev, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	amd_mp2_unregister_cb(i2c_common);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	i2c_common->mp2_dev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	i2c_unlock_bus(&i2c_dev->adap, I2C_LOCK_ROOT_ADAPTER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	i2c_del_adapter(&i2c_dev->adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) static const struct acpi_device_id i2c_amd_acpi_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	{ "AMDI0011" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) MODULE_DEVICE_TABLE(acpi, i2c_amd_acpi_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) static struct platform_driver i2c_amd_plat_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	.probe = i2c_amd_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	.remove = i2c_amd_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 		.name = "i2c_amd_mp2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 		.acpi_match_table = ACPI_PTR(i2c_amd_acpi_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) module_platform_driver(i2c_amd_plat_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) MODULE_DESCRIPTION("AMD(R) MP2 I2C Platform Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) MODULE_AUTHOR("Nehal Shah <nehal-bakulchandra.shah@amd.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) MODULE_AUTHOR("Elie Morisse <syniurge@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) MODULE_LICENSE("Dual BSD/GPL");