Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Intel(R) Trace Hub Software Trace Hub support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2014-2015 Intel Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/stm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include "intel_th.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include "sth.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) struct sth_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	void __iomem	*base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	void __iomem	*channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	phys_addr_t	channels_phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	struct device	*dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	struct stm_data	stm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	unsigned int	sw_nmasters;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) static struct intel_th_channel __iomem *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) sth_channel(struct sth_device *sth, unsigned int master, unsigned int channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	struct intel_th_channel __iomem *sw_map = sth->channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	return &sw_map[(master - sth->stm.sw_start) * sth->stm.sw_nchannels +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 		       channel];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) static void sth_iowrite(void __iomem *dest, const unsigned char *payload,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 			unsigned int size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	switch (size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #ifdef CONFIG_64BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	case 8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 		writeq_relaxed(*(u64 *)payload, dest);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 		writel_relaxed(*(u32 *)payload, dest);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 		writew_relaxed(*(u16 *)payload, dest);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		writeb_relaxed(*(u8 *)payload, dest);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) static ssize_t notrace sth_stm_packet(struct stm_data *stm_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 				      unsigned int master,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 				      unsigned int channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 				      unsigned int packet,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 				      unsigned int flags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 				      unsigned int size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 				      const unsigned char *payload)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	struct sth_device *sth = container_of(stm_data, struct sth_device, stm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	struct intel_th_channel __iomem *out =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		sth_channel(sth, master, channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	u64 __iomem *outp = &out->Dn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	unsigned long reg = REG_STH_TRIG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) #ifndef CONFIG_64BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	if (size > 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		size = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	size = rounddown_pow_of_two(size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	switch (packet) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	/* Global packets (GERR, XSYNC, TRIG) are sent with register writes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	case STP_PACKET_GERR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		reg += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	case STP_PACKET_XSYNC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		reg += 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	case STP_PACKET_TRIG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		if (flags & STP_PACKET_TIMESTAMPED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 			reg += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		writeb_relaxed(*payload, sth->base + reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	case STP_PACKET_MERR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		if (size > 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 			size = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		sth_iowrite(&out->MERR, payload, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	case STP_PACKET_FLAG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		if (flags & STP_PACKET_TIMESTAMPED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 			outp = (u64 __iomem *)&out->FLAG_TS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 			outp = (u64 __iomem *)&out->FLAG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		writeb_relaxed(0, outp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	case STP_PACKET_USER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		if (flags & STP_PACKET_TIMESTAMPED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 			outp = &out->USER_TS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 			outp = &out->USER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		sth_iowrite(outp, payload, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	case STP_PACKET_DATA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 		outp = &out->Dn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		if (flags & STP_PACKET_TIMESTAMPED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 			outp += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		if (flags & STP_PACKET_MARKED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 			outp++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		sth_iowrite(outp, payload, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	return size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static phys_addr_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) sth_stm_mmio_addr(struct stm_data *stm_data, unsigned int master,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		  unsigned int channel, unsigned int nr_chans)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	struct sth_device *sth = container_of(stm_data, struct sth_device, stm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	phys_addr_t addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	master -= sth->stm.sw_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	addr = sth->channels_phys + (master * sth->stm.sw_nchannels + channel) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		sizeof(struct intel_th_channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	if (offset_in_page(addr) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	    offset_in_page(nr_chans * sizeof(struct intel_th_channel)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	return addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static int sth_stm_link(struct stm_data *stm_data, unsigned int master,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 			 unsigned int channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	struct sth_device *sth = container_of(stm_data, struct sth_device, stm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	return intel_th_set_output(to_intel_th_device(sth->dev), master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static int intel_th_sw_init(struct sth_device *sth)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	reg = ioread32(sth->base + REG_STH_STHCAP1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	sth->stm.sw_nchannels = reg & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	reg = ioread32(sth->base + REG_STH_STHCAP0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	sth->stm.sw_start = reg & 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	sth->stm.sw_end = reg >> 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	sth->sw_nmasters = sth->stm.sw_end - sth->stm.sw_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	dev_dbg(sth->dev, "sw_start: %x sw_end: %x masters: %x nchannels: %x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		sth->stm.sw_start, sth->stm.sw_end, sth->sw_nmasters,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		sth->stm.sw_nchannels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static int intel_th_sth_probe(struct intel_th_device *thdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	struct device *dev = &thdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	struct sth_device *sth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	void __iomem *base, *channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	res = intel_th_device_get_resource(thdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	if (!res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	base = devm_ioremap(dev, res->start, resource_size(res));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	if (!base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	res = intel_th_device_get_resource(thdev, IORESOURCE_MEM, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	if (!res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	channels = devm_ioremap(dev, res->start, resource_size(res));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	if (!channels)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	sth = devm_kzalloc(dev, sizeof(*sth), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	if (!sth)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	sth->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	sth->base = base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	sth->channels = channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	sth->channels_phys = res->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	sth->stm.name = dev_name(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	sth->stm.packet = sth_stm_packet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	sth->stm.mmio_addr = sth_stm_mmio_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	sth->stm.sw_mmiosz = sizeof(struct intel_th_channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	sth->stm.link = sth_stm_link;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	err = intel_th_sw_init(sth);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	err = stm_register_device(dev, &sth->stm, THIS_MODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		dev_err(dev, "stm_register_device failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	dev_set_drvdata(dev, sth);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) static void intel_th_sth_remove(struct intel_th_device *thdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	struct sth_device *sth = dev_get_drvdata(&thdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	stm_unregister_device(&sth->stm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static struct intel_th_driver intel_th_sth_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	.probe	= intel_th_sth_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	.remove	= intel_th_sth_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	.driver	= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		.name	= "sth",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		.owner	= THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) module_driver(intel_th_sth_driver,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	      intel_th_driver_register,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	      intel_th_driver_unregister);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) MODULE_DESCRIPTION("Intel(R) Trace Hub Software Trace Hub driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) MODULE_AUTHOR("Alexander Shishkin <alexander.shishkin@intel.com>");