^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Spreadtrum hardware spinlock driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2017 Spreadtrum - http://www.spreadtrum.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/hwspinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "hwspinlock_internal.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /* hwspinlock registers definition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define HWSPINLOCK_RECCTRL 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define HWSPINLOCK_MASTERID(_X_) (0x80 + 0x4 * (_X_))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define HWSPINLOCK_TOKEN(_X_) (0x800 + 0x4 * (_X_))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /* unlocked value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define HWSPINLOCK_NOTTAKEN 0x55aa10c5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* bits definition of RECCTRL reg */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define HWSPINLOCK_USER_BITS 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* hwspinlock number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define SPRD_HWLOCKS_NUM 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct sprd_hwspinlock_dev {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct hwspinlock_device bank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* try to lock the hardware spinlock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static int sprd_hwspinlock_trylock(struct hwspinlock *lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct sprd_hwspinlock_dev *sprd_hwlock =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) dev_get_drvdata(lock->bank->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) void __iomem *addr = lock->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) int user_id, lock_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) if (!readl(addr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) lock_id = hwlock_to_id(lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /* get the hardware spinlock master/user id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) user_id = readl(sprd_hwlock->base + HWSPINLOCK_MASTERID(lock_id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) dev_warn(sprd_hwlock->bank.dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) "hwspinlock [%d] lock failed and master/user id = %d!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) lock_id, user_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* unlock the hardware spinlock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static void sprd_hwspinlock_unlock(struct hwspinlock *lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) void __iomem *lock_addr = lock->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) writel(HWSPINLOCK_NOTTAKEN, lock_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /* The specs recommended below number as the retry delay time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static void sprd_hwspinlock_relax(struct hwspinlock *lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) ndelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static const struct hwspinlock_ops sprd_hwspinlock_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .trylock = sprd_hwspinlock_trylock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .unlock = sprd_hwspinlock_unlock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .relax = sprd_hwspinlock_relax,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static void sprd_hwspinlock_disable(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) struct sprd_hwspinlock_dev *sprd_hwlock = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) clk_disable_unprepare(sprd_hwlock->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static int sprd_hwspinlock_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) struct sprd_hwspinlock_dev *sprd_hwlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct hwspinlock *lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) if (!pdev->dev.of_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) sprd_hwlock = devm_kzalloc(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) sizeof(struct sprd_hwspinlock_dev) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) SPRD_HWLOCKS_NUM * sizeof(*lock),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) if (!sprd_hwlock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) sprd_hwlock->base = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (IS_ERR(sprd_hwlock->base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return PTR_ERR(sprd_hwlock->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) sprd_hwlock->clk = devm_clk_get(&pdev->dev, "enable");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) if (IS_ERR(sprd_hwlock->clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) dev_err(&pdev->dev, "get hwspinlock clock failed!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return PTR_ERR(sprd_hwlock->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) ret = clk_prepare_enable(sprd_hwlock->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) ret = devm_add_action_or_reset(&pdev->dev, sprd_hwspinlock_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) sprd_hwlock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) "Failed to add hwspinlock disable action\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) /* set the hwspinlock to record user id to identify subsystems */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) writel(HWSPINLOCK_USER_BITS, sprd_hwlock->base + HWSPINLOCK_RECCTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) for (i = 0; i < SPRD_HWLOCKS_NUM; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) lock = &sprd_hwlock->bank.lock[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) lock->priv = sprd_hwlock->base + HWSPINLOCK_TOKEN(i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) platform_set_drvdata(pdev, sprd_hwlock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) return devm_hwspin_lock_register(&pdev->dev, &sprd_hwlock->bank,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) &sprd_hwspinlock_ops, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) SPRD_HWLOCKS_NUM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static const struct of_device_id sprd_hwspinlock_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) { .compatible = "sprd,hwspinlock-r3p0", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) MODULE_DEVICE_TABLE(of, sprd_hwspinlock_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static struct platform_driver sprd_hwspinlock_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .probe = sprd_hwspinlock_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .name = "sprd_hwspinlock",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .of_match_table = of_match_ptr(sprd_hwspinlock_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static int __init sprd_hwspinlock_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) return platform_driver_register(&sprd_hwspinlock_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) postcore_initcall(sprd_hwspinlock_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static void __exit sprd_hwspinlock_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) platform_driver_unregister(&sprd_hwspinlock_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) module_exit(sprd_hwspinlock_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) MODULE_DESCRIPTION("Hardware spinlock driver for Spreadtrum");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) MODULE_AUTHOR("Baolin Wang <baolin.wang@spreadtrum.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) MODULE_AUTHOR("Lanqing Liu <lanqing.liu@spreadtrum.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) MODULE_AUTHOR("Long Cheng <aiden.cheng@spreadtrum.com>");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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