^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * w83l785ts.c - Part of lm_sensors, Linux kernel modules for hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * monitoring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2003-2009 Jean Delvare <jdelvare@suse.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Inspired from the lm83 driver. The W83L785TS-S is a sensor chip made
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * by Winbond. It reports a single external temperature with a 1 deg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * resolution and a 3 deg accuracy. Datasheet can be obtained from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Winbond's website at:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * http://www.winbond-usa.com/products/winbond_products/pdfs/PCIC/W83L785TS-S.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Ported to Linux 2.6 by Wolfgang Ziegler <nuppla@gmx.at> and Jean Delvare
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * <jdelvare@suse.de>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * Thanks to James Bolt <james@evilpenguin.com> for benchmarking the read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * error handling mechanism.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/hwmon-sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /* How many retries on register read error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define MAX_RETRIES 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * Address to scan
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * Address is fully defined internally and cannot be changed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static const unsigned short normal_i2c[] = { 0x2e, I2C_CLIENT_END };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * The W83L785TS-S registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * Manufacturer ID is 0x5CA3 for Winbond.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define W83L785TS_REG_MAN_ID1 0x4D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define W83L785TS_REG_MAN_ID2 0x4C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define W83L785TS_REG_CHIP_ID 0x4E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define W83L785TS_REG_CONFIG 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define W83L785TS_REG_TYPE 0x52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define W83L785TS_REG_TEMP 0x27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define W83L785TS_REG_TEMP_OVER 0x53 /* not sure about this one */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * Conversions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * The W83L785TS-S uses signed 8-bit values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define TEMP_FROM_REG(val) ((val) * 1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * Functions declaration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static int w83l785ts_probe(struct i2c_client *client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static int w83l785ts_detect(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct i2c_board_info *info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static int w83l785ts_remove(struct i2c_client *client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static u8 w83l785ts_read_value(struct i2c_client *client, u8 reg, u8 defval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static struct w83l785ts_data *w83l785ts_update_device(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * Driver data (common to all clients)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static const struct i2c_device_id w83l785ts_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) { "w83l785ts", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) MODULE_DEVICE_TABLE(i2c, w83l785ts_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static struct i2c_driver w83l785ts_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .class = I2C_CLASS_HWMON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .name = "w83l785ts",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .probe_new = w83l785ts_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .remove = w83l785ts_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .id_table = w83l785ts_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .detect = w83l785ts_detect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .address_list = normal_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * Client data (each client gets its own)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct w83l785ts_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct mutex update_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) char valid; /* zero until following fields are valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) unsigned long last_updated; /* in jiffies */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /* registers values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) s8 temp[2]; /* 0: input, 1: critical limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * Sysfs stuff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) struct w83l785ts_data *data = w83l785ts_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[attr->index]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO, show_temp, NULL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * Real code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /* Return 0 if detection is successful, -ENODEV otherwise */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static int w83l785ts_detect(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) struct i2c_board_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct i2c_adapter *adapter = client->adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) u16 man_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) u8 chip_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* detection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if ((w83l785ts_read_value(client, W83L785TS_REG_CONFIG, 0) & 0x80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) || (w83l785ts_read_value(client, W83L785TS_REG_TYPE, 0) & 0xFC)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) dev_dbg(&adapter->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) "W83L785TS-S detection failed at 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) client->addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /* Identification */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) man_id = (w83l785ts_read_value(client, W83L785TS_REG_MAN_ID1, 0) << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) + w83l785ts_read_value(client, W83L785TS_REG_MAN_ID2, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) chip_id = w83l785ts_read_value(client, W83L785TS_REG_CHIP_ID, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) if (man_id != 0x5CA3 /* Winbond */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) || chip_id != 0x70) { /* W83L785TS-S */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) dev_dbg(&adapter->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) "Unsupported chip (man_id=0x%04X, chip_id=0x%02X)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) man_id, chip_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) strlcpy(info->type, "w83l785ts", I2C_NAME_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static int w83l785ts_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) struct w83l785ts_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) data = devm_kzalloc(dev, sizeof(struct w83l785ts_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) i2c_set_clientdata(client, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) mutex_init(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) * Initialize the W83L785TS chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) * Nothing yet, assume it is already started.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) err = device_create_file(dev, &sensor_dev_attr_temp1_input.dev_attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) err = device_create_file(dev, &sensor_dev_attr_temp1_max.dev_attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) goto exit_remove;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) /* Register sysfs hooks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) data->hwmon_dev = hwmon_device_register(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) if (IS_ERR(data->hwmon_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) err = PTR_ERR(data->hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) goto exit_remove;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) exit_remove:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) device_remove_file(dev, &sensor_dev_attr_temp1_input.dev_attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) device_remove_file(dev, &sensor_dev_attr_temp1_max.dev_attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static int w83l785ts_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) struct w83l785ts_data *data = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) hwmon_device_unregister(data->hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) device_remove_file(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) &sensor_dev_attr_temp1_input.dev_attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) device_remove_file(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) &sensor_dev_attr_temp1_max.dev_attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) static u8 w83l785ts_read_value(struct i2c_client *client, u8 reg, u8 defval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) int value, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) const char *prefix;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) * We might be called during detection, at which point the client
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) * isn't yet fully initialized, so we can't use dev_dbg on it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) if (i2c_get_clientdata(client)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) prefix = "";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) dev = &client->adapter->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) prefix = "w83l785ts: ";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) * Frequent read errors have been reported on Asus boards, so we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) * retry on read errors. If it still fails (unlikely), return the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) * default value requested by the caller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) for (i = 1; i <= MAX_RETRIES; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) value = i2c_smbus_read_byte_data(client, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (value >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) dev_dbg(dev, "%sRead 0x%02x from register 0x%02x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) prefix, value, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) return value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) dev_dbg(dev, "%sRead failed, will retry in %d.\n", prefix, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) msleep(i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) dev_err(dev, "%sCouldn't read value from register 0x%02x.\n", prefix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) return defval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static struct w83l785ts_data *w83l785ts_update_device(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) struct w83l785ts_data *data = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) if (!data->valid || time_after(jiffies, data->last_updated + HZ * 2)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) dev_dbg(&client->dev, "Updating w83l785ts data.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) data->temp[0] = w83l785ts_read_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) W83L785TS_REG_TEMP, data->temp[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) data->temp[1] = w83l785ts_read_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) W83L785TS_REG_TEMP_OVER, data->temp[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) data->last_updated = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) data->valid = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) return data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) module_i2c_driver(w83l785ts_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) MODULE_DESCRIPTION("W83L785TS-S driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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