^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * w83792d.c - Part of lm_sensors, Linux kernel modules for hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * monitoring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2004, 2005 Winbond Electronics Corp.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Shane Huang,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Rudolf Marek <r.marek@assembler.cz>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Note:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * 1. This driver is only for 2.6 kernel, 2.4 kernel need a different driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * 2. This driver is only for Winbond W83792D C version device, there
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * are also some motherboards with B version W83792D device. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * calculation method to in6-in7(measured value, limits) is a little
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * different between C and B version. C or B version can be identified
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * by CR[0x49h].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * Supports following chips:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * w83792d 9 7 7 3 0x7a 0x5ca3 yes no
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/hwmon-sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* Addresses to scan */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) I2C_CLIENT_END };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* Insmod parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static unsigned short force_subclients[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) module_param_array(force_subclients, short, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) MODULE_PARM_DESC(force_subclients,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) "List of subclient addresses: {bus, clientaddr, subclientaddr1, subclientaddr2}");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static bool init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) module_param(init, bool, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) MODULE_PARM_DESC(init, "Set to one to force chip initialization");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /* The W83792D registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static const u8 W83792D_REG_IN[9] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 0x20, /* Vcore A in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 0x21, /* Vcore B in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 0x22, /* VIN0 in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 0x23, /* VIN1 in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 0x24, /* VIN2 in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 0x25, /* VIN3 in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 0x26, /* 5VCC in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 0xB0, /* 5VSB in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 0xB1 /* VBAT in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define W83792D_REG_LOW_BITS1 0x3E /* Low Bits I in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define W83792D_REG_LOW_BITS2 0x3F /* Low Bits II in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static const u8 W83792D_REG_IN_MAX[9] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 0x2B, /* Vcore A High Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 0x2D, /* Vcore B High Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 0x2F, /* VIN0 High Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 0x31, /* VIN1 High Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 0x33, /* VIN2 High Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 0x35, /* VIN3 High Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 0x37, /* 5VCC High Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 0xB4, /* 5VSB High Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 0xB6 /* VBAT High Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static const u8 W83792D_REG_IN_MIN[9] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 0x2C, /* Vcore A Low Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 0x2E, /* Vcore B Low Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 0x30, /* VIN0 Low Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 0x32, /* VIN1 Low Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 0x34, /* VIN2 Low Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) 0x36, /* VIN3 Low Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) 0x38, /* 5VCC Low Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) 0xB5, /* 5VSB Low Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) 0xB7 /* VBAT Low Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static const u8 W83792D_REG_FAN[7] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) 0x28, /* FAN 1 Count in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) 0x29, /* FAN 2 Count in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) 0x2A, /* FAN 3 Count in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) 0xB8, /* FAN 4 Count in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) 0xB9, /* FAN 5 Count in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) 0xBA, /* FAN 6 Count in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) 0xBE /* FAN 7 Count in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static const u8 W83792D_REG_FAN_MIN[7] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) 0x3B, /* FAN 1 Count Low Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) 0x3C, /* FAN 2 Count Low Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) 0x3D, /* FAN 3 Count Low Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 0xBB, /* FAN 4 Count Low Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 0xBC, /* FAN 5 Count Low Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 0xBD, /* FAN 6 Count Low Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 0xBF /* FAN 7 Count Low Limit in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define W83792D_REG_FAN_CFG 0x84 /* FAN Configuration in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static const u8 W83792D_REG_FAN_DIV[4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 0x47, /* contains FAN2 and FAN1 Divisor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 0x5B, /* contains FAN4 and FAN3 Divisor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 0x5C, /* contains FAN6 and FAN5 Divisor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 0x9E /* contains FAN7 Divisor. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static const u8 W83792D_REG_PWM[7] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 0x81, /* FAN 1 Duty Cycle, be used to control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 0x83, /* FAN 2 Duty Cycle, be used to control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 0x94, /* FAN 3 Duty Cycle, be used to control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 0xA3, /* FAN 4 Duty Cycle, be used to control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 0xA4, /* FAN 5 Duty Cycle, be used to control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 0xA5, /* FAN 6 Duty Cycle, be used to control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 0xA6 /* FAN 7 Duty Cycle, be used to control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define W83792D_REG_BANK 0x4E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define W83792D_REG_TEMP2_CONFIG 0xC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define W83792D_REG_TEMP3_CONFIG 0xCA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static const u8 W83792D_REG_TEMP1[3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 0x27, /* TEMP 1 in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 0x39, /* TEMP 1 Over in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 0x3A, /* TEMP 1 Hyst in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static const u8 W83792D_REG_TEMP_ADD[2][6] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) { 0xC0, /* TEMP 2 in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 0xC1, /* TEMP 2(0.5 deg) in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 0xC5, /* TEMP 2 Over High part in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 0xC6, /* TEMP 2 Over Low part in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 0xC3, /* TEMP 2 Thyst High part in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 0xC4 }, /* TEMP 2 Thyst Low part in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) { 0xC8, /* TEMP 3 in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 0xC9, /* TEMP 3(0.5 deg) in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 0xCD, /* TEMP 3 Over High part in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 0xCE, /* TEMP 3 Over Low part in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 0xCB, /* TEMP 3 Thyst High part in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 0xCC } /* TEMP 3 Thyst Low part in DataSheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static const u8 W83792D_REG_THERMAL[3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 0x85, /* SmartFanI: Fan1 target value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 0x86, /* SmartFanI: Fan2 target value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 0x96 /* SmartFanI: Fan3 target value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static const u8 W83792D_REG_TOLERANCE[3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 0x87, /* (bit3-0)SmartFan Fan1 tolerance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 0x87, /* (bit7-4)SmartFan Fan2 tolerance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 0x97 /* (bit3-0)SmartFan Fan3 tolerance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) static const u8 W83792D_REG_POINTS[3][4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) { 0x85, /* SmartFanII: Fan1 temp point 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 0xE3, /* SmartFanII: Fan1 temp point 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 0xE4, /* SmartFanII: Fan1 temp point 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 0xE5 }, /* SmartFanII: Fan1 temp point 4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) { 0x86, /* SmartFanII: Fan2 temp point 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 0xE6, /* SmartFanII: Fan2 temp point 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 0xE7, /* SmartFanII: Fan2 temp point 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 0xE8 }, /* SmartFanII: Fan2 temp point 4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) { 0x96, /* SmartFanII: Fan3 temp point 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 0xE9, /* SmartFanII: Fan3 temp point 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 0xEA, /* SmartFanII: Fan3 temp point 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 0xEB } /* SmartFanII: Fan3 temp point 4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static const u8 W83792D_REG_LEVELS[3][4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) { 0x88, /* (bit3-0) SmartFanII: Fan1 Non-Stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 0x88, /* (bit7-4) SmartFanII: Fan1 Level 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 0xE0, /* (bit7-4) SmartFanII: Fan1 Level 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 0xE0 }, /* (bit3-0) SmartFanII: Fan1 Level 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) { 0x89, /* (bit3-0) SmartFanII: Fan2 Non-Stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 0x89, /* (bit7-4) SmartFanII: Fan2 Level 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 0xE1, /* (bit7-4) SmartFanII: Fan2 Level 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 0xE1 }, /* (bit3-0) SmartFanII: Fan2 Level 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) { 0x98, /* (bit3-0) SmartFanII: Fan3 Non-Stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 0x98, /* (bit7-4) SmartFanII: Fan3 Level 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 0xE2, /* (bit7-4) SmartFanII: Fan3 Level 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 0xE2 } /* (bit3-0) SmartFanII: Fan3 Level 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #define W83792D_REG_GPIO_EN 0x1A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #define W83792D_REG_CONFIG 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) #define W83792D_REG_VID_FANDIV 0x47
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #define W83792D_REG_CHIPID 0x49
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #define W83792D_REG_WCHIPID 0x58
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) #define W83792D_REG_CHIPMAN 0x4F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #define W83792D_REG_PIN 0x4B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) #define W83792D_REG_I2C_SUBADDR 0x4A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) #define W83792D_REG_ALARM1 0xA9 /* realtime status register1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) #define W83792D_REG_ALARM2 0xAA /* realtime status register2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #define W83792D_REG_ALARM3 0xAB /* realtime status register3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define W83792D_REG_CHASSIS 0x42 /* Bit 5: Case Open status bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #define W83792D_REG_CHASSIS_CLR 0x44 /* Bit 7: Case Open CLR_CHS/Reset bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /* control in0/in1 's limit modifiability */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) #define W83792D_REG_VID_IN_B 0x17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) #define W83792D_REG_VBAT 0x5D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) #define W83792D_REG_I2C_ADDR 0x48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) * Conversions. Rounding and limit checking is only done on the TO_REG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) * variants. Note that you should be a bit careful with which arguments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * these macros are called: arguments may be evaluated more than once.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) * Fixing this is just not worth it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) #define IN_FROM_REG(nr, val) (((nr) <= 1) ? ((val) * 2) : \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) ((((nr) == 6) || ((nr) == 7)) ? ((val) * 6) : ((val) * 4)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) #define IN_TO_REG(nr, val) (((nr) <= 1) ? ((val) / 2) : \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) ((((nr) == 6) || ((nr) == 7)) ? ((val) / 6) : ((val) / 4)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static inline u8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) FAN_TO_REG(long rpm, int div)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (rpm == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) return 255;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) rpm = clamp_val(rpm, 1, 1000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) ((val) == 255 ? 0 : \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 1350000 / ((val) * (div))))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) /* for temp1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) #define TEMP1_TO_REG(val) (clamp_val(((val) < 0 ? (val) + 0x100 * 1000 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) : (val)) / 1000, 0, 0xff))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) #define TEMP1_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) /* for temp2 and temp3, because they need additional resolution */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) #define TEMP_ADD_FROM_REG(val1, val2) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) ((((val1) & 0x80 ? (val1)-0x100 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) : (val1)) * 1000) + ((val2 & 0x80) ? 500 : 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) #define TEMP_ADD_TO_REG_HIGH(val) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) (clamp_val(((val) < 0 ? (val) + 0x100 * 1000 : (val)) / 1000, 0, 0xff))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) #define TEMP_ADD_TO_REG_LOW(val) ((val%1000) ? 0x80 : 0x00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) #define DIV_FROM_REG(val) (1 << (val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) static inline u8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) DIV_TO_REG(long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) val = clamp_val(val, 1, 128) >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) for (i = 0; i < 7; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) if (val == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) val >>= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) return (u8)i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) struct w83792d_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) struct mutex update_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) char valid; /* !=0 if following fields are valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) unsigned long last_updated; /* In jiffies */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) u8 in[9]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) u8 in_max[9]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) u8 in_min[9]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) u16 low_bits; /* Additional resolution to voltage in6-0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) u8 fan[7]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) u8 fan_min[7]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) u8 temp1[3]; /* current, over, thyst */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) u8 temp_add[2][6]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) u8 fan_div[7]; /* Register encoding, shifted right */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) u8 pwm[7]; /* The 7 PWM outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) u8 pwmenable[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) u32 alarms; /* realtime status register encoding,combined */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) u8 chassis; /* Chassis status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) u8 thermal_cruise[3]; /* Smart FanI: Fan1,2,3 target value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) u8 tolerance[3]; /* Fan1,2,3 tolerance(Smart Fan I/II) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) u8 sf2_points[3][4]; /* Smart FanII: Fan1,2,3 temperature points */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) u8 sf2_levels[3][4]; /* Smart FanII: Fan1,2,3 duty cycle levels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static int w83792d_probe(struct i2c_client *client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) static int w83792d_detect(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) struct i2c_board_info *info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) static int w83792d_remove(struct i2c_client *client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) static struct w83792d_data *w83792d_update_device(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) #ifdef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) static void w83792d_print_debug(struct w83792d_data *data, struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) static void w83792d_init_client(struct i2c_client *client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) static const struct i2c_device_id w83792d_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) { "w83792d", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) MODULE_DEVICE_TABLE(i2c, w83792d_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) static struct i2c_driver w83792d_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) .class = I2C_CLASS_HWMON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) .name = "w83792d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) .probe_new = w83792d_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) .remove = w83792d_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) .id_table = w83792d_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) .detect = w83792d_detect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) .address_list = normal_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) static inline long in_count_from_reg(int nr, struct w83792d_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) /* in7 and in8 do not have low bits, but the formula still works */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) return (data->in[nr] << 2) | ((data->low_bits >> (2 * nr)) & 0x03);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) * The SMBus locks itself. The Winbond W83792D chip has a bank register,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) * but the driver only accesses registers in bank 0, so we don't have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) * to switch banks and lock access between switches.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) static inline int w83792d_read_value(struct i2c_client *client, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) return i2c_smbus_read_byte_data(client, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) w83792d_write_value(struct i2c_client *client, u8 reg, u8 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) return i2c_smbus_write_byte_data(client, reg, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) /* following are the sysfs callback functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) static ssize_t show_in(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) int nr = sensor_attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) struct w83792d_data *data = w83792d_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) return sprintf(buf, "%ld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) IN_FROM_REG(nr, in_count_from_reg(nr, data)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) #define show_in_reg(reg) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) char *buf) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) struct sensor_device_attribute *sensor_attr \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) = to_sensor_dev_attr(attr); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) int nr = sensor_attr->index; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) struct w83792d_data *data = w83792d_update_device(dev); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) return sprintf(buf, "%ld\n", \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) (long)(IN_FROM_REG(nr, data->reg[nr]) * 4)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) show_in_reg(in_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) show_in_reg(in_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) #define store_in_reg(REG, reg) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) static ssize_t store_in_##reg(struct device *dev, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) struct device_attribute *attr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) const char *buf, size_t count) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) struct sensor_device_attribute *sensor_attr \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) = to_sensor_dev_attr(attr); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) int nr = sensor_attr->index; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) struct i2c_client *client = to_i2c_client(dev); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) struct w83792d_data *data = i2c_get_clientdata(client); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) unsigned long val; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) int err = kstrtoul(buf, 10, &val); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) if (err) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) return err; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) mutex_lock(&data->update_lock); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) data->in_##reg[nr] = clamp_val(IN_TO_REG(nr, val) / 4, 0, 255); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) w83792d_write_value(client, W83792D_REG_IN_##REG[nr], \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) data->in_##reg[nr]); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) mutex_unlock(&data->update_lock); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) return count; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) store_in_reg(MIN, min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) store_in_reg(MAX, max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) #define show_fan_reg(reg) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) char *buf) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) struct sensor_device_attribute *sensor_attr \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) = to_sensor_dev_attr(attr); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) int nr = sensor_attr->index - 1; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) struct w83792d_data *data = w83792d_update_device(dev); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) return sprintf(buf, "%d\n", \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) FAN_FROM_REG(data->reg[nr], DIV_FROM_REG(data->fan_div[nr]))); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) show_fan_reg(fan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) show_fan_reg(fan_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) store_fan_min(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) int nr = sensor_attr->index - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) struct w83792d_data *data = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) w83792d_write_value(client, W83792D_REG_FAN_MIN[nr],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) data->fan_min[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) show_fan_div(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) int nr = sensor_attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) struct w83792d_data *data = w83792d_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) return sprintf(buf, "%u\n", DIV_FROM_REG(data->fan_div[nr - 1]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) * Note: we save and restore the fan minimum here, because its value is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) * determined in part by the fan divisor. This follows the principle of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) * least surprise; the user doesn't expect the fan minimum to change just
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) * because the divisor changed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) store_fan_div(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) int nr = sensor_attr->index - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) struct w83792d_data *data = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) unsigned long min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) /*u8 reg;*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) u8 fan_div_reg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) u8 tmp_fan_div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) /* Save fan_min */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) min = FAN_FROM_REG(data->fan_min[nr],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) DIV_FROM_REG(data->fan_div[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) data->fan_div[nr] = DIV_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) fan_div_reg = w83792d_read_value(client, W83792D_REG_FAN_DIV[nr >> 1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) fan_div_reg &= (nr & 0x01) ? 0x8f : 0xf8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) tmp_fan_div = (nr & 0x01) ? (((data->fan_div[nr]) << 4) & 0x70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) : ((data->fan_div[nr]) & 0x07);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) w83792d_write_value(client, W83792D_REG_FAN_DIV[nr >> 1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) fan_div_reg | tmp_fan_div);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) /* Restore fan_min */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) w83792d_write_value(client, W83792D_REG_FAN_MIN[nr], data->fan_min[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) /* read/write the temperature1, includes measured value and limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) static ssize_t show_temp1(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) int nr = sensor_attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) struct w83792d_data *data = w83792d_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp1[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) static ssize_t store_temp1(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) int nr = sensor_attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) struct w83792d_data *data = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) data->temp1[nr] = TEMP1_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) w83792d_write_value(client, W83792D_REG_TEMP1[nr],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) data->temp1[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) /* read/write the temperature2-3, includes measured value and limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) static ssize_t show_temp23(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) struct sensor_device_attribute_2 *sensor_attr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) = to_sensor_dev_attr_2(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) int nr = sensor_attr->nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) int index = sensor_attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) struct w83792d_data *data = w83792d_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) return sprintf(buf, "%ld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) (long)TEMP_ADD_FROM_REG(data->temp_add[nr][index],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) data->temp_add[nr][index+1]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) static ssize_t store_temp23(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) struct sensor_device_attribute_2 *sensor_attr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) = to_sensor_dev_attr_2(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) int nr = sensor_attr->nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) int index = sensor_attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) struct w83792d_data *data = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) data->temp_add[nr][index] = TEMP_ADD_TO_REG_HIGH(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) data->temp_add[nr][index+1] = TEMP_ADD_TO_REG_LOW(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) w83792d_write_value(client, W83792D_REG_TEMP_ADD[nr][index],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) data->temp_add[nr][index]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) w83792d_write_value(client, W83792D_REG_TEMP_ADD[nr][index+1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) data->temp_add[nr][index+1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) /* get realtime status of all sensors items: voltage, temp, fan */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) alarms_show(struct device *dev, struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) struct w83792d_data *data = w83792d_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) return sprintf(buf, "%d\n", data->alarms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) static ssize_t show_alarm(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) int nr = sensor_attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) struct w83792d_data *data = w83792d_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) return sprintf(buf, "%d\n", (data->alarms >> nr) & 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) show_pwm(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) int nr = sensor_attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) struct w83792d_data *data = w83792d_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) return sprintf(buf, "%d\n", (data->pwm[nr] & 0x0f) << 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) show_pwmenable(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) int nr = sensor_attr->index - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) struct w83792d_data *data = w83792d_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) long pwm_enable_tmp = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) switch (data->pwmenable[nr]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) pwm_enable_tmp = 1; /* manual mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) pwm_enable_tmp = 3; /*thermal cruise/Smart Fan I */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) pwm_enable_tmp = 2; /* Smart Fan II */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) return sprintf(buf, "%ld\n", pwm_enable_tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) store_pwm(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) int nr = sensor_attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) struct w83792d_data *data = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) val = clamp_val(val, 0, 255) >> 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) val |= w83792d_read_value(client, W83792D_REG_PWM[nr]) & 0xf0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) data->pwm[nr] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) w83792d_write_value(client, W83792D_REG_PWM[nr], data->pwm[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) store_pwmenable(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) int nr = sensor_attr->index - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) struct w83792d_data *data = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) u8 fan_cfg_tmp, cfg1_tmp, cfg2_tmp, cfg3_tmp, cfg4_tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) if (val < 1 || val > 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) switch (val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) data->pwmenable[nr] = 0; /* manual mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) data->pwmenable[nr] = 2; /* Smart Fan II */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) data->pwmenable[nr] = 1; /* thermal cruise/Smart Fan I */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) cfg1_tmp = data->pwmenable[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) cfg2_tmp = (data->pwmenable[1]) << 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) cfg3_tmp = (data->pwmenable[2]) << 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) cfg4_tmp = w83792d_read_value(client, W83792D_REG_FAN_CFG) & 0xc0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) fan_cfg_tmp = ((cfg4_tmp | cfg3_tmp) | cfg2_tmp) | cfg1_tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) w83792d_write_value(client, W83792D_REG_FAN_CFG, fan_cfg_tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) show_pwm_mode(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) int nr = sensor_attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) struct w83792d_data *data = w83792d_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) return sprintf(buf, "%d\n", data->pwm[nr] >> 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) store_pwm_mode(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) int nr = sensor_attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) struct w83792d_data *data = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) if (val > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) data->pwm[nr] = w83792d_read_value(client, W83792D_REG_PWM[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) if (val) { /* PWM mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) data->pwm[nr] |= 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) } else { /* DC mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) data->pwm[nr] &= 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) w83792d_write_value(client, W83792D_REG_PWM[nr], data->pwm[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) intrusion0_alarm_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) struct w83792d_data *data = w83792d_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) return sprintf(buf, "%d\n", data->chassis);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) intrusion0_alarm_store(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) struct w83792d_data *data = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) if (kstrtoul(buf, 10, &val) || val != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) reg = w83792d_read_value(client, W83792D_REG_CHASSIS_CLR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) w83792d_write_value(client, W83792D_REG_CHASSIS_CLR, reg | 0x80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) data->valid = 0; /* Force cache refresh */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) /* For Smart Fan I / Thermal Cruise */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) show_thermal_cruise(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) int nr = sensor_attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) struct w83792d_data *data = w83792d_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) return sprintf(buf, "%ld\n", (long)data->thermal_cruise[nr-1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) store_thermal_cruise(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) int nr = sensor_attr->index - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) struct w83792d_data *data = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) u8 target_tmp = 0, target_mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) target_tmp = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) target_tmp = target_tmp & 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) target_mask = w83792d_read_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) W83792D_REG_THERMAL[nr]) & 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) data->thermal_cruise[nr] = clamp_val(target_tmp, 0, 255);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) w83792d_write_value(client, W83792D_REG_THERMAL[nr],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) (data->thermal_cruise[nr]) | target_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) /* For Smart Fan I/Thermal Cruise and Smart Fan II */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) show_tolerance(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) int nr = sensor_attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) struct w83792d_data *data = w83792d_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) return sprintf(buf, "%ld\n", (long)data->tolerance[nr-1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) store_tolerance(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) int nr = sensor_attr->index - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) struct w83792d_data *data = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) u8 tol_tmp, tol_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) tol_mask = w83792d_read_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) W83792D_REG_TOLERANCE[nr]) & ((nr == 1) ? 0x0f : 0xf0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) tol_tmp = clamp_val(val, 0, 15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) tol_tmp &= 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) data->tolerance[nr] = tol_tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) if (nr == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) tol_tmp <<= 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) w83792d_write_value(client, W83792D_REG_TOLERANCE[nr],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) tol_mask | tol_tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) /* For Smart Fan II */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) show_sf2_point(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) struct sensor_device_attribute_2 *sensor_attr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) = to_sensor_dev_attr_2(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) int nr = sensor_attr->nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) int index = sensor_attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) struct w83792d_data *data = w83792d_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) return sprintf(buf, "%ld\n", (long)data->sf2_points[index-1][nr-1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) store_sf2_point(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) struct sensor_device_attribute_2 *sensor_attr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) = to_sensor_dev_attr_2(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) int nr = sensor_attr->nr - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) int index = sensor_attr->index - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) struct w83792d_data *data = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) u8 mask_tmp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) data->sf2_points[index][nr] = clamp_val(val, 0, 127);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) mask_tmp = w83792d_read_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) W83792D_REG_POINTS[index][nr]) & 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) w83792d_write_value(client, W83792D_REG_POINTS[index][nr],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) mask_tmp|data->sf2_points[index][nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) show_sf2_level(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) struct sensor_device_attribute_2 *sensor_attr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) = to_sensor_dev_attr_2(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) int nr = sensor_attr->nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) int index = sensor_attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) struct w83792d_data *data = w83792d_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) return sprintf(buf, "%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) (((data->sf2_levels[index-1][nr]) * 100) / 15));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) store_sf2_level(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) struct sensor_device_attribute_2 *sensor_attr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) = to_sensor_dev_attr_2(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) int nr = sensor_attr->nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) int index = sensor_attr->index - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) struct w83792d_data *data = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) u8 mask_tmp = 0, level_tmp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) data->sf2_levels[index][nr] = clamp_val((val * 15) / 100, 0, 15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) mask_tmp = w83792d_read_value(client, W83792D_REG_LEVELS[index][nr])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) & ((nr == 3) ? 0xf0 : 0x0f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) if (nr == 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) level_tmp = data->sf2_levels[index][nr];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) level_tmp = data->sf2_levels[index][nr] << 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) w83792d_write_value(client, W83792D_REG_LEVELS[index][nr],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) level_tmp | mask_tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) w83792d_detect_subclients(struct i2c_client *new_client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) int i, id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) int address = new_client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) struct i2c_adapter *adapter = new_client->adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) id = i2c_adapter_id(adapter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) if (force_subclients[0] == id && force_subclients[1] == address) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) for (i = 2; i <= 3; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) if (force_subclients[i] < 0x48 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) force_subclients[i] > 0x4f) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) dev_err(&new_client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) "invalid subclient address %d; must be 0x48-0x4f\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) force_subclients[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) w83792d_write_value(new_client, W83792D_REG_I2C_SUBADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) (force_subclients[2] & 0x07) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) ((force_subclients[3] & 0x07) << 4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) val = w83792d_read_value(new_client, W83792D_REG_I2C_SUBADDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) if (!(val & 0x88) && (val & 0x7) == ((val >> 4) & 0x7)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) dev_err(&new_client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) "duplicate addresses 0x%x, use force_subclient\n", 0x48 + (val & 0x7));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) if (!(val & 0x08))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) devm_i2c_new_dummy_device(&new_client->dev, adapter, 0x48 + (val & 0x7));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) if (!(val & 0x80))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) devm_i2c_new_dummy_device(&new_client->dev, adapter, 0x48 + ((val >> 4) & 0x7));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) static SENSOR_DEVICE_ATTR(in0_input, S_IRUGO, show_in, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_in, NULL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_in, NULL, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_in, NULL, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_in, NULL, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_in, NULL, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_in, NULL, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_in, NULL, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_in, NULL, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) static SENSOR_DEVICE_ATTR(in0_min, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) show_in_min, store_in_min, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) static SENSOR_DEVICE_ATTR(in1_min, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) show_in_min, store_in_min, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) static SENSOR_DEVICE_ATTR(in2_min, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) show_in_min, store_in_min, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) static SENSOR_DEVICE_ATTR(in3_min, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) show_in_min, store_in_min, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) static SENSOR_DEVICE_ATTR(in4_min, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) show_in_min, store_in_min, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) static SENSOR_DEVICE_ATTR(in5_min, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) show_in_min, store_in_min, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) static SENSOR_DEVICE_ATTR(in6_min, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) show_in_min, store_in_min, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) static SENSOR_DEVICE_ATTR(in7_min, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) show_in_min, store_in_min, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) static SENSOR_DEVICE_ATTR(in8_min, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) show_in_min, store_in_min, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) static SENSOR_DEVICE_ATTR(in0_max, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) show_in_max, store_in_max, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) static SENSOR_DEVICE_ATTR(in1_max, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) show_in_max, store_in_max, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) static SENSOR_DEVICE_ATTR(in2_max, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) show_in_max, store_in_max, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) static SENSOR_DEVICE_ATTR(in3_max, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) show_in_max, store_in_max, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) static SENSOR_DEVICE_ATTR(in4_max, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) show_in_max, store_in_max, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) static SENSOR_DEVICE_ATTR(in5_max, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) show_in_max, store_in_max, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) static SENSOR_DEVICE_ATTR(in6_max, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) show_in_max, store_in_max, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) static SENSOR_DEVICE_ATTR(in7_max, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) show_in_max, store_in_max, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) static SENSOR_DEVICE_ATTR(in8_max, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) show_in_max, store_in_max, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp1, NULL, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp23, NULL, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp23, NULL, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) show_temp1, store_temp1, 0, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) store_temp23, 0, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) store_temp23, 1, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) static SENSOR_DEVICE_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) show_temp1, store_temp1, 0, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) static SENSOR_DEVICE_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) show_temp23, store_temp23, 0, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) static SENSOR_DEVICE_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) show_temp23, store_temp23, 1, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) static DEVICE_ATTR_RO(alarms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) static SENSOR_DEVICE_ATTR(fan7_alarm, S_IRUGO, show_alarm, NULL, 15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 19);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 21);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 22);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 23);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) static DEVICE_ATTR_RW(intrusion0_alarm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) static SENSOR_DEVICE_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) static SENSOR_DEVICE_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) static SENSOR_DEVICE_ATTR(pwm5, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) static SENSOR_DEVICE_ATTR(pwm6, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) static SENSOR_DEVICE_ATTR(pwm7, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) static SENSOR_DEVICE_ATTR(pwm1_enable, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) show_pwmenable, store_pwmenable, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) static SENSOR_DEVICE_ATTR(pwm2_enable, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) show_pwmenable, store_pwmenable, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) static SENSOR_DEVICE_ATTR(pwm3_enable, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) show_pwmenable, store_pwmenable, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) static SENSOR_DEVICE_ATTR(pwm1_mode, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) show_pwm_mode, store_pwm_mode, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) static SENSOR_DEVICE_ATTR(pwm2_mode, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) show_pwm_mode, store_pwm_mode, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) static SENSOR_DEVICE_ATTR(pwm3_mode, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) show_pwm_mode, store_pwm_mode, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) static SENSOR_DEVICE_ATTR(pwm4_mode, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) show_pwm_mode, store_pwm_mode, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) static SENSOR_DEVICE_ATTR(pwm5_mode, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) show_pwm_mode, store_pwm_mode, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) static SENSOR_DEVICE_ATTR(pwm6_mode, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) show_pwm_mode, store_pwm_mode, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) static SENSOR_DEVICE_ATTR(pwm7_mode, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) show_pwm_mode, store_pwm_mode, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) static SENSOR_DEVICE_ATTR(tolerance1, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) show_tolerance, store_tolerance, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) static SENSOR_DEVICE_ATTR(tolerance2, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) show_tolerance, store_tolerance, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) static SENSOR_DEVICE_ATTR(tolerance3, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) show_tolerance, store_tolerance, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) static SENSOR_DEVICE_ATTR(thermal_cruise1, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) show_thermal_cruise, store_thermal_cruise, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) static SENSOR_DEVICE_ATTR(thermal_cruise2, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) show_thermal_cruise, store_thermal_cruise, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) static SENSOR_DEVICE_ATTR(thermal_cruise3, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) show_thermal_cruise, store_thermal_cruise, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) static SENSOR_DEVICE_ATTR_2(sf2_point1_fan1, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) show_sf2_point, store_sf2_point, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) static SENSOR_DEVICE_ATTR_2(sf2_point2_fan1, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) show_sf2_point, store_sf2_point, 2, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) static SENSOR_DEVICE_ATTR_2(sf2_point3_fan1, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) show_sf2_point, store_sf2_point, 3, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) static SENSOR_DEVICE_ATTR_2(sf2_point4_fan1, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) show_sf2_point, store_sf2_point, 4, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) static SENSOR_DEVICE_ATTR_2(sf2_point1_fan2, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) show_sf2_point, store_sf2_point, 1, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) static SENSOR_DEVICE_ATTR_2(sf2_point2_fan2, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) show_sf2_point, store_sf2_point, 2, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) static SENSOR_DEVICE_ATTR_2(sf2_point3_fan2, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) show_sf2_point, store_sf2_point, 3, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) static SENSOR_DEVICE_ATTR_2(sf2_point4_fan2, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) show_sf2_point, store_sf2_point, 4, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) static SENSOR_DEVICE_ATTR_2(sf2_point1_fan3, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) show_sf2_point, store_sf2_point, 1, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) static SENSOR_DEVICE_ATTR_2(sf2_point2_fan3, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) show_sf2_point, store_sf2_point, 2, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) static SENSOR_DEVICE_ATTR_2(sf2_point3_fan3, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) show_sf2_point, store_sf2_point, 3, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) static SENSOR_DEVICE_ATTR_2(sf2_point4_fan3, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) show_sf2_point, store_sf2_point, 4, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) static SENSOR_DEVICE_ATTR_2(sf2_level1_fan1, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) show_sf2_level, store_sf2_level, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) static SENSOR_DEVICE_ATTR_2(sf2_level2_fan1, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) show_sf2_level, store_sf2_level, 2, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) static SENSOR_DEVICE_ATTR_2(sf2_level3_fan1, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) show_sf2_level, store_sf2_level, 3, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) static SENSOR_DEVICE_ATTR_2(sf2_level1_fan2, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) show_sf2_level, store_sf2_level, 1, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) static SENSOR_DEVICE_ATTR_2(sf2_level2_fan2, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) show_sf2_level, store_sf2_level, 2, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) static SENSOR_DEVICE_ATTR_2(sf2_level3_fan2, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) show_sf2_level, store_sf2_level, 3, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) static SENSOR_DEVICE_ATTR_2(sf2_level1_fan3, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) show_sf2_level, store_sf2_level, 1, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) static SENSOR_DEVICE_ATTR_2(sf2_level2_fan3, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) show_sf2_level, store_sf2_level, 2, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) static SENSOR_DEVICE_ATTR_2(sf2_level3_fan3, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) show_sf2_level, store_sf2_level, 3, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) static SENSOR_DEVICE_ATTR(fan6_input, S_IRUGO, show_fan, NULL, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) static SENSOR_DEVICE_ATTR(fan7_input, S_IRUGO, show_fan, NULL, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) static SENSOR_DEVICE_ATTR(fan1_min, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) show_fan_min, store_fan_min, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) static SENSOR_DEVICE_ATTR(fan2_min, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) show_fan_min, store_fan_min, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) static SENSOR_DEVICE_ATTR(fan3_min, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) show_fan_min, store_fan_min, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) static SENSOR_DEVICE_ATTR(fan4_min, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) show_fan_min, store_fan_min, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) static SENSOR_DEVICE_ATTR(fan5_min, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) show_fan_min, store_fan_min, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) static SENSOR_DEVICE_ATTR(fan6_min, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) show_fan_min, store_fan_min, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) static SENSOR_DEVICE_ATTR(fan7_min, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) show_fan_min, store_fan_min, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) static SENSOR_DEVICE_ATTR(fan1_div, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) show_fan_div, store_fan_div, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) static SENSOR_DEVICE_ATTR(fan2_div, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) show_fan_div, store_fan_div, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) static SENSOR_DEVICE_ATTR(fan3_div, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) show_fan_div, store_fan_div, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) static SENSOR_DEVICE_ATTR(fan4_div, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) show_fan_div, store_fan_div, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) static SENSOR_DEVICE_ATTR(fan5_div, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) show_fan_div, store_fan_div, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) static SENSOR_DEVICE_ATTR(fan6_div, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) show_fan_div, store_fan_div, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) static SENSOR_DEVICE_ATTR(fan7_div, S_IWUSR | S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) show_fan_div, store_fan_div, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) static struct attribute *w83792d_attributes_fan[4][7] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) &sensor_dev_attr_fan4_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) &sensor_dev_attr_fan4_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) &sensor_dev_attr_fan4_div.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) &sensor_dev_attr_fan4_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) &sensor_dev_attr_pwm4.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) &sensor_dev_attr_pwm4_mode.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) &sensor_dev_attr_fan5_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) &sensor_dev_attr_fan5_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) &sensor_dev_attr_fan5_div.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) &sensor_dev_attr_fan5_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) &sensor_dev_attr_pwm5.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) &sensor_dev_attr_pwm5_mode.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) &sensor_dev_attr_fan6_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) &sensor_dev_attr_fan6_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) &sensor_dev_attr_fan6_div.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) &sensor_dev_attr_fan6_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) &sensor_dev_attr_pwm6.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) &sensor_dev_attr_pwm6_mode.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) &sensor_dev_attr_fan7_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) &sensor_dev_attr_fan7_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) &sensor_dev_attr_fan7_div.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) &sensor_dev_attr_fan7_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) &sensor_dev_attr_pwm7.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) &sensor_dev_attr_pwm7_mode.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) static const struct attribute_group w83792d_group_fan[4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) { .attrs = w83792d_attributes_fan[0] },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) { .attrs = w83792d_attributes_fan[1] },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) { .attrs = w83792d_attributes_fan[2] },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) { .attrs = w83792d_attributes_fan[3] },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) static struct attribute *w83792d_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) &sensor_dev_attr_in0_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) &sensor_dev_attr_in0_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) &sensor_dev_attr_in0_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) &sensor_dev_attr_in1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) &sensor_dev_attr_in1_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) &sensor_dev_attr_in1_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) &sensor_dev_attr_in2_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) &sensor_dev_attr_in2_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) &sensor_dev_attr_in2_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) &sensor_dev_attr_in3_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) &sensor_dev_attr_in3_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) &sensor_dev_attr_in3_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) &sensor_dev_attr_in4_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) &sensor_dev_attr_in4_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) &sensor_dev_attr_in4_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) &sensor_dev_attr_in5_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) &sensor_dev_attr_in5_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) &sensor_dev_attr_in5_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) &sensor_dev_attr_in6_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) &sensor_dev_attr_in6_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) &sensor_dev_attr_in6_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) &sensor_dev_attr_in7_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) &sensor_dev_attr_in7_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) &sensor_dev_attr_in7_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) &sensor_dev_attr_in8_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) &sensor_dev_attr_in8_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) &sensor_dev_attr_in8_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) &sensor_dev_attr_in0_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) &sensor_dev_attr_in1_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) &sensor_dev_attr_in2_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) &sensor_dev_attr_in3_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) &sensor_dev_attr_in4_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) &sensor_dev_attr_in5_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) &sensor_dev_attr_in6_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) &sensor_dev_attr_in7_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) &sensor_dev_attr_in8_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) &sensor_dev_attr_temp1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) &sensor_dev_attr_temp1_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) &sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) &sensor_dev_attr_temp2_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) &sensor_dev_attr_temp2_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) &sensor_dev_attr_temp2_max_hyst.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) &sensor_dev_attr_temp3_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) &sensor_dev_attr_temp3_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) &sensor_dev_attr_temp3_max_hyst.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) &sensor_dev_attr_temp1_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) &sensor_dev_attr_temp2_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) &sensor_dev_attr_temp3_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) &sensor_dev_attr_pwm1.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) &sensor_dev_attr_pwm1_mode.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) &sensor_dev_attr_pwm1_enable.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) &sensor_dev_attr_pwm2.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) &sensor_dev_attr_pwm2_mode.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) &sensor_dev_attr_pwm2_enable.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) &sensor_dev_attr_pwm3.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) &sensor_dev_attr_pwm3_mode.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) &sensor_dev_attr_pwm3_enable.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) &dev_attr_alarms.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) &dev_attr_intrusion0_alarm.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) &sensor_dev_attr_tolerance1.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) &sensor_dev_attr_thermal_cruise1.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) &sensor_dev_attr_tolerance2.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) &sensor_dev_attr_thermal_cruise2.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) &sensor_dev_attr_tolerance3.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) &sensor_dev_attr_thermal_cruise3.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) &sensor_dev_attr_sf2_point1_fan1.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) &sensor_dev_attr_sf2_point2_fan1.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) &sensor_dev_attr_sf2_point3_fan1.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) &sensor_dev_attr_sf2_point4_fan1.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) &sensor_dev_attr_sf2_point1_fan2.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) &sensor_dev_attr_sf2_point2_fan2.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) &sensor_dev_attr_sf2_point3_fan2.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) &sensor_dev_attr_sf2_point4_fan2.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) &sensor_dev_attr_sf2_point1_fan3.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) &sensor_dev_attr_sf2_point2_fan3.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) &sensor_dev_attr_sf2_point3_fan3.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) &sensor_dev_attr_sf2_point4_fan3.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) &sensor_dev_attr_sf2_level1_fan1.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) &sensor_dev_attr_sf2_level2_fan1.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) &sensor_dev_attr_sf2_level3_fan1.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) &sensor_dev_attr_sf2_level1_fan2.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) &sensor_dev_attr_sf2_level2_fan2.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) &sensor_dev_attr_sf2_level3_fan2.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) &sensor_dev_attr_sf2_level1_fan3.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) &sensor_dev_attr_sf2_level2_fan3.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) &sensor_dev_attr_sf2_level3_fan3.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) &sensor_dev_attr_fan1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) &sensor_dev_attr_fan1_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) &sensor_dev_attr_fan1_div.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) &sensor_dev_attr_fan1_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) &sensor_dev_attr_fan2_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) &sensor_dev_attr_fan2_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) &sensor_dev_attr_fan2_div.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) &sensor_dev_attr_fan2_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) &sensor_dev_attr_fan3_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) &sensor_dev_attr_fan3_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) &sensor_dev_attr_fan3_div.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) &sensor_dev_attr_fan3_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) static const struct attribute_group w83792d_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) .attrs = w83792d_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) /* Return 0 if detection is successful, -ENODEV otherwise */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) w83792d_detect(struct i2c_client *client, struct i2c_board_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) struct i2c_adapter *adapter = client->adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) int val1, val2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) unsigned short address = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) if (w83792d_read_value(client, W83792D_REG_CONFIG) & 0x80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) val1 = w83792d_read_value(client, W83792D_REG_BANK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) val2 = w83792d_read_value(client, W83792D_REG_CHIPMAN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) /* Check for Winbond ID if in bank 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) if (!(val1 & 0x07)) { /* is Bank0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) if ((!(val1 & 0x80) && val2 != 0xa3) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) ((val1 & 0x80) && val2 != 0x5c))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) * If Winbond chip, address of chip and W83792D_REG_I2C_ADDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) * should match
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) if (w83792d_read_value(client, W83792D_REG_I2C_ADDR) != address)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) /* Put it now into bank 0 and Vendor ID High Byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) w83792d_write_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) W83792D_REG_BANK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) (w83792d_read_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) W83792D_REG_BANK) & 0x78) | 0x80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) /* Determine the chip type. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) val1 = w83792d_read_value(client, W83792D_REG_WCHIPID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) val2 = w83792d_read_value(client, W83792D_REG_CHIPMAN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) if (val1 != 0x7a || val2 != 0x5c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) strlcpy(info->type, "w83792d", I2C_NAME_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) w83792d_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) struct w83792d_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) int i, val1, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) data = devm_kzalloc(dev, sizeof(struct w83792d_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) i2c_set_clientdata(client, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) mutex_init(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) err = w83792d_detect_subclients(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) /* Initialize the chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) w83792d_init_client(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) /* A few vars need to be filled upon startup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) for (i = 0; i < 7; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) data->fan_min[i] = w83792d_read_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) W83792D_REG_FAN_MIN[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) /* Register sysfs hooks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) err = sysfs_create_group(&dev->kobj, &w83792d_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) * Read GPIO enable register to check if pins for fan 4,5 are used as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) * GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) val1 = w83792d_read_value(client, W83792D_REG_GPIO_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) if (!(val1 & 0x40)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) err = sysfs_create_group(&dev->kobj, &w83792d_group_fan[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) goto exit_remove_files;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) if (!(val1 & 0x20)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) err = sysfs_create_group(&dev->kobj, &w83792d_group_fan[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) goto exit_remove_files;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) val1 = w83792d_read_value(client, W83792D_REG_PIN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) if (val1 & 0x40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) err = sysfs_create_group(&dev->kobj, &w83792d_group_fan[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) goto exit_remove_files;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) if (val1 & 0x04) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) err = sysfs_create_group(&dev->kobj, &w83792d_group_fan[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) goto exit_remove_files;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) data->hwmon_dev = hwmon_device_register(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) if (IS_ERR(data->hwmon_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) err = PTR_ERR(data->hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) goto exit_remove_files;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) exit_remove_files:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) sysfs_remove_group(&dev->kobj, &w83792d_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) for (i = 0; i < ARRAY_SIZE(w83792d_group_fan); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) sysfs_remove_group(&dev->kobj, &w83792d_group_fan[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) w83792d_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) struct w83792d_data *data = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) hwmon_device_unregister(data->hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) sysfs_remove_group(&client->dev.kobj, &w83792d_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) for (i = 0; i < ARRAY_SIZE(w83792d_group_fan); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) sysfs_remove_group(&client->dev.kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) &w83792d_group_fan[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) w83792d_init_client(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) u8 temp2_cfg, temp3_cfg, vid_in_b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) if (init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) w83792d_write_value(client, W83792D_REG_CONFIG, 0x80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) * Clear the bit6 of W83792D_REG_VID_IN_B(set it into 0):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) * W83792D_REG_VID_IN_B bit6 = 0: the high/low limit of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) * vin0/vin1 can be modified by user;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) * W83792D_REG_VID_IN_B bit6 = 1: the high/low limit of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) * vin0/vin1 auto-updated, can NOT be modified by user.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) vid_in_b = w83792d_read_value(client, W83792D_REG_VID_IN_B);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) w83792d_write_value(client, W83792D_REG_VID_IN_B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) vid_in_b & 0xbf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) temp2_cfg = w83792d_read_value(client, W83792D_REG_TEMP2_CONFIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) temp3_cfg = w83792d_read_value(client, W83792D_REG_TEMP3_CONFIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) w83792d_write_value(client, W83792D_REG_TEMP2_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) temp2_cfg & 0xe6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) w83792d_write_value(client, W83792D_REG_TEMP3_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) temp3_cfg & 0xe6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) /* Start monitoring */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) w83792d_write_value(client, W83792D_REG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) (w83792d_read_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) W83792D_REG_CONFIG) & 0xf7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) | 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) static struct w83792d_data *w83792d_update_device(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) struct w83792d_data *data = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) int i, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) u8 reg_array_tmp[4], reg_tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) if (time_after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) (jiffies - data->last_updated, (unsigned long) (HZ * 3))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) || time_before(jiffies, data->last_updated) || !data->valid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) dev_dbg(dev, "Starting device update\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) /* Update the voltages measured value and limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) for (i = 0; i < 9; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) data->in[i] = w83792d_read_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) W83792D_REG_IN[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) data->in_max[i] = w83792d_read_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) W83792D_REG_IN_MAX[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) data->in_min[i] = w83792d_read_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) W83792D_REG_IN_MIN[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) data->low_bits = w83792d_read_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) W83792D_REG_LOW_BITS1) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) (w83792d_read_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) W83792D_REG_LOW_BITS2) << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) for (i = 0; i < 7; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) /* Update the Fan measured value and limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) data->fan[i] = w83792d_read_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) W83792D_REG_FAN[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) data->fan_min[i] = w83792d_read_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) W83792D_REG_FAN_MIN[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) /* Update the PWM/DC Value and PWM/DC flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) data->pwm[i] = w83792d_read_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) W83792D_REG_PWM[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) reg_tmp = w83792d_read_value(client, W83792D_REG_FAN_CFG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) data->pwmenable[0] = reg_tmp & 0x03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) data->pwmenable[1] = (reg_tmp>>2) & 0x03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) data->pwmenable[2] = (reg_tmp>>4) & 0x03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) for (i = 0; i < 3; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) data->temp1[i] = w83792d_read_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) W83792D_REG_TEMP1[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) for (i = 0; i < 2; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) for (j = 0; j < 6; j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) data->temp_add[i][j] = w83792d_read_value(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) client, W83792D_REG_TEMP_ADD[i][j]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) /* Update the Fan Divisor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) for (i = 0; i < 4; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) reg_array_tmp[i] = w83792d_read_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) W83792D_REG_FAN_DIV[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) data->fan_div[0] = reg_array_tmp[0] & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) data->fan_div[1] = (reg_array_tmp[0] >> 4) & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) data->fan_div[2] = reg_array_tmp[1] & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) data->fan_div[3] = (reg_array_tmp[1] >> 4) & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) data->fan_div[4] = reg_array_tmp[2] & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) data->fan_div[5] = (reg_array_tmp[2] >> 4) & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) data->fan_div[6] = reg_array_tmp[3] & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) /* Update the realtime status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) data->alarms = w83792d_read_value(client, W83792D_REG_ALARM1) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) (w83792d_read_value(client, W83792D_REG_ALARM2) << 8) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) (w83792d_read_value(client, W83792D_REG_ALARM3) << 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) /* Update CaseOpen status and it's CLR_CHS. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) data->chassis = (w83792d_read_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) W83792D_REG_CHASSIS) >> 5) & 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) /* Update Thermal Cruise/Smart Fan I target value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) for (i = 0; i < 3; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) data->thermal_cruise[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) w83792d_read_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) W83792D_REG_THERMAL[i]) & 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) /* Update Smart Fan I/II tolerance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) reg_tmp = w83792d_read_value(client, W83792D_REG_TOLERANCE[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) data->tolerance[0] = reg_tmp & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) data->tolerance[1] = (reg_tmp >> 4) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) data->tolerance[2] = w83792d_read_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) W83792D_REG_TOLERANCE[2]) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) /* Update Smart Fan II temperature points */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) for (i = 0; i < 3; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) for (j = 0; j < 4; j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) data->sf2_points[i][j]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) = w83792d_read_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) W83792D_REG_POINTS[i][j]) & 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) /* Update Smart Fan II duty cycle levels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) for (i = 0; i < 3; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) reg_tmp = w83792d_read_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) W83792D_REG_LEVELS[i][0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) data->sf2_levels[i][0] = reg_tmp & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) data->sf2_levels[i][1] = (reg_tmp >> 4) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) reg_tmp = w83792d_read_value(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) W83792D_REG_LEVELS[i][2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) data->sf2_levels[i][2] = (reg_tmp >> 4) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) data->sf2_levels[i][3] = reg_tmp & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) data->last_updated = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) data->valid = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) #ifdef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) w83792d_print_debug(data, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) return data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) #ifdef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) static void w83792d_print_debug(struct w83792d_data *data, struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) int i = 0, j = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) dev_dbg(dev, "==========The following is the debug message...========\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) dev_dbg(dev, "9 set of Voltages: =====>\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) for (i = 0; i < 9; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) dev_dbg(dev, "vin[%d] is: 0x%x\n", i, data->in[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) dev_dbg(dev, "vin[%d] max is: 0x%x\n", i, data->in_max[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) dev_dbg(dev, "vin[%d] min is: 0x%x\n", i, data->in_min[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) dev_dbg(dev, "Low Bit1 is: 0x%x\n", data->low_bits & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) dev_dbg(dev, "Low Bit2 is: 0x%x\n", data->low_bits >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) dev_dbg(dev, "7 set of Fan Counts and Duty Cycles: =====>\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) for (i = 0; i < 7; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) dev_dbg(dev, "fan[%d] is: 0x%x\n", i, data->fan[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) dev_dbg(dev, "fan[%d] min is: 0x%x\n", i, data->fan_min[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) dev_dbg(dev, "pwm[%d] is: 0x%x\n", i, data->pwm[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) dev_dbg(dev, "3 set of Temperatures: =====>\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) for (i = 0; i < 3; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) dev_dbg(dev, "temp1[%d] is: 0x%x\n", i, data->temp1[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) for (i = 0; i < 2; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) for (j = 0; j < 6; j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) dev_dbg(dev, "temp_add[%d][%d] is: 0x%x\n", i, j,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) data->temp_add[i][j]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) for (i = 0; i < 7; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) dev_dbg(dev, "fan_div[%d] is: 0x%x\n", i, data->fan_div[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) dev_dbg(dev, "==========End of the debug message...================\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) dev_dbg(dev, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) module_i2c_driver(w83792d_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) MODULE_AUTHOR("Shane Huang (Winbond)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) MODULE_DESCRIPTION("W83792AD/D driver for linux-2.6");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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