^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * monitoring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Philip Edelbrock <phil@netroedge.com>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * and Mark Studebaker <mdsxyz123@yahoo.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (c) 2007 - 1012 Jean Delvare <jdelvare@suse.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Supports following chips:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * For other winbond chips, and for i2c support in the above chips,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * use w83781d.c.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * Note: automatic ("cruise") fan control for 697, 637 & 627thf not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * supported yet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/hwmon-sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/hwmon-vid.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include "lm75.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static struct platform_device *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define DRVNAME "w83627hf"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct w83627hf_sio_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) enum chips type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int sioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static u8 force_i2c = 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) module_param(force_i2c, byte, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) MODULE_PARM_DESC(force_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) "Initialize the i2c address of the sensors");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static bool init = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) module_param(init, bool, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static unsigned short force_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) module_param(force_id, ushort, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) MODULE_PARM_DESC(force_id, "Override the detected device ID");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /* modified from kernel/include/traps.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define DEV 0x07 /* Register: Logical device select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* logical device numbers for superio_select (below) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define W83627HF_LD_FDC 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define W83627HF_LD_PRT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define W83627HF_LD_UART1 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define W83627HF_LD_UART2 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define W83627HF_LD_KBC 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define W83627HF_LD_CIR 0x06 /* w83627hf only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define W83627HF_LD_GAME 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define W83627HF_LD_MIDI 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define W83627HF_LD_GPIO1 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define W83627HF_LD_GPIO2 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define W83627HF_LD_GPIO3 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define W83627HF_LD_ACPI 0x0a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define W83627HF_LD_HWM 0x0b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define DEVID 0x20 /* Register: Device ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define W83687THF_VID_EN 0x29 /* w83687thf only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define W83687THF_VID_CFG 0xF0 /* w83687thf only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define W83687THF_VID_DATA 0xF1 /* w83687thf only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) superio_outb(struct w83627hf_sio_data *sio, int reg, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) outb(reg, sio->sioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) outb(val, sio->sioaddr + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) superio_inb(struct w83627hf_sio_data *sio, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) outb(reg, sio->sioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return inb(sio->sioaddr + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) superio_select(struct w83627hf_sio_data *sio, int ld)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) outb(DEV, sio->sioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) outb(ld, sio->sioaddr + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) superio_enter(struct w83627hf_sio_data *sio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (!request_muxed_region(sio->sioaddr, 2, DRVNAME))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) outb(0x87, sio->sioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) outb(0x87, sio->sioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) superio_exit(struct w83627hf_sio_data *sio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) outb(0xAA, sio->sioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) release_region(sio->sioaddr, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define W627_DEVID 0x52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define W627THF_DEVID 0x82
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #define W697_DEVID 0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define W637_DEVID 0x70
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define W687THF_DEVID 0x85
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define WINB_ACT_REG 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define WINB_BASE_REG 0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) /* Constants specified below */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) /* Alignment of the base address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define WINB_ALIGNMENT ~7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /* Offset & size of I/O region we are interested in */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define WINB_REGION_OFFSET 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define WINB_REGION_SIZE 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) /* Where are the sensors address/data registers relative to the region offset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define W83781D_ADDR_REG_OFFSET 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #define W83781D_DATA_REG_OFFSET 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) /* The W83781D registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /* The W83782D registers for nr=7,8 are in bank 5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) (0x554 + (((nr) - 7) * 2)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) (0x555 + (((nr) - 7) * 2)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) (0x550 + (nr) - 7))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) /* nr:0-2 for fans:1-3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #define W83627HF_REG_FAN_MIN(nr) (0x3b + (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #define W83627HF_REG_FAN(nr) (0x28 + (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define W83627HF_REG_TEMP2_CONFIG 0x152
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define W83627HF_REG_TEMP3_CONFIG 0x252
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) /* these are zero-based, unlike config constants above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static const u16 w83627hf_reg_temp[] = { 0x27, 0x150, 0x250 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static const u16 w83627hf_reg_temp_hyst[] = { 0x3A, 0x153, 0x253 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) static const u16 w83627hf_reg_temp_over[] = { 0x39, 0x155, 0x255 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #define W83781D_REG_BANK 0x4E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #define W83781D_REG_CONFIG 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #define W83781D_REG_ALARM1 0x459
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #define W83781D_REG_ALARM2 0x45A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #define W83781D_REG_ALARM3 0x45B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #define W83781D_REG_BEEP_CONFIG 0x4D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #define W83781D_REG_BEEP_INTS1 0x56
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #define W83781D_REG_BEEP_INTS2 0x57
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #define W83781D_REG_BEEP_INTS3 0x453
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #define W83781D_REG_VID_FANDIV 0x47
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) #define W83781D_REG_CHIPID 0x49
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #define W83781D_REG_WCHIPID 0x58
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) #define W83781D_REG_CHIPMAN 0x4F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #define W83781D_REG_PIN 0x4B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) #define W83781D_REG_VBAT 0x5D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define W83627HF_REG_PWM1 0x5A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #define W83627HF_REG_PWM2 0x5B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static const u8 W83627THF_REG_PWM_ENABLE[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 0x04, /* FAN 1 mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 0x04, /* FAN 2 mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 0x12, /* FAN AUX mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static const u8 W83627THF_PWM_ENABLE_SHIFT[] = { 2, 4, 1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) #define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) #define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) #define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) #define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) W83627THF_REG_PWM3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) regpwm_627hf[nr] : regpwm[nr])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) #define W83627HF_REG_PWM_FREQ 0x5C /* Only for the 627HF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) #define W83637HF_REG_PWM_FREQ1 0x00 /* 697HF/687THF too */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) #define W83637HF_REG_PWM_FREQ2 0x02 /* 697HF/687THF too */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) #define W83637HF_REG_PWM_FREQ3 0x10 /* 687THF too */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) static const u8 W83637HF_REG_PWM_FREQ[] = { W83637HF_REG_PWM_FREQ1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) W83637HF_REG_PWM_FREQ2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) W83637HF_REG_PWM_FREQ3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) #define W83627HF_BASE_PWM_FREQ 46870
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) #define W83781D_REG_I2C_ADDR 0x48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) #define W83781D_REG_I2C_SUBADDR 0x4A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) /* Sensor selection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) #define W83781D_REG_SCFG1 0x5D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) #define W83781D_REG_SCFG2 0x59
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) #define W83781D_DEFAULT_BETA 3435
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) * Conversions. Limit checking is only done on the TO_REG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) * variants. Note that you should be a bit careful with which arguments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) * these macros are called: arguments may be evaluated more than once.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) * Fixing this is just not worth it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) #define IN_TO_REG(val) (clamp_val((((val) + 8) / 16), 0, 255))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) #define IN_FROM_REG(val) ((val) * 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) static inline u8 FAN_TO_REG(long rpm, int div)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) if (rpm == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) return 255;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) rpm = clamp_val(rpm, 1, 1000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) #define TEMP_MIN (-128000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) #define TEMP_MAX ( 127000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) * TEMP: 0.001C/bit (-128C to +127C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) * REG: 1C/bit, two's complement
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) static u8 TEMP_TO_REG(long temp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) int ntemp = clamp_val(temp, TEMP_MIN, TEMP_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) ntemp += (ntemp < 0 ? -500 : 500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) return (u8)(ntemp / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) static int TEMP_FROM_REG(u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) return (s8)reg * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) #define PWM_TO_REG(val) (clamp_val((val), 0, 255))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) static inline unsigned long pwm_freq_from_reg_627hf(u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) unsigned long freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) freq = W83627HF_BASE_PWM_FREQ >> reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) return freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) static inline u8 pwm_freq_to_reg_627hf(unsigned long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) u8 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) * Only 5 dividers (1 2 4 8 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) * Search for the nearest available frequency
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) for (i = 0; i < 4; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) if (val > (((W83627HF_BASE_PWM_FREQ >> i) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) (W83627HF_BASE_PWM_FREQ >> (i+1))) / 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) static inline unsigned long pwm_freq_from_reg(u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) /* Clock bit 8 -> 180 kHz or 24 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) reg &= 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) /* This should not happen but anyway... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) if (reg == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) reg++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) return clock / (reg << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) static inline u8 pwm_freq_to_reg(unsigned long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) /* Minimum divider value is 0x01 and maximum is 0x7F */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) if (val >= 93750) /* The highest we can do */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) return 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) if (val >= 720) /* Use 24 MHz clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) return 24000000UL / (val << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) if (val < 6) /* The lowest we can do */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) return 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) else /* Use 180 kHz clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) return 0x80 | (180000UL / (val << 8));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) #define BEEP_MASK_FROM_REG(val) ((val) & 0xff7fff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) #define BEEP_MASK_TO_REG(val) ((val) & 0xff7fff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) #define DIV_FROM_REG(val) (1 << (val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) static inline u8 DIV_TO_REG(long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) val = clamp_val(val, 1, 128) >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) for (i = 0; i < 7; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) if (val == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) val >>= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) return (u8)i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) * For each registered chip, we need to keep some data in memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) * The structure is dynamically allocated.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) struct w83627hf_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) unsigned short addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) enum chips type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) struct mutex update_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) char valid; /* !=0 if following fields are valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) unsigned long last_updated; /* In jiffies */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) u8 in[9]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) u8 in_max[9]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) u8 in_min[9]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) u8 fan[3]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) u8 fan_min[3]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) u16 temp[3]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) u16 temp_max[3]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) u16 temp_max_hyst[3]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) u8 fan_div[3]; /* Register encoding, shifted right */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) u8 vid; /* Register encoding, combined */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) u32 alarms; /* Register encoding, combined */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) u32 beep_mask; /* Register encoding, combined */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) u8 pwm[3]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) u8 pwm_enable[3]; /* 1 = manual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) * 2 = thermal cruise (also called SmartFan I)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) * 3 = fan speed cruise
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) u8 pwm_freq[3]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) u16 sens[3]; /* 1 = pentium diode; 2 = 3904 diode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) * 4 = thermistor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) u8 vrm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) /* Remember extra register values over suspend/resume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) u8 scfg1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) u8 scfg2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) static int w83627hf_probe(struct platform_device *pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) static int w83627hf_remove(struct platform_device *pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) static int w83627hf_read_value(struct w83627hf_data *data, u16 reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) static void w83627hf_update_fan_div(struct w83627hf_data *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) static struct w83627hf_data *w83627hf_update_device(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) static void w83627hf_init_device(struct platform_device *pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) static int w83627hf_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) struct w83627hf_data *data = w83627hf_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) data->scfg1 = w83627hf_read_value(data, W83781D_REG_SCFG1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) data->scfg2 = w83627hf_read_value(data, W83781D_REG_SCFG2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) static int w83627hf_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) struct w83627hf_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) int i, num_temps = (data->type == w83697hf) ? 2 : 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) /* Restore limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) for (i = 0; i <= 8; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) /* skip missing sensors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) if (((data->type == w83697hf) && (i == 1)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) ((data->type != w83627hf && data->type != w83697hf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) && (i == 5 || i == 6)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) w83627hf_write_value(data, W83781D_REG_IN_MAX(i),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) data->in_max[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) w83627hf_write_value(data, W83781D_REG_IN_MIN(i),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) data->in_min[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) for (i = 0; i <= 2; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) w83627hf_write_value(data, W83627HF_REG_FAN_MIN(i),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) data->fan_min[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) for (i = 0; i < num_temps; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) w83627hf_write_value(data, w83627hf_reg_temp_over[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) data->temp_max[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) w83627hf_write_value(data, w83627hf_reg_temp_hyst[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) data->temp_max_hyst[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) /* Fixup BIOS bugs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) if (data->type == w83627thf || data->type == w83637hf ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) data->type == w83687thf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) w83627hf_write_value(data, W83627THF_REG_VRM_OVT_CFG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) data->vrm_ovt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) w83627hf_write_value(data, W83781D_REG_SCFG1, data->scfg1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) w83627hf_write_value(data, W83781D_REG_SCFG2, data->scfg2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) /* Force re-reading all values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) data->valid = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) static const struct dev_pm_ops w83627hf_dev_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) .suspend = w83627hf_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) .resume = w83627hf_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) #define W83627HF_DEV_PM_OPS (&w83627hf_dev_pm_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) #define W83627HF_DEV_PM_OPS NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) #endif /* CONFIG_PM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) static struct platform_driver w83627hf_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) .name = DRVNAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) .pm = W83627HF_DEV_PM_OPS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) .probe = w83627hf_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) .remove = w83627hf_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) in_input_show(struct device *dev, struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) int nr = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) struct w83627hf_data *data = w83627hf_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) in_min_show(struct device *dev, struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) int nr = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) struct w83627hf_data *data = w83627hf_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_min[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) in_max_show(struct device *dev, struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) int nr = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) struct w83627hf_data *data = w83627hf_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_max[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) in_min_store(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) int nr = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) struct w83627hf_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) data->in_min[nr] = IN_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) w83627hf_write_value(data, W83781D_REG_IN_MIN(nr), data->in_min[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) in_max_store(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) int nr = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) struct w83627hf_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) data->in_max[nr] = IN_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) w83627hf_write_value(data, W83781D_REG_IN_MAX(nr), data->in_max[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) static SENSOR_DEVICE_ATTR_RO(in1_input, in_input, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) static SENSOR_DEVICE_ATTR_RW(in1_min, in_min, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) static SENSOR_DEVICE_ATTR_RW(in1_max, in_max, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) static SENSOR_DEVICE_ATTR_RO(in2_input, in_input, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) static SENSOR_DEVICE_ATTR_RW(in2_min, in_min, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) static SENSOR_DEVICE_ATTR_RW(in2_max, in_max, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) static SENSOR_DEVICE_ATTR_RO(in3_input, in_input, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) static SENSOR_DEVICE_ATTR_RW(in3_min, in_min, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) static SENSOR_DEVICE_ATTR_RW(in3_max, in_max, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) static SENSOR_DEVICE_ATTR_RO(in4_input, in_input, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) static SENSOR_DEVICE_ATTR_RW(in4_min, in_min, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) static SENSOR_DEVICE_ATTR_RW(in4_max, in_max, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) static SENSOR_DEVICE_ATTR_RO(in5_input, in_input, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) static SENSOR_DEVICE_ATTR_RW(in5_min, in_min, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) static SENSOR_DEVICE_ATTR_RW(in5_max, in_max, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) static SENSOR_DEVICE_ATTR_RO(in6_input, in_input, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) static SENSOR_DEVICE_ATTR_RW(in6_min, in_min, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) static SENSOR_DEVICE_ATTR_RW(in6_max, in_max, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) static SENSOR_DEVICE_ATTR_RO(in7_input, in_input, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) static SENSOR_DEVICE_ATTR_RW(in7_min, in_min, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) static SENSOR_DEVICE_ATTR_RW(in7_max, in_max, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) static SENSOR_DEVICE_ATTR_RO(in8_input, in_input, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) static SENSOR_DEVICE_ATTR_RW(in8_min, in_min, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) static SENSOR_DEVICE_ATTR_RW(in8_max, in_max, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) /* use a different set of functions for in0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) long in0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) if ((data->vrm_ovt & 0x01) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) (w83627thf == data->type || w83637hf == data->type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) || w83687thf == data->type))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) /* use VRM9 calculation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) in0 = (long)((reg * 488 + 70000 + 50) / 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) /* use VRM8 (standard) calculation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) in0 = (long)IN_FROM_REG(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) return sprintf(buf,"%ld\n", in0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) static ssize_t in0_input_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) struct w83627hf_data *data = w83627hf_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) return show_in_0(data, buf, data->in[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) static ssize_t in0_min_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) struct w83627hf_data *data = w83627hf_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) return show_in_0(data, buf, data->in_min[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) static ssize_t in0_max_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) struct w83627hf_data *data = w83627hf_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) return show_in_0(data, buf, data->in_max[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) static ssize_t in0_min_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) struct device_attribute *attr, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) struct w83627hf_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) if ((data->vrm_ovt & 0x01) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) (w83627thf == data->type || w83637hf == data->type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) || w83687thf == data->type))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) /* use VRM9 calculation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) data->in_min[0] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) clamp_val(((val * 100) - 70000 + 244) / 488, 0, 255);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) /* use VRM8 (standard) calculation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) data->in_min[0] = IN_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) w83627hf_write_value(data, W83781D_REG_IN_MIN(0), data->in_min[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) static ssize_t in0_max_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) struct device_attribute *attr, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) struct w83627hf_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) if ((data->vrm_ovt & 0x01) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) (w83627thf == data->type || w83637hf == data->type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) || w83687thf == data->type))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) /* use VRM9 calculation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) data->in_max[0] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) clamp_val(((val * 100) - 70000 + 244) / 488, 0, 255);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) /* use VRM8 (standard) calculation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) data->in_max[0] = IN_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) w83627hf_write_value(data, W83781D_REG_IN_MAX(0), data->in_max[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) static DEVICE_ATTR_RO(in0_input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) static DEVICE_ATTR_RW(in0_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) static DEVICE_ATTR_RW(in0_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) fan_input_show(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) int nr = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) struct w83627hf_data *data = w83627hf_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan[nr],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) (long)DIV_FROM_REG(data->fan_div[nr])));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) fan_min_show(struct device *dev, struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) int nr = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) struct w83627hf_data *data = w83627hf_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan_min[nr],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) (long)DIV_FROM_REG(data->fan_div[nr])));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) fan_min_store(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) int nr = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) struct w83627hf_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) data->fan_min[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) static SENSOR_DEVICE_ATTR_RO(fan1_input, fan_input, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) static SENSOR_DEVICE_ATTR_RW(fan1_min, fan_min, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) static SENSOR_DEVICE_ATTR_RO(fan2_input, fan_input, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) static SENSOR_DEVICE_ATTR_RW(fan2_min, fan_min, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) static SENSOR_DEVICE_ATTR_RO(fan3_input, fan_input, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) static SENSOR_DEVICE_ATTR_RW(fan3_min, fan_min, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) temp_show(struct device *dev, struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) int nr = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) struct w83627hf_data *data = w83627hf_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) u16 tmp = data->temp[nr];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) : (long) TEMP_FROM_REG(tmp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) temp_max_show(struct device *dev, struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) int nr = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) struct w83627hf_data *data = w83627hf_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) u16 tmp = data->temp_max[nr];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) : (long) TEMP_FROM_REG(tmp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) temp_max_hyst_show(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) int nr = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) struct w83627hf_data *data = w83627hf_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) u16 tmp = data->temp_max_hyst[nr];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) : (long) TEMP_FROM_REG(tmp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) temp_max_store(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) int nr = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) struct w83627hf_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) u16 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) data->temp_max[nr] = tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) w83627hf_write_value(data, w83627hf_reg_temp_over[nr], tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) temp_max_hyst_store(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) int nr = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) struct w83627hf_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) u16 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) data->temp_max_hyst[nr] = tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) w83627hf_write_value(data, w83627hf_reg_temp_hyst[nr], tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) static SENSOR_DEVICE_ATTR_RW(temp1_max, temp_max, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) static SENSOR_DEVICE_ATTR_RW(temp1_max_hyst, temp_max_hyst, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) static SENSOR_DEVICE_ATTR_RO(temp2_input, temp, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) static SENSOR_DEVICE_ATTR_RW(temp2_max, temp_max, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) static SENSOR_DEVICE_ATTR_RW(temp2_max_hyst, temp_max_hyst, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) static SENSOR_DEVICE_ATTR_RO(temp3_input, temp, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) static SENSOR_DEVICE_ATTR_RW(temp3_max, temp_max, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) static SENSOR_DEVICE_ATTR_RW(temp3_max_hyst, temp_max_hyst, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) struct w83627hf_data *data = w83627hf_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) static DEVICE_ATTR_RO(cpu0_vid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) vrm_show(struct device *dev, struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) struct w83627hf_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) return sprintf(buf, "%ld\n", (long) data->vrm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) vrm_store(struct device *dev, struct device_attribute *attr, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) struct w83627hf_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) if (val > 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) data->vrm = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) static DEVICE_ATTR_RW(vrm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) alarms_show(struct device *dev, struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) struct w83627hf_data *data = w83627hf_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) return sprintf(buf, "%ld\n", (long) data->alarms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) static DEVICE_ATTR_RO(alarms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) alarm_show(struct device *dev, struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) struct w83627hf_data *data = w83627hf_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) int bitnr = to_sensor_dev_attr(attr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) static SENSOR_DEVICE_ATTR_RO(in0_alarm, alarm, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) static SENSOR_DEVICE_ATTR_RO(in1_alarm, alarm, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) static SENSOR_DEVICE_ATTR_RO(in2_alarm, alarm, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) static SENSOR_DEVICE_ATTR_RO(in3_alarm, alarm, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) static SENSOR_DEVICE_ATTR_RO(in4_alarm, alarm, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) static SENSOR_DEVICE_ATTR_RO(in5_alarm, alarm, 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) static SENSOR_DEVICE_ATTR_RO(in6_alarm, alarm, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) static SENSOR_DEVICE_ATTR_RO(in7_alarm, alarm, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) static SENSOR_DEVICE_ATTR_RO(in8_alarm, alarm, 17);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) static SENSOR_DEVICE_ATTR_RO(fan1_alarm, alarm, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) static SENSOR_DEVICE_ATTR_RO(fan2_alarm, alarm, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) static SENSOR_DEVICE_ATTR_RO(fan3_alarm, alarm, 11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) static SENSOR_DEVICE_ATTR_RO(temp1_alarm, alarm, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) static SENSOR_DEVICE_ATTR_RO(temp2_alarm, alarm, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) static SENSOR_DEVICE_ATTR_RO(temp3_alarm, alarm, 13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) beep_mask_show(struct device *dev, struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) struct w83627hf_data *data = w83627hf_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) return sprintf(buf, "%ld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) (long)BEEP_MASK_FROM_REG(data->beep_mask));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) beep_mask_store(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) struct w83627hf_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) /* preserve beep enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) data->beep_mask = (data->beep_mask & 0x8000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) | BEEP_MASK_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) w83627hf_write_value(data, W83781D_REG_BEEP_INTS1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) data->beep_mask & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) w83627hf_write_value(data, W83781D_REG_BEEP_INTS3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) ((data->beep_mask) >> 16) & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) w83627hf_write_value(data, W83781D_REG_BEEP_INTS2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) (data->beep_mask >> 8) & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) static DEVICE_ATTR_RW(beep_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) beep_show(struct device *dev, struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) struct w83627hf_data *data = w83627hf_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) int bitnr = to_sensor_dev_attr(attr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) beep_store(struct device *dev, struct device_attribute *attr, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) struct w83627hf_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) int bitnr = to_sensor_dev_attr(attr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) unsigned long bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) err = kstrtoul(buf, 10, &bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) if (bit & ~1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) if (bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) data->beep_mask |= (1 << bitnr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) data->beep_mask &= ~(1 << bitnr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) if (bitnr < 8) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) if (bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) reg |= (1 << bitnr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) reg &= ~(1 << bitnr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) w83627hf_write_value(data, W83781D_REG_BEEP_INTS1, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) } else if (bitnr < 16) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) if (bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) reg |= (1 << (bitnr - 8));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) reg &= ~(1 << (bitnr - 8));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) if (bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) reg |= (1 << (bitnr - 16));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) reg &= ~(1 << (bitnr - 16));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) w83627hf_write_value(data, W83781D_REG_BEEP_INTS3, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) static SENSOR_DEVICE_ATTR_RW(in0_beep, beep, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) static SENSOR_DEVICE_ATTR_RW(in1_beep, beep, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) static SENSOR_DEVICE_ATTR_RW(in2_beep, beep, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) static SENSOR_DEVICE_ATTR_RW(in3_beep, beep, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) static SENSOR_DEVICE_ATTR_RW(in4_beep, beep, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) static SENSOR_DEVICE_ATTR_RW(in5_beep, beep, 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) static SENSOR_DEVICE_ATTR_RW(in6_beep, beep, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) static SENSOR_DEVICE_ATTR_RW(in7_beep, beep, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) static SENSOR_DEVICE_ATTR_RW(in8_beep, beep, 17);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) static SENSOR_DEVICE_ATTR_RW(fan1_beep, beep, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) static SENSOR_DEVICE_ATTR_RW(fan2_beep, beep, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) static SENSOR_DEVICE_ATTR_RW(fan3_beep, beep, 11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) static SENSOR_DEVICE_ATTR_RW(temp1_beep, beep, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) static SENSOR_DEVICE_ATTR_RW(temp2_beep, beep, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) static SENSOR_DEVICE_ATTR_RW(temp3_beep, beep, 13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) static SENSOR_DEVICE_ATTR_RW(beep_enable, beep, 15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) fan_div_show(struct device *dev, struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) int nr = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) struct w83627hf_data *data = w83627hf_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) return sprintf(buf, "%ld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) (long) DIV_FROM_REG(data->fan_div[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) * Note: we save and restore the fan minimum here, because its value is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) * determined in part by the fan divisor. This follows the principle of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) * least surprise; the user doesn't expect the fan minimum to change just
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) * because the divisor changed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) fan_div_store(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) int nr = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) struct w83627hf_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) unsigned long min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) /* Save fan_min */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) min = FAN_FROM_REG(data->fan_min[nr],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) DIV_FROM_REG(data->fan_div[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) data->fan_div[nr] = DIV_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) reg = (w83627hf_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) & (nr==0 ? 0xcf : 0x3f))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) w83627hf_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) reg = (w83627hf_read_value(data, W83781D_REG_VBAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) & ~(1 << (5 + nr)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) | ((data->fan_div[nr] & 0x04) << (3 + nr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) w83627hf_write_value(data, W83781D_REG_VBAT, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) /* Restore fan_min */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr), data->fan_min[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) static SENSOR_DEVICE_ATTR_RW(fan1_div, fan_div, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) static SENSOR_DEVICE_ATTR_RW(fan2_div, fan_div, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) static SENSOR_DEVICE_ATTR_RW(fan3_div, fan_div, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) pwm_show(struct device *dev, struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) int nr = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) struct w83627hf_data *data = w83627hf_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) return sprintf(buf, "%ld\n", (long) data->pwm[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) pwm_store(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) int nr = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) struct w83627hf_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) if (data->type == w83627thf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) /* bits 0-3 are reserved in 627THF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) data->pwm[nr] = PWM_TO_REG(val) & 0xf0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) w83627hf_write_value(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) W836X7HF_REG_PWM(data->type, nr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) data->pwm[nr] |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) (w83627hf_read_value(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) data->pwm[nr] = PWM_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) w83627hf_write_value(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) W836X7HF_REG_PWM(data->type, nr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) data->pwm[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) static SENSOR_DEVICE_ATTR_RW(pwm1, pwm, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) static SENSOR_DEVICE_ATTR_RW(pwm2, pwm, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) static SENSOR_DEVICE_ATTR_RW(pwm3, pwm, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) pwm_enable_show(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) int nr = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) struct w83627hf_data *data = w83627hf_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) return sprintf(buf, "%d\n", data->pwm_enable[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) pwm_enable_store(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) int nr = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) struct w83627hf_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) if (!val || val > 3) /* modes 1, 2 and 3 are supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) data->pwm_enable[nr] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) reg = w83627hf_read_value(data, W83627THF_REG_PWM_ENABLE[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) reg &= ~(0x03 << W83627THF_PWM_ENABLE_SHIFT[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) reg |= (val - 1) << W83627THF_PWM_ENABLE_SHIFT[nr];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) w83627hf_write_value(data, W83627THF_REG_PWM_ENABLE[nr], reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) static SENSOR_DEVICE_ATTR_RW(pwm1_enable, pwm_enable, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) static SENSOR_DEVICE_ATTR_RW(pwm2_enable, pwm_enable, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) static SENSOR_DEVICE_ATTR_RW(pwm3_enable, pwm_enable, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) pwm_freq_show(struct device *dev, struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) int nr = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) struct w83627hf_data *data = w83627hf_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) if (data->type == w83627hf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) return sprintf(buf, "%ld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) pwm_freq_from_reg_627hf(data->pwm_freq[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) return sprintf(buf, "%ld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) pwm_freq_from_reg(data->pwm_freq[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) pwm_freq_store(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) int nr = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) struct w83627hf_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) static const u8 mask[]={0xF8, 0x8F};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) if (data->type == w83627hf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) data->pwm_freq[nr] = pwm_freq_to_reg_627hf(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) w83627hf_write_value(data, W83627HF_REG_PWM_FREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) (data->pwm_freq[nr] << (nr*4)) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) (w83627hf_read_value(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) W83627HF_REG_PWM_FREQ) & mask[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) data->pwm_freq[nr] = pwm_freq_to_reg(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) w83627hf_write_value(data, W83637HF_REG_PWM_FREQ[nr],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) data->pwm_freq[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) static SENSOR_DEVICE_ATTR_RW(pwm1_freq, pwm_freq, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) static SENSOR_DEVICE_ATTR_RW(pwm2_freq, pwm_freq, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) static SENSOR_DEVICE_ATTR_RW(pwm3_freq, pwm_freq, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) temp_type_show(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) int nr = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) struct w83627hf_data *data = w83627hf_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) return sprintf(buf, "%ld\n", (long) data->sens[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) temp_type_store(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) int nr = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) struct w83627hf_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) u32 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) switch (val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) case 1: /* PII/Celeron diode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) w83627hf_write_value(data, W83781D_REG_SCFG1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) tmp | BIT_SCFG1[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) w83627hf_write_value(data, W83781D_REG_SCFG2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) tmp | BIT_SCFG2[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) data->sens[nr] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) case 2: /* 3904 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) w83627hf_write_value(data, W83781D_REG_SCFG1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) tmp | BIT_SCFG1[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) w83627hf_write_value(data, W83781D_REG_SCFG2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) tmp & ~BIT_SCFG2[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) data->sens[nr] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) case W83781D_DEFAULT_BETA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) "instead\n", W83781D_DEFAULT_BETA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) case 4: /* thermistor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) w83627hf_write_value(data, W83781D_REG_SCFG1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) tmp & ~BIT_SCFG1[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) data->sens[nr] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) "Invalid sensor type %ld; must be 1, 2, or 4\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) (long) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) static SENSOR_DEVICE_ATTR_RW(temp1_type, temp_type, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) static SENSOR_DEVICE_ATTR_RW(temp2_type, temp_type, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) static SENSOR_DEVICE_ATTR_RW(temp3_type, temp_type, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) name_show(struct device *dev, struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) struct w83627hf_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) return sprintf(buf, "%s\n", data->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) static DEVICE_ATTR_RO(name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) static int __init w83627hf_find(int sioaddr, unsigned short *addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) struct w83627hf_sio_data *sio_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) u16 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) static __initconst char *const names[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) "W83627HF",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) "W83627THF",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) "W83697HF",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) "W83637HF",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) "W83687THF",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) sio_data->sioaddr = sioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) err = superio_enter(sio_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) val = force_id ? force_id : superio_inb(sio_data, DEVID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) switch (val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) case W627_DEVID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) sio_data->type = w83627hf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) case W627THF_DEVID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) sio_data->type = w83627thf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) case W697_DEVID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) sio_data->type = w83697hf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) case W637_DEVID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) sio_data->type = w83637hf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) case W687THF_DEVID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) sio_data->type = w83687thf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) case 0xff: /* No device at all */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%02x)\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) superio_select(sio_data, W83627HF_LD_HWM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) val = (superio_inb(sio_data, WINB_BASE_REG) << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) superio_inb(sio_data, WINB_BASE_REG + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) *addr = val & WINB_ALIGNMENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) if (*addr == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) pr_warn("Base address not set, skipping\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) val = superio_inb(sio_data, WINB_ACT_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) if (!(val & 0x01)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) pr_warn("Enabling HWM logical device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) superio_outb(sio_data, WINB_ACT_REG, val | 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) pr_info(DRVNAME ": Found %s chip at %#x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) names[sio_data->type], *addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) superio_exit(sio_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) #define VIN_UNIT_ATTRS(_X_) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) &sensor_dev_attr_in##_X_##_input.dev_attr.attr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) &sensor_dev_attr_in##_X_##_min.dev_attr.attr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) &sensor_dev_attr_in##_X_##_max.dev_attr.attr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) &sensor_dev_attr_in##_X_##_alarm.dev_attr.attr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) &sensor_dev_attr_in##_X_##_beep.dev_attr.attr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) #define FAN_UNIT_ATTRS(_X_) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) &sensor_dev_attr_fan##_X_##_input.dev_attr.attr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) &sensor_dev_attr_fan##_X_##_min.dev_attr.attr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) &sensor_dev_attr_fan##_X_##_div.dev_attr.attr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) &sensor_dev_attr_fan##_X_##_alarm.dev_attr.attr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) &sensor_dev_attr_fan##_X_##_beep.dev_attr.attr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) #define TEMP_UNIT_ATTRS(_X_) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) &sensor_dev_attr_temp##_X_##_input.dev_attr.attr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) &sensor_dev_attr_temp##_X_##_max.dev_attr.attr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) &sensor_dev_attr_temp##_X_##_max_hyst.dev_attr.attr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) &sensor_dev_attr_temp##_X_##_type.dev_attr.attr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) &sensor_dev_attr_temp##_X_##_alarm.dev_attr.attr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) &sensor_dev_attr_temp##_X_##_beep.dev_attr.attr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) static struct attribute *w83627hf_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) &dev_attr_in0_input.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) &dev_attr_in0_min.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) &dev_attr_in0_max.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) &sensor_dev_attr_in0_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) &sensor_dev_attr_in0_beep.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) VIN_UNIT_ATTRS(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) VIN_UNIT_ATTRS(3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) VIN_UNIT_ATTRS(4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) VIN_UNIT_ATTRS(7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) VIN_UNIT_ATTRS(8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) FAN_UNIT_ATTRS(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) FAN_UNIT_ATTRS(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) TEMP_UNIT_ATTRS(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) TEMP_UNIT_ATTRS(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) &dev_attr_alarms.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) &sensor_dev_attr_beep_enable.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) &dev_attr_beep_mask.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) &sensor_dev_attr_pwm1.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) &sensor_dev_attr_pwm2.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) &dev_attr_name.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) static const struct attribute_group w83627hf_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) .attrs = w83627hf_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) static struct attribute *w83627hf_attributes_opt[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) VIN_UNIT_ATTRS(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) VIN_UNIT_ATTRS(5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) VIN_UNIT_ATTRS(6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) FAN_UNIT_ATTRS(3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) TEMP_UNIT_ATTRS(3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) &sensor_dev_attr_pwm3.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) &sensor_dev_attr_pwm1_freq.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) &sensor_dev_attr_pwm2_freq.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) &sensor_dev_attr_pwm3_freq.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) &sensor_dev_attr_pwm1_enable.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) &sensor_dev_attr_pwm2_enable.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) &sensor_dev_attr_pwm3_enable.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) static const struct attribute_group w83627hf_group_opt = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) .attrs = w83627hf_attributes_opt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) static int w83627hf_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) struct w83627hf_sio_data *sio_data = dev_get_platdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) struct w83627hf_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) int err, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) static const char *names[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) "w83627hf",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) "w83627thf",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) "w83697hf",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) "w83637hf",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) "w83687thf",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) res = platform_get_resource(pdev, IORESOURCE_IO, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) if (!devm_request_region(dev, res->start, WINB_REGION_SIZE, DRVNAME)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) (unsigned long)res->start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) (unsigned long)(res->start + WINB_REGION_SIZE - 1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) data = devm_kzalloc(dev, sizeof(struct w83627hf_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) data->addr = res->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) data->type = sio_data->type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) data->name = names[sio_data->type];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) mutex_init(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) mutex_init(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) platform_set_drvdata(pdev, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) /* Initialize the chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) w83627hf_init_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) /* A few vars need to be filled upon startup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) for (i = 0; i <= 2; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) data->fan_min[i] = w83627hf_read_value(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) data, W83627HF_REG_FAN_MIN(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) w83627hf_update_fan_div(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) /* Register common device attributes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) err = sysfs_create_group(&dev->kobj, &w83627hf_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) /* Register chip-specific device attributes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) if (data->type == w83627hf || data->type == w83697hf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) if ((err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) &sensor_dev_attr_in5_input.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) &sensor_dev_attr_in5_min.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) &sensor_dev_attr_in5_max.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) &sensor_dev_attr_in5_alarm.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) &sensor_dev_attr_in5_beep.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) &sensor_dev_attr_in6_input.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) &sensor_dev_attr_in6_min.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) &sensor_dev_attr_in6_max.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) &sensor_dev_attr_in6_alarm.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) &sensor_dev_attr_in6_beep.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) &sensor_dev_attr_pwm1_freq.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) &sensor_dev_attr_pwm2_freq.dev_attr)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) if (data->type != w83697hf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) if ((err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) &sensor_dev_attr_in1_input.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) &sensor_dev_attr_in1_min.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) &sensor_dev_attr_in1_max.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) &sensor_dev_attr_in1_alarm.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) &sensor_dev_attr_in1_beep.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) &sensor_dev_attr_fan3_input.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) &sensor_dev_attr_fan3_min.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) &sensor_dev_attr_fan3_div.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) &sensor_dev_attr_fan3_alarm.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) &sensor_dev_attr_fan3_beep.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) &sensor_dev_attr_temp3_input.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) &sensor_dev_attr_temp3_max.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) &sensor_dev_attr_temp3_max_hyst.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) &sensor_dev_attr_temp3_alarm.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) &sensor_dev_attr_temp3_beep.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) &sensor_dev_attr_temp3_type.dev_attr)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) if (data->type != w83697hf && data->vid != 0xff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) /* Convert VID to voltage based on VRM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) data->vrm = vid_which_vrm();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) if ((err = device_create_file(dev, &dev_attr_cpu0_vid))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) || (err = device_create_file(dev, &dev_attr_vrm)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) if (data->type == w83627thf || data->type == w83637hf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) || data->type == w83687thf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) err = device_create_file(dev, &sensor_dev_attr_pwm3.dev_attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) if (data->type == w83637hf || data->type == w83687thf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) if ((err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) &sensor_dev_attr_pwm1_freq.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) &sensor_dev_attr_pwm2_freq.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) &sensor_dev_attr_pwm3_freq.dev_attr)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) if (data->type != w83627hf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) if ((err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) &sensor_dev_attr_pwm1_enable.dev_attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) || (err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) &sensor_dev_attr_pwm2_enable.dev_attr)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) if (data->type == w83627thf || data->type == w83637hf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) || data->type == w83687thf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) err = device_create_file(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) &sensor_dev_attr_pwm3_enable.dev_attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) data->hwmon_dev = hwmon_device_register(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) if (IS_ERR(data->hwmon_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) err = PTR_ERR(data->hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) sysfs_remove_group(&dev->kobj, &w83627hf_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) sysfs_remove_group(&dev->kobj, &w83627hf_group_opt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) static int w83627hf_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) struct w83627hf_data *data = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) hwmon_device_unregister(data->hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group_opt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) /* Registers 0x50-0x5f are banked */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) static inline void w83627hf_set_bank(struct w83627hf_data *data, u16 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) if ((reg & 0x00f0) == 0x50) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) outb_p(reg >> 8, data->addr + W83781D_DATA_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) /* Not strictly necessary, but play it safe for now */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) static inline void w83627hf_reset_bank(struct w83627hf_data *data, u16 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) if (reg & 0xff00) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) outb_p(0, data->addr + W83781D_DATA_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) static int w83627hf_read_value(struct w83627hf_data *data, u16 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) int res, word_sized;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) word_sized = (((reg & 0xff00) == 0x100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) || ((reg & 0xff00) == 0x200))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) && (((reg & 0x00ff) == 0x50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) || ((reg & 0x00ff) == 0x53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) || ((reg & 0x00ff) == 0x55));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) w83627hf_set_bank(data, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) res = inb_p(data->addr + W83781D_DATA_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) if (word_sized) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) outb_p((reg & 0xff) + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) data->addr + W83781D_ADDR_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) res =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) (res << 8) + inb_p(data->addr +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) W83781D_DATA_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) w83627hf_reset_bank(data, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) static int w83627thf_read_gpio5(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) struct w83627hf_sio_data *sio_data = dev_get_platdata(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) int res = 0xff, sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) if (superio_enter(sio_data)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) * Some other driver reserved the address space for itself.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) * We don't want to fail driver instantiation because of that,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) * so display a warning and keep going.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) dev_warn(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) "Can not read VID data: Failed to enable SuperIO access\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) superio_select(sio_data, W83627HF_LD_GPIO5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) res = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) /* Make sure these GPIO pins are enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) if (!(superio_inb(sio_data, W83627THF_GPIO5_EN) & (1<<3))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) * Make sure the pins are configured for input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) * There must be at least five (VRM 9), and possibly 6 (VRM 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) sel = superio_inb(sio_data, W83627THF_GPIO5_IOSR) & 0x3f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) if ((sel & 0x1f) != 0x1f) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) dev_dbg(&pdev->dev, "GPIO5 not configured for VID "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) "function\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) dev_info(&pdev->dev, "Reading VID from GPIO5\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) res = superio_inb(sio_data, W83627THF_GPIO5_DR) & sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) superio_exit(sio_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) static int w83687thf_read_vid(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) struct w83627hf_sio_data *sio_data = dev_get_platdata(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) int res = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) if (superio_enter(sio_data)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) * Some other driver reserved the address space for itself.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) * We don't want to fail driver instantiation because of that,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) * so display a warning and keep going.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) dev_warn(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) "Can not read VID data: Failed to enable SuperIO access\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) superio_select(sio_data, W83627HF_LD_HWM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) /* Make sure these GPIO pins are enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) if (!(superio_inb(sio_data, W83687THF_VID_EN) & (1 << 2))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) dev_dbg(&pdev->dev, "VID disabled, no VID function\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) /* Make sure the pins are configured for input */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) if (!(superio_inb(sio_data, W83687THF_VID_CFG) & (1 << 4))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) dev_dbg(&pdev->dev, "VID configured as output, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) "no VID function\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) res = superio_inb(sio_data, W83687THF_VID_DATA) & 0x3f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) superio_exit(sio_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) int word_sized;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) word_sized = (((reg & 0xff00) == 0x100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) || ((reg & 0xff00) == 0x200))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) && (((reg & 0x00ff) == 0x53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) || ((reg & 0x00ff) == 0x55));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) w83627hf_set_bank(data, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) if (word_sized) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) outb_p(value >> 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) data->addr + W83781D_DATA_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) outb_p((reg & 0xff) + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) data->addr + W83781D_ADDR_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) outb_p(value & 0xff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) data->addr + W83781D_DATA_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) w83627hf_reset_bank(data, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) static void w83627hf_init_device(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) struct w83627hf_data *data = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) enum chips type = data->type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) u8 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) /* Minimize conflicts with other winbond i2c-only clients... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) /* disable i2c subclients... how to disable main i2c client?? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) /* force i2c address to relatively uncommon address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) if (type == w83627hf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) w83627hf_write_value(data, W83781D_REG_I2C_SUBADDR, 0x89);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) w83627hf_write_value(data, W83781D_REG_I2C_ADDR, force_i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) /* Read VID only once */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) if (type == w83627hf || type == w83637hf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) int lo = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) int hi = w83627hf_read_value(data, W83781D_REG_CHIPID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) } else if (type == w83627thf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) data->vid = w83627thf_read_gpio5(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) } else if (type == w83687thf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) data->vid = w83687thf_read_vid(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) /* Read VRM & OVT Config only once */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) if (type == w83627thf || type == w83637hf || type == w83687thf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) data->vrm_ovt =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) w83627hf_read_value(data, W83627THF_REG_VRM_OVT_CFG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) for (i = 1; i <= 3; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) if (!(tmp & BIT_SCFG1[i - 1])) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) data->sens[i - 1] = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) if (w83627hf_read_value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) (data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) data->sens[i - 1] = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) data->sens[i - 1] = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) if ((type == w83697hf) && (i == 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) if(init) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) /* Enable temp2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) tmp = w83627hf_read_value(data, W83627HF_REG_TEMP2_CONFIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) if (tmp & 0x01) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) dev_warn(&pdev->dev, "Enabling temp2, readings "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) "might not make sense\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) w83627hf_write_value(data, W83627HF_REG_TEMP2_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) tmp & 0xfe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) /* Enable temp3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) if (type != w83697hf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) tmp = w83627hf_read_value(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) W83627HF_REG_TEMP3_CONFIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) if (tmp & 0x01) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) dev_warn(&pdev->dev, "Enabling temp3, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) "readings might not make sense\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) w83627hf_write_value(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) W83627HF_REG_TEMP3_CONFIG, tmp & 0xfe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) /* Start monitoring */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) w83627hf_write_value(data, W83781D_REG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) (w83627hf_read_value(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) W83781D_REG_CONFIG) & 0xf7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) | 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) /* Enable VBAT monitoring if needed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) tmp = w83627hf_read_value(data, W83781D_REG_VBAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) if (!(tmp & 0x01))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) w83627hf_write_value(data, W83781D_REG_VBAT, tmp | 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) static void w83627hf_update_fan_div(struct w83627hf_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) reg = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) data->fan_div[0] = (reg >> 4) & 0x03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) data->fan_div[1] = (reg >> 6) & 0x03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) if (data->type != w83697hf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) data->fan_div[2] = (w83627hf_read_value(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) W83781D_REG_PIN) >> 6) & 0x03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) reg = w83627hf_read_value(data, W83781D_REG_VBAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) data->fan_div[0] |= (reg >> 3) & 0x04;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) data->fan_div[1] |= (reg >> 4) & 0x04;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) if (data->type != w83697hf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) data->fan_div[2] |= (reg >> 5) & 0x04;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) static struct w83627hf_data *w83627hf_update_device(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) struct w83627hf_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) int i, num_temps = (data->type == w83697hf) ? 2 : 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) int num_pwms = (data->type == w83697hf) ? 2 : 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) || !data->valid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) for (i = 0; i <= 8; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) /* skip missing sensors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) if (((data->type == w83697hf) && (i == 1)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) ((data->type != w83627hf && data->type != w83697hf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) && (i == 5 || i == 6)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) data->in[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) w83627hf_read_value(data, W83781D_REG_IN(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) data->in_min[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) w83627hf_read_value(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) W83781D_REG_IN_MIN(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) data->in_max[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) w83627hf_read_value(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845) W83781D_REG_IN_MAX(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) for (i = 0; i <= 2; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) data->fan[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) w83627hf_read_value(data, W83627HF_REG_FAN(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) data->fan_min[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) w83627hf_read_value(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) W83627HF_REG_FAN_MIN(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) for (i = 0; i <= 2; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) u8 tmp = w83627hf_read_value(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) W836X7HF_REG_PWM(data->type, i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) /* bits 0-3 are reserved in 627THF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) if (data->type == w83627thf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) tmp &= 0xf0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) data->pwm[i] = tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) if (i == 1 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) (data->type == w83627hf || data->type == w83697hf))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) if (data->type == w83627hf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) u8 tmp = w83627hf_read_value(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) W83627HF_REG_PWM_FREQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) data->pwm_freq[0] = tmp & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) data->pwm_freq[1] = (tmp >> 4) & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870) } else if (data->type != w83627thf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) for (i = 1; i <= 3; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) data->pwm_freq[i - 1] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) w83627hf_read_value(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) W83637HF_REG_PWM_FREQ[i - 1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) if (i == 2 && (data->type == w83697hf))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) if (data->type != w83627hf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) for (i = 0; i < num_pwms; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) u8 tmp = w83627hf_read_value(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) W83627THF_REG_PWM_ENABLE[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) data->pwm_enable[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) ((tmp >> W83627THF_PWM_ENABLE_SHIFT[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) & 0x03) + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) for (i = 0; i < num_temps; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) data->temp[i] = w83627hf_read_value(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) data, w83627hf_reg_temp[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) data->temp_max[i] = w83627hf_read_value(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) data, w83627hf_reg_temp_over[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) data->temp_max_hyst[i] = w83627hf_read_value(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) data, w83627hf_reg_temp_hyst[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) w83627hf_update_fan_div(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) data->alarms =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) w83627hf_read_value(data, W83781D_REG_ALARM1) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) (w83627hf_read_value(data, W83781D_REG_ALARM2) << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) (w83627hf_read_value(data, W83781D_REG_ALARM3) << 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) i = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) data->beep_mask = (i << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) w83627hf_read_value(data, W83781D_REG_BEEP_INTS1) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) w83627hf_read_value(data, W83781D_REG_BEEP_INTS3) << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) data->last_updated = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) data->valid = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) return data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) static int __init w83627hf_device_add(unsigned short address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) const struct w83627hf_sio_data *sio_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) struct resource res = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) .start = address + WINB_REGION_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) .end = address + WINB_REGION_OFFSET + WINB_REGION_SIZE - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) .name = DRVNAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) .flags = IORESOURCE_IO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) err = acpi_check_resource_conflict(&res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) pdev = platform_device_alloc(DRVNAME, address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) if (!pdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) err = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) pr_err("Device allocation failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) err = platform_device_add_resources(pdev, &res, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) pr_err("Device resource addition failed (%d)\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) goto exit_device_put;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) err = platform_device_add_data(pdev, sio_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) sizeof(struct w83627hf_sio_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) pr_err("Platform data allocation failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) goto exit_device_put;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951) err = platform_device_add(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953) pr_err("Device addition failed (%d)\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) goto exit_device_put;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) exit_device_put:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) platform_device_put(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) static int __init sensors_w83627hf_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) unsigned short address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) struct w83627hf_sio_data sio_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) if (w83627hf_find(0x2e, &address, &sio_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) && w83627hf_find(0x4e, &address, &sio_data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) err = platform_driver_register(&w83627hf_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) /* Sets global pdev as a side effect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) err = w83627hf_device_add(address, &sio_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) goto exit_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986) exit_driver:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) platform_driver_unregister(&w83627hf_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992) static void __exit sensors_w83627hf_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) platform_device_unregister(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) platform_driver_unregister(&w83627hf_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) "Philip Edelbrock <phil@netroedge.com>, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) "and Mark Studebaker <mdsxyz123@yahoo.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) MODULE_DESCRIPTION("W83627HF driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) module_init(sensors_w83627hf_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) module_exit(sensors_w83627hf_exit);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags