Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /* tmp421.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (C) 2009 Andre Prendel <andre.prendel@gmx.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Preliminary support by:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Melvin Rook, Raymond Ng
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * Driver for the Texas Instruments TMP421 SMBus temperature sensor IC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * Supported models: TMP421, TMP422, TMP423, TMP441, TMP442
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/hwmon-sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) /* Addresses to scan */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) static const unsigned short normal_i2c[] = { 0x2a, 0x4c, 0x4d, 0x4e, 0x4f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 					     I2C_CLIENT_END };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) enum chips { tmp421, tmp422, tmp423, tmp441, tmp442 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) /* The TMP421 registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define TMP421_STATUS_REG			0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define TMP421_CONFIG_REG_1			0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define TMP421_CONVERSION_RATE_REG		0x0B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define TMP421_MANUFACTURER_ID_REG		0xFE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define TMP421_DEVICE_ID_REG			0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) static const u8 TMP421_TEMP_MSB[4]		= { 0x00, 0x01, 0x02, 0x03 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) static const u8 TMP421_TEMP_LSB[4]		= { 0x10, 0x11, 0x12, 0x13 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) /* Flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define TMP421_CONFIG_SHUTDOWN			0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define TMP421_CONFIG_RANGE			0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) /* Manufacturer / Device ID's */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define TMP421_MANUFACTURER_ID			0x55
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define TMP421_DEVICE_ID			0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define TMP422_DEVICE_ID			0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define TMP423_DEVICE_ID			0x23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define TMP441_DEVICE_ID			0x41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define TMP442_DEVICE_ID			0x42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) static const struct i2c_device_id tmp421_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	{ "tmp421", 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	{ "tmp422", 3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	{ "tmp423", 4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	{ "tmp441", 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	{ "tmp442", 3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) MODULE_DEVICE_TABLE(i2c, tmp421_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) static const struct of_device_id __maybe_unused tmp421_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		.compatible = "ti,tmp421",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		.data = (void *)2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		.compatible = "ti,tmp422",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		.data = (void *)3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		.compatible = "ti,tmp423",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		.data = (void *)4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		.compatible = "ti,tmp441",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		.data = (void *)2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		.compatible = "ti,tmp442",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		.data = (void *)3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) MODULE_DEVICE_TABLE(of, tmp421_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) struct tmp421_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	struct mutex update_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	u32 temp_config[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	struct hwmon_channel_info temp_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	const struct hwmon_channel_info *info[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	struct hwmon_chip_info chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	char valid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	unsigned long last_updated;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	unsigned long channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	u8 config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	s16 temp[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static int temp_from_raw(u16 reg, bool extended)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	/* Mask out status bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	int temp = reg & ~0xf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	if (extended)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		temp = temp - 64 * 256;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		temp = (s16)temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	return DIV_ROUND_CLOSEST(temp * 1000, 256);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static int tmp421_update_device(struct tmp421_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	if (time_after(jiffies, data->last_updated + (HZ / 2)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	    !data->valid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 		ret = i2c_smbus_read_byte_data(client, TMP421_CONFIG_REG_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 			goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		data->config = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		for (i = 0; i < data->channels; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 			ret = i2c_smbus_read_byte_data(client, TMP421_TEMP_MSB[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 			if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 				goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 			data->temp[i] = ret << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 			ret = i2c_smbus_read_byte_data(client, TMP421_TEMP_LSB[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 			if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 				goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 			data->temp[i] |= ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		data->last_updated = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		data->valid = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		data->valid = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static int tmp421_read(struct device *dev, enum hwmon_sensor_types type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		       u32 attr, int channel, long *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	struct tmp421_data *tmp421 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	ret = tmp421_update_device(tmp421);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	switch (attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	case hwmon_temp_input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		*val = temp_from_raw(tmp421->temp[channel],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 				     tmp421->config & TMP421_CONFIG_RANGE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	case hwmon_temp_fault:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		 * Any of OPEN or /PVLD bits indicate a hardware mulfunction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		 * and the conversion result may be incorrect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		*val = !!(tmp421->temp[channel] & 0x03);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static umode_t tmp421_is_visible(const void *data, enum hwmon_sensor_types type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 				 u32 attr, int channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	switch (attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	case hwmon_temp_fault:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	case hwmon_temp_input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		return 0444;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static int tmp421_init_client(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	int config, config_orig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	/* Set the conversion rate to 2 Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	i2c_smbus_write_byte_data(client, TMP421_CONVERSION_RATE_REG, 0x05);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	/* Start conversions (disable shutdown if necessary) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	config = i2c_smbus_read_byte_data(client, TMP421_CONFIG_REG_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	if (config < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 			"Could not read configuration register (%d)\n", config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		return config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	config_orig = config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	config &= ~TMP421_CONFIG_SHUTDOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	if (config != config_orig) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		dev_info(&client->dev, "Enable monitoring chip\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		i2c_smbus_write_byte_data(client, TMP421_CONFIG_REG_1, config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static int tmp421_detect(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 			 struct i2c_board_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	enum chips kind;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	struct i2c_adapter *adapter = client->adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	static const char * const names[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		"TMP421", "TMP422", "TMP423",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		"TMP441", "TMP442"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	int addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	reg = i2c_smbus_read_byte_data(client, TMP421_MANUFACTURER_ID_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	if (reg != TMP421_MANUFACTURER_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	reg = i2c_smbus_read_byte_data(client, TMP421_CONVERSION_RATE_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	if (reg & 0xf8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	reg = i2c_smbus_read_byte_data(client, TMP421_STATUS_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	if (reg & 0x7f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	reg = i2c_smbus_read_byte_data(client, TMP421_DEVICE_ID_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	case TMP421_DEVICE_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		kind = tmp421;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	case TMP422_DEVICE_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		if (addr == 0x2a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 			return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 		kind = tmp422;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	case TMP423_DEVICE_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 		if (addr != 0x4c && addr != 0x4d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 			return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		kind = tmp423;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	case TMP441_DEVICE_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		kind = tmp441;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	case TMP442_DEVICE_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		if (addr != 0x4c && addr != 0x4d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 			return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		kind = tmp442;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	strlcpy(info->type, tmp421_id[kind].name, I2C_NAME_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	dev_info(&adapter->dev, "Detected TI %s chip at 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		 names[kind], client->addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) static const struct hwmon_ops tmp421_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	.is_visible = tmp421_is_visible,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	.read = tmp421_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) static int tmp421_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	struct tmp421_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	int i, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	data = devm_kzalloc(dev, sizeof(struct tmp421_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	mutex_init(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	if (client->dev.of_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 		data->channels = (unsigned long)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 			of_device_get_match_data(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 		data->channels = i2c_match_id(tmp421_id, client)->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	err = tmp421_init_client(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	for (i = 0; i < data->channels; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 		data->temp_config[i] = HWMON_T_INPUT | HWMON_T_FAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	data->chip.ops = &tmp421_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	data->chip.info = data->info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	data->info[0] = &data->temp_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	data->temp_info.type = hwmon_temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	data->temp_info.config = data->temp_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 							 data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 							 &data->chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 							 NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	return PTR_ERR_OR_ZERO(hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) static struct i2c_driver tmp421_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	.class = I2C_CLASS_HWMON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 		.name	= "tmp421",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 		.of_match_table = of_match_ptr(tmp421_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	.probe_new = tmp421_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	.id_table = tmp421_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	.detect = tmp421_detect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	.address_list = normal_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) module_i2c_driver(tmp421_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) MODULE_AUTHOR("Andre Prendel <andre.prendel@gmx.de>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) MODULE_DESCRIPTION("Texas Instruments TMP421/422/423/441/442 temperature sensor driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) MODULE_LICENSE("GPL");