^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* tmp401.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2007,2008 Hans de Goede <hdegoede@redhat.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Preliminary tmp411 support by:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Gabriel Konat, Sander Leget, Wouter Willems
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2009 Andre Prendel <andre.prendel@gmx.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Cleanup and support for TMP431 and TMP432 by Guenter Roeck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Copyright (c) 2013 Guenter Roeck <linux@roeck-us.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * Driver for the Texas Instruments TMP401 SMBUS temperature sensor IC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * Note this IC is in some aspect similar to the LM90, but it has quite a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * few differences too, for example the local temp has a higher resolution
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * and thus has 16 bits registers for its value and limit instead of 8 bits.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/hwmon-sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /* Addresses to scan */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4c, 0x4d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 0x4e, 0x4f, I2C_CLIENT_END };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) enum chips { tmp401, tmp411, tmp431, tmp432, tmp435, tmp461 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * The TMP401 registers, note some registers have different addresses for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * reading and writing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define TMP401_STATUS 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define TMP401_CONFIG_READ 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define TMP401_CONFIG_WRITE 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define TMP401_CONVERSION_RATE_READ 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define TMP401_CONVERSION_RATE_WRITE 0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define TMP401_TEMP_CRIT_HYST 0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define TMP401_MANUFACTURER_ID_REG 0xFE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define TMP401_DEVICE_ID_REG 0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static const u8 TMP401_TEMP_MSB_READ[7][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) { 0x00, 0x01 }, /* temp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) { 0x06, 0x08 }, /* low limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) { 0x05, 0x07 }, /* high limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) { 0x20, 0x19 }, /* therm (crit) limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) { 0x30, 0x34 }, /* lowest */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) { 0x32, 0x36 }, /* highest */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) { 0, 0x11 }, /* offset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static const u8 TMP401_TEMP_MSB_WRITE[7][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) { 0, 0 }, /* temp (unused) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) { 0x0C, 0x0E }, /* low limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) { 0x0B, 0x0D }, /* high limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) { 0x20, 0x19 }, /* therm (crit) limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) { 0x30, 0x34 }, /* lowest */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) { 0x32, 0x36 }, /* highest */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) { 0, 0x11 }, /* offset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static const u8 TMP432_TEMP_MSB_READ[4][3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) { 0x00, 0x01, 0x23 }, /* temp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) { 0x06, 0x08, 0x16 }, /* low limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) { 0x05, 0x07, 0x15 }, /* high limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) { 0x20, 0x19, 0x1A }, /* therm (crit) limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static const u8 TMP432_TEMP_MSB_WRITE[4][3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) { 0, 0, 0 }, /* temp - unused */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) { 0x0C, 0x0E, 0x16 }, /* low limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) { 0x0B, 0x0D, 0x15 }, /* high limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) { 0x20, 0x19, 0x1A }, /* therm (crit) limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /* [0] = fault, [1] = low, [2] = high, [3] = therm/crit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static const u8 TMP432_STATUS_REG[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) 0x1b, 0x36, 0x35, 0x37 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /* Flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define TMP401_CONFIG_RANGE BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define TMP401_CONFIG_SHUTDOWN BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define TMP401_STATUS_LOCAL_CRIT BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define TMP401_STATUS_REMOTE_CRIT BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define TMP401_STATUS_REMOTE_OPEN BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define TMP401_STATUS_REMOTE_LOW BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define TMP401_STATUS_REMOTE_HIGH BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define TMP401_STATUS_LOCAL_LOW BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define TMP401_STATUS_LOCAL_HIGH BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /* On TMP432, each status has its own register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define TMP432_STATUS_LOCAL BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define TMP432_STATUS_REMOTE1 BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define TMP432_STATUS_REMOTE2 BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /* Manufacturer / Device ID's */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define TMP401_MANUFACTURER_ID 0x55
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define TMP401_DEVICE_ID 0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define TMP411A_DEVICE_ID 0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define TMP411B_DEVICE_ID 0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define TMP411C_DEVICE_ID 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define TMP431_DEVICE_ID 0x31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define TMP432_DEVICE_ID 0x32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define TMP435_DEVICE_ID 0x35
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * Driver data (common to all clients)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static const struct i2c_device_id tmp401_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) { "tmp401", tmp401 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) { "tmp411", tmp411 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) { "tmp431", tmp431 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) { "tmp432", tmp432 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) { "tmp435", tmp435 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) { "tmp461", tmp461 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) MODULE_DEVICE_TABLE(i2c, tmp401_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * Client data (each client gets its own)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) struct tmp401_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) const struct attribute_group *groups[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct mutex update_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) char valid; /* zero until following fields are valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) unsigned long last_updated; /* in jiffies */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) enum chips kind;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) unsigned int update_interval; /* in milliseconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /* register values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) u8 status[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) u8 config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) u16 temp[7][3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) u8 temp_crit_hyst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * Sysfs attr show / store functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static int tmp401_register_to_temp(u16 reg, u8 config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) int temp = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) if (config & TMP401_CONFIG_RANGE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) temp -= 64 * 256;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return DIV_ROUND_CLOSEST(temp * 125, 32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static u16 tmp401_temp_to_register(long temp, u8 config, int zbits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if (config & TMP401_CONFIG_RANGE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) temp = clamp_val(temp, -64000, 191000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) temp += 64000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) temp = clamp_val(temp, 0, 127000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) return DIV_ROUND_CLOSEST(temp * (1 << (8 - zbits)), 1000) << zbits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) static int tmp401_update_device_reg16(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) struct tmp401_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) int i, j, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) int num_regs = data->kind == tmp411 ? 6 : 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) int num_sensors = data->kind == tmp432 ? 3 : 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) for (i = 0; i < num_sensors; i++) { /* local / r1 / r2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) for (j = 0; j < num_regs; j++) { /* temp / low / ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) u8 regaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) regaddr = data->kind == tmp432 ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) TMP432_TEMP_MSB_READ[j][i] :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) TMP401_TEMP_MSB_READ[j][i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (j == 3) { /* crit is msb only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) val = i2c_smbus_read_byte_data(client, regaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) val = i2c_smbus_read_word_swapped(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) regaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) if (val < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) data->temp[j][i] = j == 3 ? val << 8 : val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static struct tmp401_data *tmp401_update_device(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) struct tmp401_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) struct tmp401_data *ret = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) int i, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) unsigned long next_update;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) next_update = data->last_updated +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) msecs_to_jiffies(data->update_interval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) if (time_after(jiffies, next_update) || !data->valid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) if (data->kind != tmp432) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) * The driver uses the TMP432 status format internally.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) * Convert status to TMP432 format for other chips.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) val = i2c_smbus_read_byte_data(client, TMP401_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) if (val < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) ret = ERR_PTR(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) goto abort;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) data->status[0] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) (val & TMP401_STATUS_REMOTE_OPEN) >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) data->status[1] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) ((val & TMP401_STATUS_REMOTE_LOW) >> 2) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) ((val & TMP401_STATUS_LOCAL_LOW) >> 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) data->status[2] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) ((val & TMP401_STATUS_REMOTE_HIGH) >> 3) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) ((val & TMP401_STATUS_LOCAL_HIGH) >> 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) data->status[3] = val & (TMP401_STATUS_LOCAL_CRIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) | TMP401_STATUS_REMOTE_CRIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) for (i = 0; i < ARRAY_SIZE(data->status); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) val = i2c_smbus_read_byte_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) TMP432_STATUS_REG[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) if (val < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) ret = ERR_PTR(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) goto abort;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) data->status[i] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) val = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (val < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) ret = ERR_PTR(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) goto abort;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) data->config = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) val = tmp401_update_device_reg16(client, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) if (val < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) ret = ERR_PTR(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) goto abort;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) val = i2c_smbus_read_byte_data(client, TMP401_TEMP_CRIT_HYST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) if (val < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) ret = ERR_PTR(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) goto abort;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) data->temp_crit_hyst = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) data->last_updated = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) data->valid = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) abort:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) static ssize_t temp_show(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) int nr = to_sensor_dev_attr_2(devattr)->nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) int index = to_sensor_dev_attr_2(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) struct tmp401_data *data = tmp401_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) if (IS_ERR(data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) return PTR_ERR(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) return sprintf(buf, "%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) tmp401_register_to_temp(data->temp[nr][index], data->config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) static ssize_t temp_crit_hyst_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) int temp, index = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) struct tmp401_data *data = tmp401_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) if (IS_ERR(data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) return PTR_ERR(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) temp = tmp401_register_to_temp(data->temp[3][index], data->config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) temp -= data->temp_crit_hyst * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) return sprintf(buf, "%d\n", temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) static ssize_t status_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) int nr = to_sensor_dev_attr_2(devattr)->nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) int mask = to_sensor_dev_attr_2(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) struct tmp401_data *data = tmp401_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) if (IS_ERR(data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) return PTR_ERR(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) return sprintf(buf, "%d\n", !!(data->status[nr] & mask));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) static ssize_t temp_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) struct device_attribute *devattr, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) int nr = to_sensor_dev_attr_2(devattr)->nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) int index = to_sensor_dev_attr_2(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) struct tmp401_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) u16 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) u8 regaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) if (kstrtol(buf, 10, &val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) reg = tmp401_temp_to_register(val, data->config, nr == 3 ? 8 : 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) regaddr = data->kind == tmp432 ? TMP432_TEMP_MSB_WRITE[nr][index]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) : TMP401_TEMP_MSB_WRITE[nr][index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) if (nr == 3) { /* crit is msb only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) i2c_smbus_write_byte_data(client, regaddr, reg >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) /* Hardware expects big endian data --> use _swapped */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) i2c_smbus_write_word_swapped(client, regaddr, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) data->temp[nr][index] = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) static ssize_t temp_crit_hyst_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) int temp, index = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) struct tmp401_data *data = tmp401_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (IS_ERR(data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) return PTR_ERR(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) if (kstrtol(buf, 10, &val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) if (data->config & TMP401_CONFIG_RANGE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) val = clamp_val(val, -64000, 191000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) val = clamp_val(val, 0, 127000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) temp = tmp401_register_to_temp(data->temp[3][index], data->config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) val = clamp_val(val, temp - 255000, temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) reg = ((temp - val) + 500) / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) i2c_smbus_write_byte_data(data->client, TMP401_TEMP_CRIT_HYST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) data->temp_crit_hyst = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) * Resets the historical measurements of minimum and maximum temperatures.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) * This is done by writing any value to any of the minimum/maximum registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) * (0x30-0x37).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) static ssize_t reset_temp_history_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) struct tmp401_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) if (kstrtol(buf, 10, &val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) if (val != 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) "temp_reset_history value %ld not supported. Use 1 to reset the history!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) i2c_smbus_write_byte_data(client, TMP401_TEMP_MSB_WRITE[5][0], val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) data->valid = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) static ssize_t update_interval_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) struct tmp401_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) return sprintf(buf, "%u\n", data->update_interval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) static ssize_t update_interval_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) struct tmp401_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) int err, rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) * For valid rates, interval can be calculated as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) * interval = (1 << (7 - rate)) * 125;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) * Rounded rate is therefore
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) * rate = 7 - __fls(interval * 4 / (125 * 3));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) * Use clamp_val() to avoid overflows, and to ensure valid input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) * for __fls.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) val = clamp_val(val, 125, 16000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) rate = 7 - __fls(val * 4 / (125 * 3));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) data->update_interval = (1 << (7 - rate)) * 125;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) static SENSOR_DEVICE_ATTR_2_RO(temp1_input, temp, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) static SENSOR_DEVICE_ATTR_2_RW(temp1_min, temp, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) static SENSOR_DEVICE_ATTR_2_RW(temp1_max, temp, 2, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) static SENSOR_DEVICE_ATTR_2_RW(temp1_crit, temp, 3, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) static SENSOR_DEVICE_ATTR_RW(temp1_crit_hyst, temp_crit_hyst, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) static SENSOR_DEVICE_ATTR_2_RO(temp1_min_alarm, status, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) TMP432_STATUS_LOCAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) static SENSOR_DEVICE_ATTR_2_RO(temp1_max_alarm, status, 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) TMP432_STATUS_LOCAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) static SENSOR_DEVICE_ATTR_2_RO(temp1_crit_alarm, status, 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) TMP432_STATUS_LOCAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) static SENSOR_DEVICE_ATTR_2_RO(temp2_input, temp, 0, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) static SENSOR_DEVICE_ATTR_2_RW(temp2_min, temp, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) static SENSOR_DEVICE_ATTR_2_RW(temp2_max, temp, 2, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) static SENSOR_DEVICE_ATTR_2_RW(temp2_crit, temp, 3, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) static SENSOR_DEVICE_ATTR_RO(temp2_crit_hyst, temp_crit_hyst, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) static SENSOR_DEVICE_ATTR_2_RO(temp2_fault, status, 0, TMP432_STATUS_REMOTE1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) static SENSOR_DEVICE_ATTR_2_RO(temp2_min_alarm, status, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) TMP432_STATUS_REMOTE1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) static SENSOR_DEVICE_ATTR_2_RO(temp2_max_alarm, status, 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) TMP432_STATUS_REMOTE1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) static SENSOR_DEVICE_ATTR_2_RO(temp2_crit_alarm, status, 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) TMP432_STATUS_REMOTE1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) static DEVICE_ATTR_RW(update_interval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) static struct attribute *tmp401_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) &sensor_dev_attr_temp1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) &sensor_dev_attr_temp1_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) &sensor_dev_attr_temp1_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) &sensor_dev_attr_temp1_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) &sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) &sensor_dev_attr_temp2_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) &sensor_dev_attr_temp2_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) &sensor_dev_attr_temp2_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) &sensor_dev_attr_temp2_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) &sensor_dev_attr_temp2_crit_hyst.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) &sensor_dev_attr_temp2_fault.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) &sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) &sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) &dev_attr_update_interval.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) static const struct attribute_group tmp401_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) .attrs = tmp401_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) * Additional features of the TMP411 chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) * The TMP411 stores the minimum and maximum
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) * temperature measured since power-on, chip-reset, or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) * minimum and maximum register reset for both the local
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) * and remote channels.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) static SENSOR_DEVICE_ATTR_2_RO(temp1_lowest, temp, 4, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) static SENSOR_DEVICE_ATTR_2_RO(temp1_highest, temp, 5, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) static SENSOR_DEVICE_ATTR_2_RO(temp2_lowest, temp, 4, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) static SENSOR_DEVICE_ATTR_2_RO(temp2_highest, temp, 5, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) static SENSOR_DEVICE_ATTR_WO(temp_reset_history, reset_temp_history, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) static struct attribute *tmp411_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) &sensor_dev_attr_temp1_highest.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) &sensor_dev_attr_temp1_lowest.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) &sensor_dev_attr_temp2_highest.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) &sensor_dev_attr_temp2_lowest.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) &sensor_dev_attr_temp_reset_history.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) static const struct attribute_group tmp411_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) .attrs = tmp411_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) static SENSOR_DEVICE_ATTR_2_RO(temp3_input, temp, 0, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) static SENSOR_DEVICE_ATTR_2_RW(temp3_min, temp, 1, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) static SENSOR_DEVICE_ATTR_2_RW(temp3_max, temp, 2, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) static SENSOR_DEVICE_ATTR_2_RW(temp3_crit, temp, 3, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) static SENSOR_DEVICE_ATTR_RO(temp3_crit_hyst, temp_crit_hyst, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) static SENSOR_DEVICE_ATTR_2_RO(temp3_fault, status, 0, TMP432_STATUS_REMOTE2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) static SENSOR_DEVICE_ATTR_2_RO(temp3_min_alarm, status, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) TMP432_STATUS_REMOTE2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) static SENSOR_DEVICE_ATTR_2_RO(temp3_max_alarm, status, 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) TMP432_STATUS_REMOTE2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) static SENSOR_DEVICE_ATTR_2_RO(temp3_crit_alarm, status, 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) TMP432_STATUS_REMOTE2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) static struct attribute *tmp432_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) &sensor_dev_attr_temp3_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) &sensor_dev_attr_temp3_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) &sensor_dev_attr_temp3_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) &sensor_dev_attr_temp3_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) &sensor_dev_attr_temp3_crit_hyst.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) &sensor_dev_attr_temp3_fault.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) &sensor_dev_attr_temp3_max_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) &sensor_dev_attr_temp3_min_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) &sensor_dev_attr_temp3_crit_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) static const struct attribute_group tmp432_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) .attrs = tmp432_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) * Additional features of the TMP461 chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) * The TMP461 temperature offset for the remote channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) static SENSOR_DEVICE_ATTR_2_RW(temp2_offset, temp, 6, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) static struct attribute *tmp461_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) &sensor_dev_attr_temp2_offset.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) static const struct attribute_group tmp461_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) .attrs = tmp461_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) * Begin non sysfs callback code (aka Real code)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) static int tmp401_init_client(struct tmp401_data *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) int config, config_orig, status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) /* Set the conversion rate to 2 Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) data->update_interval = 500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) /* Start conversions (disable shutdown if necessary) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) config = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) if (config < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) return config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) config_orig = config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) config &= ~TMP401_CONFIG_SHUTDOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) if (config != config_orig)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) status = i2c_smbus_write_byte_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) TMP401_CONFIG_WRITE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) static int tmp401_detect(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) struct i2c_board_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) enum chips kind;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) struct i2c_adapter *adapter = client->adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) /* Detect and identify the chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) reg = i2c_smbus_read_byte_data(client, TMP401_MANUFACTURER_ID_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) if (reg != TMP401_MANUFACTURER_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) reg = i2c_smbus_read_byte_data(client, TMP401_DEVICE_ID_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) case TMP401_DEVICE_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) if (client->addr != 0x4c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) kind = tmp401;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) case TMP411A_DEVICE_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) if (client->addr != 0x4c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) kind = tmp411;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) case TMP411B_DEVICE_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) if (client->addr != 0x4d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) kind = tmp411;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) case TMP411C_DEVICE_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) if (client->addr != 0x4e)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) kind = tmp411;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) case TMP431_DEVICE_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) if (client->addr != 0x4c && client->addr != 0x4d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) kind = tmp431;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) case TMP432_DEVICE_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) if (client->addr != 0x4c && client->addr != 0x4d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) kind = tmp432;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) case TMP435_DEVICE_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) kind = tmp435;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) reg = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) if (reg & 0x1b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) reg = i2c_smbus_read_byte_data(client, TMP401_CONVERSION_RATE_READ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) /* Datasheet says: 0x1-0x6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) if (reg > 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) strlcpy(info->type, tmp401_id[kind].name, I2C_NAME_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) static int tmp401_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) static const char * const names[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) "TMP401", "TMP411", "TMP431", "TMP432", "TMP435", "TMP461"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) struct tmp401_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) int groups = 0, status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) data = devm_kzalloc(dev, sizeof(struct tmp401_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) mutex_init(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) data->kind = i2c_match_id(tmp401_id, client)->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) /* Initialize the TMP401 chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) status = tmp401_init_client(data, client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) /* Register sysfs hooks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) data->groups[groups++] = &tmp401_group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) /* Register additional tmp411 sysfs hooks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) if (data->kind == tmp411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) data->groups[groups++] = &tmp411_group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) /* Register additional tmp432 sysfs hooks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) if (data->kind == tmp432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) data->groups[groups++] = &tmp432_group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) if (data->kind == tmp461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) data->groups[groups++] = &tmp461_group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) data, data->groups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) if (IS_ERR(hwmon_dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) return PTR_ERR(hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) dev_info(dev, "Detected TI %s chip\n", names[data->kind]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) static struct i2c_driver tmp401_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) .class = I2C_CLASS_HWMON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) .name = "tmp401",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) .probe_new = tmp401_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) .id_table = tmp401_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) .detect = tmp401_detect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) .address_list = normal_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) module_i2c_driver(tmp401_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) MODULE_DESCRIPTION("Texas Instruments TMP401 temperature sensor driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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