Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * thmc50.c - Part of lm_sensors, Linux kernel modules for hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *	      monitoring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2007 Krzysztof Helt <krzysztof.h1@wp.pl>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Based on 2.4 driver by Frodo Looijaard <frodol@dds.nl> and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Philip Edelbrock <phil@netroedge.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/hwmon-sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) /* Addresses to scan */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, I2C_CLIENT_END };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) /* Insmod parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) enum chips { thmc50, adm1022 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) static unsigned short adm1022_temp3[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) static unsigned int adm1022_temp3_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) module_param_array(adm1022_temp3, ushort, &adm1022_temp3_num, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) MODULE_PARM_DESC(adm1022_temp3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 		 "List of adapter,address pairs to enable 3rd temperature (ADM1022 only)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) /* Many THMC50 constants specified below */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) /* The THMC50 registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define THMC50_REG_CONF				0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define THMC50_REG_COMPANY_ID			0x3E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define THMC50_REG_DIE_CODE			0x3F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define THMC50_REG_ANALOG_OUT			0x19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)  * The mirror status register cannot be used as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)  * reading it does not clear alarms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define THMC50_REG_INTR				0x41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) static const u8 THMC50_REG_TEMP[] = { 0x27, 0x26, 0x20 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) static const u8 THMC50_REG_TEMP_MIN[] = { 0x3A, 0x38, 0x2C };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) static const u8 THMC50_REG_TEMP_MAX[] = { 0x39, 0x37, 0x2B };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) static const u8 THMC50_REG_TEMP_CRITICAL[] = { 0x13, 0x14, 0x14 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) static const u8 THMC50_REG_TEMP_DEFAULT[] = { 0x17, 0x18, 0x18 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define THMC50_REG_CONF_nFANOFF			0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define THMC50_REG_CONF_PROGRAMMED		0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) /* Each client has this additional data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) struct thmc50_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	const struct attribute_group *groups[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	struct mutex update_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	enum chips type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	unsigned long last_updated;	/* In jiffies */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	char has_temp3;		/* !=0 if it is ADM1022 in temp3 mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	char valid;		/* !=0 if following fields are valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	/* Register values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	s8 temp_input[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	s8 temp_max[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	s8 temp_min[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	s8 temp_critical[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	u8 analog_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	u8 alarms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) static struct thmc50_data *thmc50_update_device(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	struct thmc50_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	int timeout = HZ / 5 + (data->type == thmc50 ? HZ : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	if (time_after(jiffies, data->last_updated + timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	    || !data->valid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		int temps = data->has_temp3 ? 3 : 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		int prog = i2c_smbus_read_byte_data(client, THMC50_REG_CONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		prog &= THMC50_REG_CONF_PROGRAMMED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		for (i = 0; i < temps; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 			data->temp_input[i] = i2c_smbus_read_byte_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 						THMC50_REG_TEMP[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 			data->temp_max[i] = i2c_smbus_read_byte_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 						THMC50_REG_TEMP_MAX[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 			data->temp_min[i] = i2c_smbus_read_byte_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 						THMC50_REG_TEMP_MIN[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 			data->temp_critical[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 				i2c_smbus_read_byte_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 					prog ? THMC50_REG_TEMP_CRITICAL[i]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 					     : THMC50_REG_TEMP_DEFAULT[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		data->analog_out =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		    i2c_smbus_read_byte_data(client, THMC50_REG_ANALOG_OUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		data->alarms =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		    i2c_smbus_read_byte_data(client, THMC50_REG_INTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		data->last_updated = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		data->valid = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	return data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static ssize_t analog_out_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 			       struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	struct thmc50_data *data = thmc50_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	return sprintf(buf, "%d\n", data->analog_out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static ssize_t analog_out_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 				struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 				const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	struct thmc50_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	int config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	unsigned long tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	err = kstrtoul(buf, 10, &tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	data->analog_out = clamp_val(tmp, 0, 255);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	i2c_smbus_write_byte_data(client, THMC50_REG_ANALOG_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 				  data->analog_out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	config = i2c_smbus_read_byte_data(client, THMC50_REG_CONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	if (data->analog_out == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		config &= ~THMC50_REG_CONF_nFANOFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		config |= THMC50_REG_CONF_nFANOFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	i2c_smbus_write_byte_data(client, THMC50_REG_CONF, config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) /* There is only one PWM mode = DC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static ssize_t pwm_mode_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 			     struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	return sprintf(buf, "0\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /* Temperatures */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static ssize_t temp_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 			 char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	int nr = to_sensor_dev_attr(attr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	struct thmc50_data *data = thmc50_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	return sprintf(buf, "%d\n", data->temp_input[nr] * 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static ssize_t temp_min_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 			     struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	int nr = to_sensor_dev_attr(attr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	struct thmc50_data *data = thmc50_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	return sprintf(buf, "%d\n", data->temp_min[nr] * 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static ssize_t temp_min_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 			      struct device_attribute *attr, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 			      size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	int nr = to_sensor_dev_attr(attr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	struct thmc50_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	data->temp_min[nr] = clamp_val(val / 1000, -128, 127);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	i2c_smbus_write_byte_data(client, THMC50_REG_TEMP_MIN[nr],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 				  data->temp_min[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) static ssize_t temp_max_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 			     struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	int nr = to_sensor_dev_attr(attr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	struct thmc50_data *data = thmc50_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	return sprintf(buf, "%d\n", data->temp_max[nr] * 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static ssize_t temp_max_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 			      struct device_attribute *attr, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 			      size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	int nr = to_sensor_dev_attr(attr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	struct thmc50_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	data->temp_max[nr] = clamp_val(val / 1000, -128, 127);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	i2c_smbus_write_byte_data(client, THMC50_REG_TEMP_MAX[nr],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 				  data->temp_max[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) static ssize_t temp_critical_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 				  struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	int nr = to_sensor_dev_attr(attr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	struct thmc50_data *data = thmc50_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	return sprintf(buf, "%d\n", data->temp_critical[nr] * 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) static ssize_t alarm_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 			  char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	int index = to_sensor_dev_attr(attr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	struct thmc50_data *data = thmc50_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	return sprintf(buf, "%u\n", (data->alarms >> index) & 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) static SENSOR_DEVICE_ATTR_RW(temp1_min, temp_min, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static SENSOR_DEVICE_ATTR_RW(temp1_max, temp_max, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) static SENSOR_DEVICE_ATTR_RO(temp1_crit, temp_critical, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) static SENSOR_DEVICE_ATTR_RO(temp2_input, temp, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) static SENSOR_DEVICE_ATTR_RW(temp2_min, temp_min, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) static SENSOR_DEVICE_ATTR_RW(temp2_max, temp_max, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) static SENSOR_DEVICE_ATTR_RO(temp2_crit, temp_critical, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) static SENSOR_DEVICE_ATTR_RO(temp3_input, temp, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) static SENSOR_DEVICE_ATTR_RW(temp3_min, temp_min, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static SENSOR_DEVICE_ATTR_RW(temp3_max, temp_max, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) static SENSOR_DEVICE_ATTR_RO(temp3_crit, temp_critical, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) static SENSOR_DEVICE_ATTR_RO(temp1_alarm, alarm, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static SENSOR_DEVICE_ATTR_RO(temp2_alarm, alarm, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) static SENSOR_DEVICE_ATTR_RO(temp3_alarm, alarm, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) static SENSOR_DEVICE_ATTR_RO(temp2_fault, alarm, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static SENSOR_DEVICE_ATTR_RO(temp3_fault, alarm, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) static SENSOR_DEVICE_ATTR_RW(pwm1, analog_out, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) static SENSOR_DEVICE_ATTR_RO(pwm1_mode, pwm_mode, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) static struct attribute *thmc50_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	&sensor_dev_attr_temp1_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	&sensor_dev_attr_temp1_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	&sensor_dev_attr_temp1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	&sensor_dev_attr_temp1_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	&sensor_dev_attr_temp1_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	&sensor_dev_attr_temp2_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	&sensor_dev_attr_temp2_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	&sensor_dev_attr_temp2_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	&sensor_dev_attr_temp2_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	&sensor_dev_attr_temp2_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	&sensor_dev_attr_temp2_fault.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	&sensor_dev_attr_pwm1.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	&sensor_dev_attr_pwm1_mode.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) static const struct attribute_group thmc50_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	.attrs = thmc50_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /* for ADM1022 3rd temperature mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) static struct attribute *temp3_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	&sensor_dev_attr_temp3_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	&sensor_dev_attr_temp3_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	&sensor_dev_attr_temp3_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	&sensor_dev_attr_temp3_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	&sensor_dev_attr_temp3_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	&sensor_dev_attr_temp3_fault.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) static const struct attribute_group temp3_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	.attrs = temp3_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) /* Return 0 if detection is successful, -ENODEV otherwise */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) static int thmc50_detect(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 			 struct i2c_board_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	unsigned company;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	unsigned revision;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	unsigned config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	struct i2c_adapter *adapter = client->adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	const char *type_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 		pr_debug("thmc50: detect failed, smbus byte data not supported!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	pr_debug("thmc50: Probing for THMC50 at 0x%2X on bus %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 		 client->addr, i2c_adapter_id(client->adapter));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	company = i2c_smbus_read_byte_data(client, THMC50_REG_COMPANY_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	revision = i2c_smbus_read_byte_data(client, THMC50_REG_DIE_CODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	config = i2c_smbus_read_byte_data(client, THMC50_REG_CONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	if (revision < 0xc0 || (config & 0x10))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	if (company == 0x41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 		int id = i2c_adapter_id(client->adapter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 		int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 		type_name = "adm1022";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 		for (i = 0; i + 1 < adm1022_temp3_num; i += 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 			if (adm1022_temp3[i] == id &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 			    adm1022_temp3[i + 1] == client->addr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 				/* enable 2nd remote temp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 				config |= (1 << 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 				i2c_smbus_write_byte_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 							  THMC50_REG_CONF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 							  config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	} else if (company == 0x49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 		type_name = "thmc50";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 		pr_debug("thmc50: Detection of THMC50/ADM1022 failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	pr_debug("thmc50: Detected %s (version %x, revision %x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 		 type_name, (revision >> 4) - 0xc, revision & 0xf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	strlcpy(info->type, type_name, I2C_NAME_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) static void thmc50_init_client(struct thmc50_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	int config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	data->analog_out = i2c_smbus_read_byte_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 						    THMC50_REG_ANALOG_OUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	/* set up to at least 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	if (data->analog_out == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 		data->analog_out = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 		i2c_smbus_write_byte_data(client, THMC50_REG_ANALOG_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 					  data->analog_out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	config = i2c_smbus_read_byte_data(client, THMC50_REG_CONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	config |= 0x1;	/* start the chip if it is in standby mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	if (data->type == adm1022 && (config & (1 << 7)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 		data->has_temp3 = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	i2c_smbus_write_byte_data(client, THMC50_REG_CONF, config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) static const struct i2c_device_id thmc50_id[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) static int thmc50_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	struct thmc50_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	int idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	data = devm_kzalloc(dev, sizeof(struct thmc50_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	data->type = i2c_match_id(thmc50_id, client)->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	mutex_init(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	thmc50_init_client(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	/* sysfs hooks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	data->groups[idx++] = &thmc50_group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	/* Register additional ADM1022 sysfs hooks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	if (data->has_temp3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 		data->groups[idx++] = &temp3_group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 							   data, data->groups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	return PTR_ERR_OR_ZERO(hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) static const struct i2c_device_id thmc50_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	{ "adm1022", adm1022 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	{ "thmc50", thmc50 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) MODULE_DEVICE_TABLE(i2c, thmc50_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) static struct i2c_driver thmc50_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 	.class = I2C_CLASS_HWMON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 		.name = "thmc50",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 	.probe_new = thmc50_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 	.id_table = thmc50_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 	.detect = thmc50_detect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 	.address_list = normal_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) module_i2c_driver(thmc50_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) MODULE_AUTHOR("Krzysztof Helt <krzysztof.h1@wp.pl>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) MODULE_DESCRIPTION("THMC50 driver");