^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * STTS751 sensor driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2016-2017 Istituto Italiano di Tecnologia - RBCS - EDL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Robotics, Brain and Cognitive Sciences department
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Electronic Design Laboratory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Written by Andrea Merello <andrea.merello@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Based on LM95241 driver and LM90 driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/hwmon-sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/property.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/util_macros.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define DEVNAME "stts751"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static const unsigned short normal_i2c[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 0x48, 0x49, 0x38, 0x39, /* STTS751-0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 0x4A, 0x4B, 0x3A, 0x3B, /* STTS751-1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) I2C_CLIENT_END };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define STTS751_REG_TEMP_H 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define STTS751_REG_STATUS 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define STTS751_STATUS_TRIPT BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define STTS751_STATUS_TRIPL BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define STTS751_STATUS_TRIPH BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define STTS751_REG_TEMP_L 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define STTS751_REG_CONF 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define STTS751_CONF_RES_MASK 0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define STTS751_CONF_RES_SHIFT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define STTS751_CONF_EVENT_DIS BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define STTS751_CONF_STOP BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define STTS751_REG_RATE 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define STTS751_REG_HLIM_H 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define STTS751_REG_HLIM_L 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define STTS751_REG_LLIM_H 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define STTS751_REG_LLIM_L 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define STTS751_REG_TLIM 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define STTS751_REG_HYST 0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define STTS751_REG_SMBUS_TO 0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define STTS751_REG_PROD_ID 0xFD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define STTS751_REG_MAN_ID 0xFE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define STTS751_REG_REV_ID 0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define STTS751_0_PROD_ID 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define STTS751_1_PROD_ID 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define ST_MAN_ID 0x53
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * Possible update intervals are (in mS):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * 16000, 8000, 4000, 2000, 1000, 500, 250, 125, 62.5, 31.25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * However we are not going to complicate things too much and we stick to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * approx value in mS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static const int stts751_intervals[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 16000, 8000, 4000, 2000, 1000, 500, 250, 125, 63, 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static const struct i2c_device_id stts751_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) { "stts751", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static const struct of_device_id __maybe_unused stts751_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) { .compatible = "stts751" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) MODULE_DEVICE_TABLE(of, stts751_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct stts751_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) struct mutex access_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) u8 interval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) int res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) int event_max, event_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) int therm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) int hyst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) bool smbus_timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) int temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) unsigned long last_update, last_alert_update;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) u8 config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) bool min_alert, max_alert, therm_trip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) bool data_valid, alert_valid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) bool notify_max, notify_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * These functions converts temperature from HW format to integer format and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * vice-vers. They are (mostly) taken from lm90 driver. Unit is in mC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static int stts751_to_deg(s16 hw_val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return hw_val * 125 / 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static s32 stts751_to_hw(int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) return DIV_ROUND_CLOSEST(val, 125) * 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static int stts751_adjust_resolution(struct stts751_priv *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) u8 res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) switch (priv->interval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) case 9:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) /* 10 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) res = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) case 8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /* 11 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) res = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) /* 12 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) res = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) if (priv->res == res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) priv->config &= ~STTS751_CONF_RES_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) priv->config |= res << STTS751_CONF_RES_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) dev_dbg(&priv->client->dev, "setting res %d. config %x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) res, priv->config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) priv->res = res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) return i2c_smbus_write_byte_data(priv->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) STTS751_REG_CONF, priv->config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static int stts751_update_temp(struct stts751_priv *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) s32 integer1, integer2, frac;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * There is a trick here, like in the lm90 driver. We have to read two
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) * registers to get the sensor temperature, but we have to beware a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) * conversion could occur between the readings. We could use the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) * one-shot conversion register, but we don't want to do this (disables
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) * hardware monitoring). So the solution used here is to read the high
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) * byte once, then the low byte, then the high byte again. If the new
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) * high byte matches the old one, then we have a valid reading. Else we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * have to read the low byte again, and now we believe we have a correct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) * reading.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) integer1 = i2c_smbus_read_byte_data(priv->client, STTS751_REG_TEMP_H);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (integer1 < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) dev_dbg(&priv->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) "I2C read failed (temp H). ret: %x\n", integer1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) return integer1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) frac = i2c_smbus_read_byte_data(priv->client, STTS751_REG_TEMP_L);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) if (frac < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) dev_dbg(&priv->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) "I2C read failed (temp L). ret: %x\n", frac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) return frac;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) integer2 = i2c_smbus_read_byte_data(priv->client, STTS751_REG_TEMP_H);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) if (integer2 < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) dev_dbg(&priv->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) "I2C 2nd read failed (temp H). ret: %x\n", integer2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) return integer2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) if (integer1 != integer2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) frac = i2c_smbus_read_byte_data(priv->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) STTS751_REG_TEMP_L);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) if (frac < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) dev_dbg(&priv->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) "I2C 2nd read failed (temp L). ret: %x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) frac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) return frac;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) priv->temp = stts751_to_deg((integer1 << 8) | frac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static int stts751_set_temp_reg16(struct stts751_priv *priv, int temp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) u8 hreg, u8 lreg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) s32 hwval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) hwval = stts751_to_hw(temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) ret = i2c_smbus_write_byte_data(priv->client, hreg, hwval >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) return i2c_smbus_write_byte_data(priv->client, lreg, hwval & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static int stts751_set_temp_reg8(struct stts751_priv *priv, int temp, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) s32 hwval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) hwval = stts751_to_hw(temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) return i2c_smbus_write_byte_data(priv->client, reg, hwval >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static int stts751_read_reg16(struct stts751_priv *priv, int *temp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) u8 hreg, u8 lreg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) int integer, frac;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) integer = i2c_smbus_read_byte_data(priv->client, hreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) if (integer < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) return integer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) frac = i2c_smbus_read_byte_data(priv->client, lreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) if (frac < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) return frac;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) *temp = stts751_to_deg((integer << 8) | frac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static int stts751_read_reg8(struct stts751_priv *priv, int *temp, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) int integer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) integer = i2c_smbus_read_byte_data(priv->client, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) if (integer < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) return integer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) *temp = stts751_to_deg(integer << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) * Update alert flags without waiting for cache to expire. We detects alerts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) * immediately for the sake of the alert handler; we still need to deal with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) * caching to workaround the fact that alarm flags int the status register,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) * despite what the datasheet claims, gets always cleared on read.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) static int stts751_update_alert(struct stts751_priv *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) bool conv_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) int cache_time = msecs_to_jiffies(stts751_intervals[priv->interval]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) * Add another 10% because if we run faster than the HW conversion
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) * rate we will end up in reporting incorrectly alarms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) cache_time += cache_time / 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) ret = i2c_smbus_read_byte_data(priv->client, STTS751_REG_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) dev_dbg(&priv->client->dev, "status reg %x\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) conv_done = ret & (STTS751_STATUS_TRIPH | STTS751_STATUS_TRIPL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) * Reset the cache if the cache time expired, or if we are sure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) * we have valid data from a device conversion, or if we know
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) * our cache has been never written.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) * Note that when the cache has been never written the point is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) * to correctly initialize the timestamp, rather than clearing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) * the cache values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) * Note that updating the cache timestamp when we get an alarm flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) * is required, otherwise we could incorrectly report alarms to be zero.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) if (time_after(jiffies, priv->last_alert_update + cache_time) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) conv_done || !priv->alert_valid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) priv->max_alert = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) priv->min_alert = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) priv->alert_valid = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) priv->last_alert_update = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) dev_dbg(&priv->client->dev, "invalidating alert cache\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) priv->max_alert |= !!(ret & STTS751_STATUS_TRIPH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) priv->min_alert |= !!(ret & STTS751_STATUS_TRIPL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) priv->therm_trip = !!(ret & STTS751_STATUS_TRIPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) dev_dbg(&priv->client->dev, "max_alert: %d, min_alert: %d, therm_trip: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) priv->max_alert, priv->min_alert, priv->therm_trip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) static void stts751_alert(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) enum i2c_alert_protocol type, unsigned int data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) struct stts751_priv *priv = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) if (type != I2C_PROTOCOL_SMBUS_ALERT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) dev_dbg(&client->dev, "alert!");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) mutex_lock(&priv->access_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) ret = stts751_update_alert(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) /* default to worst case */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) priv->max_alert = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) priv->min_alert = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) dev_warn(priv->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) "Alert received, but can't communicate to the device. Triggering all alarms!");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) if (priv->max_alert) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) if (priv->notify_max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) dev_notice(priv->dev, "got alert for HIGH temperature");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) priv->notify_max = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) /* unblock alert poll */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) sysfs_notify(&priv->dev->kobj, NULL, "temp1_max_alarm");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) if (priv->min_alert) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) if (priv->notify_min)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) dev_notice(priv->dev, "got alert for LOW temperature");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) priv->notify_min = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) /* unblock alert poll */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) sysfs_notify(&priv->dev->kobj, NULL, "temp1_min_alarm");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) if (priv->min_alert || priv->max_alert)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) kobject_uevent(&priv->dev->kobj, KOBJ_CHANGE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) mutex_unlock(&priv->access_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) static int stts751_update(struct stts751_priv *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) int cache_time = msecs_to_jiffies(stts751_intervals[priv->interval]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) if (time_after(jiffies, priv->last_update + cache_time) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) !priv->data_valid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) ret = stts751_update_temp(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) ret = stts751_update_alert(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) priv->data_valid = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) priv->last_update = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) static ssize_t max_alarm_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) struct stts751_priv *priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) mutex_lock(&priv->access_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) ret = stts751_update(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) priv->notify_max = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) mutex_unlock(&priv->access_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) return snprintf(buf, PAGE_SIZE, "%d\n", priv->max_alert);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) static ssize_t min_alarm_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) struct stts751_priv *priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) mutex_lock(&priv->access_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) ret = stts751_update(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) priv->notify_min = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) mutex_unlock(&priv->access_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) return snprintf(buf, PAGE_SIZE, "%d\n", priv->min_alert);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) static ssize_t input_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) struct stts751_priv *priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) mutex_lock(&priv->access_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) ret = stts751_update(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) mutex_unlock(&priv->access_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) return snprintf(buf, PAGE_SIZE, "%d\n", priv->temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) static ssize_t therm_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) struct stts751_priv *priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) return snprintf(buf, PAGE_SIZE, "%d\n", priv->therm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) static ssize_t therm_store(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) long temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) struct stts751_priv *priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) if (kstrtol(buf, 10, &temp) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) /* HW works in range -64C to +127.937C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) temp = clamp_val(temp, -64000, 127937);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) mutex_lock(&priv->access_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) ret = stts751_set_temp_reg8(priv, temp, STTS751_REG_TLIM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) dev_dbg(&priv->client->dev, "setting therm %ld", temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) * hysteresis reg is relative to therm, so the HW does not need to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) * adjusted, we need to update our local copy only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) priv->hyst = temp - (priv->therm - priv->hyst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) priv->therm = temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) mutex_unlock(&priv->access_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) static ssize_t hyst_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) struct stts751_priv *priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) return snprintf(buf, PAGE_SIZE, "%d\n", priv->hyst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) static ssize_t hyst_store(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) long temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) struct stts751_priv *priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) if (kstrtol(buf, 10, &temp) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) mutex_lock(&priv->access_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) /* HW works in range -64C to +127.937C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) temp = clamp_val(temp, -64000, priv->therm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) priv->hyst = temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) dev_dbg(&priv->client->dev, "setting hyst %ld", temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) temp = priv->therm - temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) ret = stts751_set_temp_reg8(priv, temp, STTS751_REG_HYST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) mutex_unlock(&priv->access_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) static ssize_t therm_trip_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) struct stts751_priv *priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) mutex_lock(&priv->access_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) ret = stts751_update(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) mutex_unlock(&priv->access_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) return snprintf(buf, PAGE_SIZE, "%d\n", priv->therm_trip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) static ssize_t max_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) struct stts751_priv *priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) return snprintf(buf, PAGE_SIZE, "%d\n", priv->event_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) static ssize_t max_store(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) long temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) struct stts751_priv *priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) if (kstrtol(buf, 10, &temp) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) mutex_lock(&priv->access_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) /* HW works in range -64C to +127.937C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) temp = clamp_val(temp, priv->event_min, 127937);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) ret = stts751_set_temp_reg16(priv, temp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) STTS751_REG_HLIM_H, STTS751_REG_HLIM_L);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) dev_dbg(&priv->client->dev, "setting event max %ld", temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) priv->event_max = temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) ret = count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) mutex_unlock(&priv->access_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) static ssize_t min_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) struct stts751_priv *priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) return snprintf(buf, PAGE_SIZE, "%d\n", priv->event_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) static ssize_t min_store(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) long temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) struct stts751_priv *priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) if (kstrtol(buf, 10, &temp) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) mutex_lock(&priv->access_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) /* HW works in range -64C to +127.937C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) temp = clamp_val(temp, -64000, priv->event_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) ret = stts751_set_temp_reg16(priv, temp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) STTS751_REG_LLIM_H, STTS751_REG_LLIM_L);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) dev_dbg(&priv->client->dev, "setting event min %ld", temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) priv->event_min = temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) ret = count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) mutex_unlock(&priv->access_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) static ssize_t interval_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) struct stts751_priv *priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) return snprintf(buf, PAGE_SIZE, "%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) stts751_intervals[priv->interval]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) static ssize_t interval_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) struct device_attribute *attr, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) int idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) int ret = count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) struct stts751_priv *priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) if (kstrtoul(buf, 10, &val) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) idx = find_closest_descending(val, stts751_intervals,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) ARRAY_SIZE(stts751_intervals));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) dev_dbg(&priv->client->dev, "setting interval. req:%lu, idx: %d, val: %d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) val, idx, stts751_intervals[idx]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) mutex_lock(&priv->access_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) if (priv->interval == idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) * In early development stages I've become suspicious about the chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) * starting to misbehave if I ever set, even briefly, an invalid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) * configuration. While I'm not sure this is really needed, be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) * conservative and set rate/resolution in such an order that avoids
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) * passing through an invalid configuration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) /* speed up: lower the resolution, then modify convrate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) if (priv->interval < idx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) dev_dbg(&priv->client->dev, "lower resolution, then modify convrate");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) priv->interval = idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) ret = stts751_adjust_resolution(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) ret = i2c_smbus_write_byte_data(priv->client, STTS751_REG_RATE, idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) /* slow down: modify convrate, then raise resolution */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) if (priv->interval != idx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) dev_dbg(&priv->client->dev, "modify convrate, then raise resolution");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) priv->interval = idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) ret = stts751_adjust_resolution(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) ret = count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) mutex_unlock(&priv->access_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) static int stts751_detect(struct i2c_client *new_client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) struct i2c_board_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) struct i2c_adapter *adapter = new_client->adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) int tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) tmp = i2c_smbus_read_byte_data(new_client, STTS751_REG_MAN_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) if (tmp != ST_MAN_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) /* lower temperaure registers always have bits 0-3 set to zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) tmp = i2c_smbus_read_byte_data(new_client, STTS751_REG_TEMP_L);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) if (tmp & 0xf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) tmp = i2c_smbus_read_byte_data(new_client, STTS751_REG_HLIM_L);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) if (tmp & 0xf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) tmp = i2c_smbus_read_byte_data(new_client, STTS751_REG_LLIM_L);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) if (tmp & 0xf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) /* smbus timeout register always have bits 0-7 set to zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) tmp = i2c_smbus_read_byte_data(new_client, STTS751_REG_SMBUS_TO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) if (tmp & 0x7f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) tmp = i2c_smbus_read_byte_data(new_client, STTS751_REG_PROD_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) switch (tmp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) case STTS751_0_PROD_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) name = "STTS751-0";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) case STTS751_1_PROD_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) name = "STTS751-1";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) dev_dbg(&new_client->dev, "Chip %s detected", name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) strlcpy(info->type, stts751_id[0].name, I2C_NAME_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) static int stts751_read_chip_config(struct stts751_priv *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) int tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) ret = i2c_smbus_read_byte_data(priv->client, STTS751_REG_CONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) priv->config = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) priv->res = (ret & STTS751_CONF_RES_MASK) >> STTS751_CONF_RES_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) ret = i2c_smbus_read_byte_data(priv->client, STTS751_REG_RATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) if (ret >= ARRAY_SIZE(stts751_intervals)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) dev_err(priv->dev, "Unrecognized conversion rate 0x%x\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) priv->interval = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) ret = stts751_read_reg16(priv, &priv->event_max,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) STTS751_REG_HLIM_H, STTS751_REG_HLIM_L);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) ret = stts751_read_reg16(priv, &priv->event_min,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) STTS751_REG_LLIM_H, STTS751_REG_LLIM_L);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) ret = stts751_read_reg8(priv, &priv->therm, STTS751_REG_TLIM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) ret = stts751_read_reg8(priv, &tmp, STTS751_REG_HYST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) priv->hyst = priv->therm - tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) static SENSOR_DEVICE_ATTR_RO(temp1_input, input, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) static SENSOR_DEVICE_ATTR_RW(temp1_min, min, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) static SENSOR_DEVICE_ATTR_RW(temp1_max, max, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) static SENSOR_DEVICE_ATTR_RO(temp1_min_alarm, min_alarm, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) static SENSOR_DEVICE_ATTR_RO(temp1_max_alarm, max_alarm, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) static SENSOR_DEVICE_ATTR_RW(temp1_crit, therm, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) static SENSOR_DEVICE_ATTR_RW(temp1_crit_hyst, hyst, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) static SENSOR_DEVICE_ATTR_RO(temp1_crit_alarm, therm_trip, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) static SENSOR_DEVICE_ATTR_RW(update_interval, interval, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) static struct attribute *stts751_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) &sensor_dev_attr_temp1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) &sensor_dev_attr_temp1_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) &sensor_dev_attr_temp1_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) &sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) &sensor_dev_attr_temp1_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) &sensor_dev_attr_update_interval.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) ATTRIBUTE_GROUPS(stts751);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) static int stts751_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) struct stts751_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) bool smbus_nto;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) int rev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) if (!priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) priv->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) priv->notify_max = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) priv->notify_min = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) i2c_set_clientdata(client, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) mutex_init(&priv->access_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) if (device_property_present(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) "smbus-timeout-disable")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) smbus_nto = device_property_read_bool(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) "smbus-timeout-disable");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) ret = i2c_smbus_write_byte_data(client, STTS751_REG_SMBUS_TO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) smbus_nto ? 0 : 0x80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) rev_id = i2c_smbus_read_byte_data(client, STTS751_REG_REV_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) if (rev_id < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) if (rev_id != 0x1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) dev_dbg(&client->dev, "Chip revision 0x%x is untested\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) rev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) ret = stts751_read_chip_config(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) priv->config &= ~(STTS751_CONF_STOP | STTS751_CONF_EVENT_DIS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) ret = i2c_smbus_write_byte_data(client, STTS751_REG_CONF, priv->config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) priv->dev = devm_hwmon_device_register_with_groups(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) client->name, priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) stts751_groups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) return PTR_ERR_OR_ZERO(priv->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) MODULE_DEVICE_TABLE(i2c, stts751_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) static struct i2c_driver stts751_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) .class = I2C_CLASS_HWMON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) .name = DEVNAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) .of_match_table = of_match_ptr(stts751_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) .probe_new = stts751_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) .id_table = stts751_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) .detect = stts751_detect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) .alert = stts751_alert,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) .address_list = normal_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) module_i2c_driver(stts751_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) MODULE_AUTHOR("Andrea Merello <andrea.merello@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) MODULE_DESCRIPTION("STTS751 sensor driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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