^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * sl28cpld hardware monitoring driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2020 Kontron Europe GmbH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/bitfield.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/property.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define FAN_INPUT 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define FAN_SCALE_X8 BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define FAN_VALUE_MASK GENMASK(6, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) struct sl28cpld_hwmon {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) u32 offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static umode_t sl28cpld_hwmon_is_visible(const void *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) enum hwmon_sensor_types type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) u32 attr, int channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) return 0444;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static int sl28cpld_hwmon_read(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) enum hwmon_sensor_types type, u32 attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) int channel, long *input)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct sl28cpld_hwmon *hwmon = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) unsigned int value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) switch (attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) case hwmon_fan_input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) ret = regmap_read(hwmon->regmap, hwmon->offset + FAN_INPUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) &value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * The register has a 7 bit value and 1 bit which indicates the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * scale. If the MSB is set, then the lower 7 bit has to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * multiplied by 8, to get the correct reading.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) if (value & FAN_SCALE_X8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) value = FIELD_GET(FAN_VALUE_MASK, value) << 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * The counter period is 1000ms and the sysfs specification
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * says we should asssume 2 pulses per revolution.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) value *= 60 / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) *input = value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static const u32 sl28cpld_hwmon_fan_config[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) HWMON_F_INPUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static const struct hwmon_channel_info sl28cpld_hwmon_fan = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .type = hwmon_fan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .config = sl28cpld_hwmon_fan_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static const struct hwmon_channel_info *sl28cpld_hwmon_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) &sl28cpld_hwmon_fan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static const struct hwmon_ops sl28cpld_hwmon_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .is_visible = sl28cpld_hwmon_is_visible,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .read = sl28cpld_hwmon_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static const struct hwmon_chip_info sl28cpld_hwmon_chip_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .ops = &sl28cpld_hwmon_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .info = sl28cpld_hwmon_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static int sl28cpld_hwmon_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) struct sl28cpld_hwmon *hwmon;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) if (!pdev->dev.parent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) hwmon = devm_kzalloc(&pdev->dev, sizeof(*hwmon), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (!hwmon)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) hwmon->regmap = dev_get_regmap(pdev->dev.parent, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) if (!hwmon->regmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) ret = device_property_read_u32(&pdev->dev, "reg", &hwmon->offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) "sl28cpld_hwmon", hwmon,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) &sl28cpld_hwmon_chip_info, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) if (IS_ERR(hwmon_dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) dev_err(&pdev->dev, "failed to register as hwmon device");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return PTR_ERR_OR_ZERO(hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static const struct of_device_id sl28cpld_hwmon_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) { .compatible = "kontron,sl28cpld-fan" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) MODULE_DEVICE_TABLE(of, sl28cpld_hwmon_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static struct platform_driver sl28cpld_hwmon_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .probe = sl28cpld_hwmon_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .name = "sl28cpld-fan",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .of_match_table = sl28cpld_hwmon_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) module_platform_driver(sl28cpld_hwmon_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) MODULE_DESCRIPTION("sl28cpld Hardware Monitoring Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) MODULE_AUTHOR("Michael Walle <michael@walle.cc>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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