^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * sis5595.c - Part of lm_sensors, Linux kernel modules
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * for hardware monitoring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Kyösti Mälkki <kmalkki@cc.hut.fi>, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Mark D. Studebaker <mdsxyz123@yahoo.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Ported to Linux 2.6 by Aurelien Jarno <aurelien@aurel32.net> with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * the help of Jean Delvare <jdelvare@suse.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * SiS southbridge has a LM78-like chip integrated on the same IC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * This driver is a customized copy of lm78.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * Supports following revisions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * Version PCI ID PCI Revision
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * 1 1039/0008 AF or less
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * 2 1039/0008 B0 or greater
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * Note: these chips contain a 0008 device which is incompatible with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * 5595. We recognize these by the presence of the listed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * "blacklist" PCI ID and refuse to load.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * NOT SUPPORTED PCI ID BLACKLIST PCI ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * 540 0008 0540
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * 550 0008 0550
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * 5513 0008 5511
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * 5581 0008 5597
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * 5582 0008 5597
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * 5597 0008 5597
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * 5598 0008 5597/5598
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * 630 0008 0630
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * 645 0008 0645
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * 730 0008 0730
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * 735 0008 0735
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #include <linux/hwmon-sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #include <linux/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * If force_addr is set to anything different from 0, we forcibly enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * the device at the given address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static u16 force_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) module_param(force_addr, ushort, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) MODULE_PARM_DESC(force_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) "Initialize the base address of the sensors");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static struct platform_device *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* Many SIS5595 constants specified below */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /* Length of ISA address segment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define SIS5595_EXTENT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* PCI Config Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define SIS5595_BASE_REG 0x68
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define SIS5595_PIN_REG 0x7A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define SIS5595_ENABLE_REG 0x7B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /* Where are the ISA address/data registers relative to the base address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define SIS5595_ADDR_REG_OFFSET 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define SIS5595_DATA_REG_OFFSET 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /* The SIS5595 registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define SIS5595_REG_IN_MAX(nr) (0x2b + (nr) * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define SIS5595_REG_IN_MIN(nr) (0x2c + (nr) * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define SIS5595_REG_IN(nr) (0x20 + (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define SIS5595_REG_FAN_MIN(nr) (0x3b + (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define SIS5595_REG_FAN(nr) (0x28 + (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * On the first version of the chip, the temp registers are separate.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * On the second version,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * TEMP pin is shared with IN4, configured in PCI register 0x7A.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * The registers are the same as well.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * OVER and HYST are really MAX and MIN.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define REV2MIN 0xb0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define SIS5595_REG_TEMP (((data->revision) >= REV2MIN) ? \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) SIS5595_REG_IN(4) : 0x27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define SIS5595_REG_TEMP_OVER (((data->revision) >= REV2MIN) ? \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) SIS5595_REG_IN_MAX(4) : 0x39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define SIS5595_REG_TEMP_HYST (((data->revision) >= REV2MIN) ? \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) SIS5595_REG_IN_MIN(4) : 0x3a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define SIS5595_REG_CONFIG 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define SIS5595_REG_ALARM1 0x41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define SIS5595_REG_ALARM2 0x42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define SIS5595_REG_FANDIV 0x47
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * Conversions. Limit checking is only done on the TO_REG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * variants.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * IN: mV, (0V to 4.08V)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * REG: 16mV/bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static inline u8 IN_TO_REG(unsigned long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) unsigned long nval = clamp_val(val, 0, 4080);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return (nval + 8) / 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define IN_FROM_REG(val) ((val) * 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static inline u8 FAN_TO_REG(long rpm, int div)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) if (rpm <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) return 255;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) if (rpm > 1350000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static inline int FAN_FROM_REG(u8 val, int div)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return val == 0 ? -1 : val == 255 ? 0 : 1350000 / (val * div);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * TEMP: mC (-54.12C to +157.53C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * REG: 0.83C/bit + 52.12, two's complement
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static inline int TEMP_FROM_REG(s8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) return val * 830 + 52120;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static inline s8 TEMP_TO_REG(long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) int nval = clamp_val(val, -54120, 157530) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return nval < 0 ? (nval - 5212 - 415) / 830 : (nval - 5212 + 415) / 830;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) * FAN DIV: 1, 2, 4, or 8 (defaults to 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) * REG: 0, 1, 2, or 3 (respectively) (defaults to 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) static inline u8 DIV_TO_REG(int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) return val == 8 ? 3 : val == 4 ? 2 : val == 1 ? 0 : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #define DIV_FROM_REG(val) (1 << (val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) * For each registered chip, we need to keep some data in memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * The structure is dynamically allocated.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) struct sis5595_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) unsigned short addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) struct mutex update_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) char valid; /* !=0 if following fields are valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) unsigned long last_updated; /* In jiffies */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) char maxins; /* == 3 if temp enabled, otherwise == 4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) u8 revision; /* Reg. value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) u8 in[5]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) u8 in_max[5]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) u8 in_min[5]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) u8 fan[2]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) u8 fan_min[2]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) s8 temp; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) s8 temp_over; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) s8 temp_hyst; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) u8 fan_div[2]; /* Register encoding, shifted right */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) u16 alarms; /* Register encoding, combined */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static struct pci_dev *s_bridge; /* pointer to the (only) sis5595 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static int sis5595_probe(struct platform_device *pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static int sis5595_remove(struct platform_device *pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static int sis5595_read_value(struct sis5595_data *data, u8 reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static void sis5595_write_value(struct sis5595_data *data, u8 reg, u8 value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static struct sis5595_data *sis5595_update_device(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static void sis5595_init_device(struct sis5595_data *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) static struct platform_driver sis5595_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) .name = "sis5595",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) .probe = sis5595_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .remove = sis5595_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) /* 4 Voltages */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) static ssize_t in_show(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) struct sis5595_data *data = sis5595_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) return sprintf(buf, "%d\n", IN_FROM_REG(data->in[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static ssize_t in_min_show(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) struct sis5595_data *data = sis5595_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) return sprintf(buf, "%d\n", IN_FROM_REG(data->in_min[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) static ssize_t in_max_show(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) struct sis5595_data *data = sis5595_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) return sprintf(buf, "%d\n", IN_FROM_REG(data->in_max[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static ssize_t in_min_store(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) struct sis5595_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) data->in_min[nr] = IN_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) sis5595_write_value(data, SIS5595_REG_IN_MIN(nr), data->in_min[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static ssize_t in_max_store(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) struct sis5595_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) data->in_max[nr] = IN_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) sis5595_write_value(data, SIS5595_REG_IN_MAX(nr), data->in_max[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) static SENSOR_DEVICE_ATTR_RO(in0_input, in, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) static SENSOR_DEVICE_ATTR_RW(in0_min, in_min, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) static SENSOR_DEVICE_ATTR_RW(in0_max, in_max, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) static SENSOR_DEVICE_ATTR_RO(in1_input, in, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) static SENSOR_DEVICE_ATTR_RW(in1_min, in_min, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) static SENSOR_DEVICE_ATTR_RW(in1_max, in_max, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) static SENSOR_DEVICE_ATTR_RO(in2_input, in, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static SENSOR_DEVICE_ATTR_RW(in2_min, in_min, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static SENSOR_DEVICE_ATTR_RW(in2_max, in_max, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) static SENSOR_DEVICE_ATTR_RO(in3_input, in, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static SENSOR_DEVICE_ATTR_RW(in3_min, in_min, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) static SENSOR_DEVICE_ATTR_RW(in3_max, in_max, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) static SENSOR_DEVICE_ATTR_RO(in4_input, in, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) static SENSOR_DEVICE_ATTR_RW(in4_min, in_min, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) static SENSOR_DEVICE_ATTR_RW(in4_max, in_max, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) /* Temperature */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) static ssize_t temp1_input_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) struct sis5595_data *data = sis5595_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) static ssize_t temp1_max_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) struct sis5595_data *data = sis5595_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_over));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) static ssize_t temp1_max_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) struct device_attribute *attr, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) struct sis5595_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) data->temp_over = TEMP_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) sis5595_write_value(data, SIS5595_REG_TEMP_OVER, data->temp_over);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) static ssize_t temp1_max_hyst_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) struct sis5595_data *data = sis5595_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_hyst));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) static ssize_t temp1_max_hyst_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) struct sis5595_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) data->temp_hyst = TEMP_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) sis5595_write_value(data, SIS5595_REG_TEMP_HYST, data->temp_hyst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static DEVICE_ATTR_RO(temp1_input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) static DEVICE_ATTR_RW(temp1_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) static DEVICE_ATTR_RW(temp1_max_hyst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) /* 2 Fans */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) static ssize_t fan_show(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) struct sis5595_data *data = sis5595_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[nr],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) DIV_FROM_REG(data->fan_div[nr])));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) static ssize_t fan_min_show(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) struct sis5595_data *data = sis5595_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan_min[nr],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) DIV_FROM_REG(data->fan_div[nr])));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) static ssize_t fan_min_store(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) struct sis5595_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) sis5595_write_value(data, SIS5595_REG_FAN_MIN(nr), data->fan_min[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) static ssize_t fan_div_show(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) struct sis5595_data *data = sis5595_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) * Note: we save and restore the fan minimum here, because its value is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) * determined in part by the fan divisor. This follows the principle of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) * least surprise; the user doesn't expect the fan minimum to change just
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) * because the divisor changed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) static ssize_t fan_div_store(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) struct sis5595_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) unsigned long min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) min = FAN_FROM_REG(data->fan_min[nr],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) DIV_FROM_REG(data->fan_div[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) reg = sis5595_read_value(data, SIS5595_REG_FANDIV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) switch (val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) data->fan_div[nr] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) data->fan_div[nr] = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) data->fan_div[nr] = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) case 8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) data->fan_div[nr] = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) "fan_div value %ld not supported. Choose one of 1, 2, 4 or 8!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) switch (nr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) reg = (reg & 0xcf) | (data->fan_div[nr] << 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) reg = (reg & 0x3f) | (data->fan_div[nr] << 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) sis5595_write_value(data, SIS5595_REG_FANDIV, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) data->fan_min[nr] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) sis5595_write_value(data, SIS5595_REG_FAN_MIN(nr), data->fan_min[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) static SENSOR_DEVICE_ATTR_RO(fan1_input, fan, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) static SENSOR_DEVICE_ATTR_RW(fan1_min, fan_min, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) static SENSOR_DEVICE_ATTR_RW(fan1_div, fan_div, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) static SENSOR_DEVICE_ATTR_RO(fan2_input, fan, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) static SENSOR_DEVICE_ATTR_RW(fan2_min, fan_min, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) static SENSOR_DEVICE_ATTR_RW(fan2_div, fan_div, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) /* Alarms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) struct sis5595_data *data = sis5595_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) return sprintf(buf, "%d\n", data->alarms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) static DEVICE_ATTR_RO(alarms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) static ssize_t alarm_show(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) struct sis5595_data *data = sis5595_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) int nr = to_sensor_dev_attr(da)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) return sprintf(buf, "%u\n", (data->alarms >> nr) & 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) static SENSOR_DEVICE_ATTR_RO(in0_alarm, alarm, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) static SENSOR_DEVICE_ATTR_RO(in1_alarm, alarm, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) static SENSOR_DEVICE_ATTR_RO(in2_alarm, alarm, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) static SENSOR_DEVICE_ATTR_RO(in3_alarm, alarm, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) static SENSOR_DEVICE_ATTR_RO(in4_alarm, alarm, 15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) static SENSOR_DEVICE_ATTR_RO(fan1_alarm, alarm, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) static SENSOR_DEVICE_ATTR_RO(fan2_alarm, alarm, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) static SENSOR_DEVICE_ATTR_RO(temp1_alarm, alarm, 15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) static ssize_t name_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) struct sis5595_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) return sprintf(buf, "%s\n", data->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) static DEVICE_ATTR_RO(name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) static struct attribute *sis5595_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) &sensor_dev_attr_in0_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) &sensor_dev_attr_in0_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) &sensor_dev_attr_in0_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) &sensor_dev_attr_in0_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) &sensor_dev_attr_in1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) &sensor_dev_attr_in1_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) &sensor_dev_attr_in1_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) &sensor_dev_attr_in1_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) &sensor_dev_attr_in2_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) &sensor_dev_attr_in2_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) &sensor_dev_attr_in2_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) &sensor_dev_attr_in2_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) &sensor_dev_attr_in3_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) &sensor_dev_attr_in3_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) &sensor_dev_attr_in3_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) &sensor_dev_attr_in3_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) &sensor_dev_attr_fan1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) &sensor_dev_attr_fan1_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) &sensor_dev_attr_fan1_div.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) &sensor_dev_attr_fan1_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) &sensor_dev_attr_fan2_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) &sensor_dev_attr_fan2_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) &sensor_dev_attr_fan2_div.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) &sensor_dev_attr_fan2_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) &dev_attr_alarms.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) &dev_attr_name.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) static const struct attribute_group sis5595_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) .attrs = sis5595_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) static struct attribute *sis5595_attributes_in4[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) &sensor_dev_attr_in4_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) &sensor_dev_attr_in4_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) &sensor_dev_attr_in4_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) &sensor_dev_attr_in4_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) static const struct attribute_group sis5595_group_in4 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) .attrs = sis5595_attributes_in4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) static struct attribute *sis5595_attributes_temp1[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) &dev_attr_temp1_input.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) &dev_attr_temp1_max.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) &dev_attr_temp1_max_hyst.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) &sensor_dev_attr_temp1_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) static const struct attribute_group sis5595_group_temp1 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) .attrs = sis5595_attributes_temp1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) /* This is called when the module is loaded */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) static int sis5595_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) struct sis5595_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) char val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) /* Reserve the ISA region */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) res = platform_get_resource(pdev, IORESOURCE_IO, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) if (!devm_request_region(&pdev->dev, res->start, SIS5595_EXTENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) sis5595_driver.driver.name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) data = devm_kzalloc(&pdev->dev, sizeof(struct sis5595_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) mutex_init(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) mutex_init(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) data->addr = res->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) data->name = "sis5595";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) platform_set_drvdata(pdev, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) * Check revision and pin registers to determine whether 4 or 5 voltages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) data->revision = s_bridge->revision;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) /* 4 voltages, 1 temp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) data->maxins = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) if (data->revision >= REV2MIN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) pci_read_config_byte(s_bridge, SIS5595_PIN_REG, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) if (!(val & 0x80))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) /* 5 voltages, no temps */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) data->maxins = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) /* Initialize the SIS5595 chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) sis5595_init_device(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) /* A few vars need to be filled upon startup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) for (i = 0; i < 2; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) data->fan_min[i] = sis5595_read_value(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) SIS5595_REG_FAN_MIN(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) /* Register sysfs hooks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) err = sysfs_create_group(&pdev->dev.kobj, &sis5595_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) if (data->maxins == 4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) err = sysfs_create_group(&pdev->dev.kobj, &sis5595_group_in4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) goto exit_remove_files;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) err = sysfs_create_group(&pdev->dev.kobj, &sis5595_group_temp1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) goto exit_remove_files;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) data->hwmon_dev = hwmon_device_register(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) if (IS_ERR(data->hwmon_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) err = PTR_ERR(data->hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) goto exit_remove_files;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) exit_remove_files:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) sysfs_remove_group(&pdev->dev.kobj, &sis5595_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) sysfs_remove_group(&pdev->dev.kobj, &sis5595_group_in4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) sysfs_remove_group(&pdev->dev.kobj, &sis5595_group_temp1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) static int sis5595_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) struct sis5595_data *data = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) hwmon_device_unregister(data->hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) sysfs_remove_group(&pdev->dev.kobj, &sis5595_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) sysfs_remove_group(&pdev->dev.kobj, &sis5595_group_in4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) sysfs_remove_group(&pdev->dev.kobj, &sis5595_group_temp1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) /* ISA access must be locked explicitly. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) static int sis5595_read_value(struct sis5595_data *data, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) int res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) outb_p(reg, data->addr + SIS5595_ADDR_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) res = inb_p(data->addr + SIS5595_DATA_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) static void sis5595_write_value(struct sis5595_data *data, u8 reg, u8 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) outb_p(reg, data->addr + SIS5595_ADDR_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) outb_p(value, data->addr + SIS5595_DATA_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) /* Called when we have found a new SIS5595. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) static void sis5595_init_device(struct sis5595_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) u8 config = sis5595_read_value(data, SIS5595_REG_CONFIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) if (!(config & 0x01))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) sis5595_write_value(data, SIS5595_REG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) (config & 0xf7) | 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) static struct sis5595_data *sis5595_update_device(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) struct sis5595_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) || !data->valid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) for (i = 0; i <= data->maxins; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) data->in[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) sis5595_read_value(data, SIS5595_REG_IN(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) data->in_min[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) sis5595_read_value(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) SIS5595_REG_IN_MIN(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) data->in_max[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) sis5595_read_value(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) SIS5595_REG_IN_MAX(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) for (i = 0; i < 2; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) data->fan[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) sis5595_read_value(data, SIS5595_REG_FAN(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) data->fan_min[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) sis5595_read_value(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) SIS5595_REG_FAN_MIN(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) if (data->maxins == 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) data->temp =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) sis5595_read_value(data, SIS5595_REG_TEMP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) data->temp_over =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) sis5595_read_value(data, SIS5595_REG_TEMP_OVER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) data->temp_hyst =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) sis5595_read_value(data, SIS5595_REG_TEMP_HYST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) i = sis5595_read_value(data, SIS5595_REG_FANDIV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) data->fan_div[0] = (i >> 4) & 0x03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) data->fan_div[1] = i >> 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) data->alarms =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) sis5595_read_value(data, SIS5595_REG_ALARM1) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) (sis5595_read_value(data, SIS5595_REG_ALARM2) << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) data->last_updated = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) data->valid = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) return data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) static const struct pci_device_id sis5595_pci_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) { 0, }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) MODULE_DEVICE_TABLE(pci, sis5595_pci_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) static int blacklist[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) PCI_DEVICE_ID_SI_540,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) PCI_DEVICE_ID_SI_550,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) PCI_DEVICE_ID_SI_630,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) PCI_DEVICE_ID_SI_645,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) PCI_DEVICE_ID_SI_730,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) PCI_DEVICE_ID_SI_735,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) PCI_DEVICE_ID_SI_5511, /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) * 5513 chip has the 0008 device but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) * that ID shows up in other chips so we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) * use the 5511 ID for recognition
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) PCI_DEVICE_ID_SI_5597,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) PCI_DEVICE_ID_SI_5598,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) static int sis5595_device_add(unsigned short address)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) struct resource res = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) .start = address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) .end = address + SIS5595_EXTENT - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) .name = "sis5595",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) .flags = IORESOURCE_IO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) err = acpi_check_resource_conflict(&res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) pdev = platform_device_alloc("sis5595", address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) if (!pdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) err = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) pr_err("Device allocation failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) err = platform_device_add_resources(pdev, &res, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) pr_err("Device resource addition failed (%d)\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) goto exit_device_put;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) err = platform_device_add(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) pr_err("Device addition failed (%d)\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) goto exit_device_put;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) exit_device_put:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) platform_device_put(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) static int sis5595_pci_probe(struct pci_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) const struct pci_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) u16 address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) u8 enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) int *i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) for (i = blacklist; *i != 0; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) struct pci_dev *d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) d = pci_get_device(PCI_VENDOR_ID_SI, *i, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) if (d) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) dev_err(&d->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) "Looked for SIS5595 but found unsupported device %.4x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) *i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) pci_dev_put(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) force_addr &= ~(SIS5595_EXTENT - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) if (force_addr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) dev_warn(&dev->dev, "Forcing ISA address 0x%x\n", force_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) pci_write_config_word(dev, SIS5595_BASE_REG, force_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) if (PCIBIOS_SUCCESSFUL !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) pci_read_config_word(dev, SIS5595_BASE_REG, &address)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) dev_err(&dev->dev, "Failed to read ISA address\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) address &= ~(SIS5595_EXTENT - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) if (!address) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) dev_err(&dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) "Base address not set - upgrade BIOS or use force_addr=0xaddr\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) if (force_addr && address != force_addr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) /* doesn't work for some chips? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) dev_err(&dev->dev, "Failed to force ISA address\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) if (PCIBIOS_SUCCESSFUL !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) pci_read_config_byte(dev, SIS5595_ENABLE_REG, &enable)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) dev_err(&dev->dev, "Failed to read enable register\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) if (!(enable & 0x80)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) if ((PCIBIOS_SUCCESSFUL !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) pci_write_config_byte(dev, SIS5595_ENABLE_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) enable | 0x80))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) || (PCIBIOS_SUCCESSFUL !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) pci_read_config_byte(dev, SIS5595_ENABLE_REG, &enable))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) || (!(enable & 0x80))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) /* doesn't work for some chips! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) dev_err(&dev->dev, "Failed to enable HWM device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) if (platform_driver_register(&sis5595_driver)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) dev_dbg(&dev->dev, "Failed to register sis5595 driver\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) s_bridge = pci_dev_get(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) /* Sets global pdev as a side effect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) if (sis5595_device_add(address))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) goto exit_unregister;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) * Always return failure here. This is to allow other drivers to bind
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) * to this pci device. We don't really want to have control over the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) * pci device, we only wanted to read as few register values from it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) exit_unregister:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) pci_dev_put(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) platform_driver_unregister(&sis5595_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) static struct pci_driver sis5595_pci_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) .name = "sis5595",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) .id_table = sis5595_pci_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) .probe = sis5595_pci_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) static int __init sm_sis5595_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) return pci_register_driver(&sis5595_pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) static void __exit sm_sis5595_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) pci_unregister_driver(&sis5595_pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) if (s_bridge != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) platform_device_unregister(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) platform_driver_unregister(&sis5595_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) pci_dev_put(s_bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) s_bridge = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) MODULE_AUTHOR("Aurelien Jarno <aurelien@aurel32.net>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) MODULE_DESCRIPTION("SiS 5595 Sensor device");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) module_init(sm_sis5595_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) module_exit(sm_sis5595_exit);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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