Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Hardware monitoring driver for ZL6100 and compatibles
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (c) 2011 Ericsson AB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (c) 2012 Guenter Roeck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/ktime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include "pmbus.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) enum chips { zl2004, zl2005, zl2006, zl2008, zl2105, zl2106, zl6100, zl6105,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	     zl9101, zl9117 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) struct zl6100_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	ktime_t access;		/* chip access time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	int delay;		/* Delay between chip accesses in uS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	struct pmbus_driver_info info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define to_zl6100_data(x)  container_of(x, struct zl6100_data, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define ZL6100_MFR_CONFIG		0xd0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define ZL6100_DEVICE_ID		0xe4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define ZL6100_MFR_XTEMP_ENABLE		BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define MFR_VMON_OV_FAULT_LIMIT		0xf5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define MFR_VMON_UV_FAULT_LIMIT		0xf6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define MFR_READ_VMON			0xf7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define VMON_UV_WARNING			BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define VMON_OV_WARNING			BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define VMON_UV_FAULT			BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define VMON_OV_FAULT			BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define ZL6100_WAIT_TIME		1000	/* uS	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) static ushort delay = ZL6100_WAIT_TIME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) module_param(delay, ushort, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) MODULE_PARM_DESC(delay, "Delay between chip accesses in uS");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) /* Convert linear sensor value to milli-units */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) static long zl6100_l2d(s16 l)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	s16 exponent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	s32 mantissa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	exponent = l >> 11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	mantissa = ((s16)((l & 0x7ff) << 5)) >> 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	val = mantissa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	/* scale result to milli-units */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	val = val * 1000L;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	if (exponent >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		val <<= exponent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		val >>= -exponent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) #define MAX_MANTISSA	(1023 * 1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) #define MIN_MANTISSA	(511 * 1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) static u16 zl6100_d2l(long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	s16 exponent = 0, mantissa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	bool negative = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	/* simple case */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	if (val == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	if (val < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		negative = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		val = -val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	/* Reduce large mantissa until it fits into 10 bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	while (val >= MAX_MANTISSA && exponent < 15) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		exponent++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		val >>= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	/* Increase small mantissa to improve precision */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	while (val < MIN_MANTISSA && exponent > -15) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		exponent--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		val <<= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	/* Convert mantissa from milli-units to units */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	mantissa = DIV_ROUND_CLOSEST(val, 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	/* Ensure that resulting number is within range */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	if (mantissa > 0x3ff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		mantissa = 0x3ff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	/* restore sign */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	if (negative)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		mantissa = -mantissa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	/* Convert to 5 bit exponent, 11 bit mantissa */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	return (mantissa & 0x7ff) | ((exponent << 11) & 0xf800);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /* Some chips need a delay between accesses */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static inline void zl6100_wait(const struct zl6100_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	if (data->delay) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		s64 delta = ktime_us_delta(ktime_get(), data->access);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		if (delta < data->delay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 			udelay(data->delay - delta);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static int zl6100_read_word_data(struct i2c_client *client, int page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 				 int phase, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	struct zl6100_data *data = to_zl6100_data(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	int ret, vreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	if (page > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	if (data->id == zl2005) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		 * Limit register detection is not reliable on ZL2005.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		 * Make sure registers are not erroneously detected.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		case PMBUS_VOUT_OV_WARN_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		case PMBUS_VOUT_UV_WARN_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		case PMBUS_IOUT_OC_WARN_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 			return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	case PMBUS_VIRT_READ_VMON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		vreg = MFR_READ_VMON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	case PMBUS_VIRT_VMON_OV_WARN_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	case PMBUS_VIRT_VMON_OV_FAULT_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		vreg = MFR_VMON_OV_FAULT_LIMIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	case PMBUS_VIRT_VMON_UV_WARN_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	case PMBUS_VIRT_VMON_UV_FAULT_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		vreg = MFR_VMON_UV_FAULT_LIMIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		if (reg >= PMBUS_VIRT_BASE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 			return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		vreg = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	zl6100_wait(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	ret = pmbus_read_word_data(client, page, phase, vreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	data->access = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	case PMBUS_VIRT_VMON_OV_WARN_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		ret = zl6100_d2l(DIV_ROUND_CLOSEST(zl6100_l2d(ret) * 9, 10));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	case PMBUS_VIRT_VMON_UV_WARN_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		ret = zl6100_d2l(DIV_ROUND_CLOSEST(zl6100_l2d(ret) * 11, 10));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static int zl6100_read_byte_data(struct i2c_client *client, int page, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	struct zl6100_data *data = to_zl6100_data(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	int ret, status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	if (page > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	zl6100_wait(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	case PMBUS_VIRT_STATUS_VMON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		ret = pmbus_read_byte_data(client, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 					   PMBUS_STATUS_MFR_SPECIFIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		if (ret & VMON_UV_WARNING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 			status |= PB_VOLTAGE_UV_WARNING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		if (ret & VMON_OV_WARNING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 			status |= PB_VOLTAGE_OV_WARNING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		if (ret & VMON_UV_FAULT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 			status |= PB_VOLTAGE_UV_FAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 		if (ret & VMON_OV_FAULT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 			status |= PB_VOLTAGE_OV_FAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		ret = status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		ret = pmbus_read_byte_data(client, page, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	data->access = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) static int zl6100_write_word_data(struct i2c_client *client, int page, int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 				  u16 word)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	struct zl6100_data *data = to_zl6100_data(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	int ret, vreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	if (page > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	case PMBUS_VIRT_VMON_OV_WARN_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		word = zl6100_d2l(DIV_ROUND_CLOSEST(zl6100_l2d(word) * 10, 9));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		vreg = MFR_VMON_OV_FAULT_LIMIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		pmbus_clear_cache(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	case PMBUS_VIRT_VMON_OV_FAULT_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		vreg = MFR_VMON_OV_FAULT_LIMIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 		pmbus_clear_cache(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	case PMBUS_VIRT_VMON_UV_WARN_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 		word = zl6100_d2l(DIV_ROUND_CLOSEST(zl6100_l2d(word) * 10, 11));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		vreg = MFR_VMON_UV_FAULT_LIMIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 		pmbus_clear_cache(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	case PMBUS_VIRT_VMON_UV_FAULT_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 		vreg = MFR_VMON_UV_FAULT_LIMIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		pmbus_clear_cache(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		if (reg >= PMBUS_VIRT_BASE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 			return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 		vreg = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	zl6100_wait(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	ret = pmbus_write_word_data(client, page, vreg, word);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	data->access = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) static int zl6100_write_byte(struct i2c_client *client, int page, u8 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	struct zl6100_data *data = to_zl6100_data(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	if (page > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 		return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	zl6100_wait(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	ret = pmbus_write_byte(client, page, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	data->access = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) static const struct i2c_device_id zl6100_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	{"bmr450", zl2005},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	{"bmr451", zl2005},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	{"bmr462", zl2008},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	{"bmr463", zl2008},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	{"bmr464", zl2008},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	{"zl2004", zl2004},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	{"zl2005", zl2005},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	{"zl2006", zl2006},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	{"zl2008", zl2008},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	{"zl2105", zl2105},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	{"zl2106", zl2106},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	{"zl6100", zl6100},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	{"zl6105", zl6105},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	{"zl9101", zl9101},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	{"zl9117", zl9117},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) MODULE_DEVICE_TABLE(i2c, zl6100_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) static int zl6100_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	struct zl6100_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	struct pmbus_driver_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	u8 device_id[I2C_SMBUS_BLOCK_MAX + 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	const struct i2c_device_id *mid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	if (!i2c_check_functionality(client->adapter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 				     I2C_FUNC_SMBUS_READ_WORD_DATA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 				     | I2C_FUNC_SMBUS_READ_BLOCK_DATA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	ret = i2c_smbus_read_block_data(client, ZL6100_DEVICE_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 					device_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 		dev_err(&client->dev, "Failed to read device ID\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	device_id[ret] = '\0';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	dev_info(&client->dev, "Device ID %s\n", device_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	mid = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	for (mid = zl6100_id; mid->name[0]; mid++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 		if (!strncasecmp(mid->name, device_id, strlen(mid->name)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	if (!mid->name[0]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 		dev_err(&client->dev, "Unsupported device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	if (strcmp(client->name, mid->name) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 		dev_notice(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 			   "Device mismatch: Configured %s, detected %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 			   client->name, mid->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	data = devm_kzalloc(&client->dev, sizeof(struct zl6100_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 			    GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	data->id = mid->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	 * According to information from the chip vendor, all currently
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	 * supported chips are known to require a wait time between I2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	 * accesses.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	data->delay = delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	 * Since there was a direct I2C device access above, wait before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	 * accessing the chip again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	data->access = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	zl6100_wait(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	info = &data->info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	info->pages = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	info->func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_STATUS_INPUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	  | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	  | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	  | PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	 * ZL2004, ZL9101M, and ZL9117M support monitoring an extra voltage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	 * (VMON for ZL2004, VDRV for ZL9101M and ZL9117M). Report it as vmon.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	if (data->id == zl2004 || data->id == zl9101 || data->id == zl9117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 		info->func[0] |= PMBUS_HAVE_VMON | PMBUS_HAVE_STATUS_VMON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	ret = i2c_smbus_read_word_data(client, ZL6100_MFR_CONFIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	if (ret & ZL6100_MFR_XTEMP_ENABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 		info->func[0] |= PMBUS_HAVE_TEMP2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	data->access = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	zl6100_wait(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	info->read_word_data = zl6100_read_word_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	info->read_byte_data = zl6100_read_byte_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	info->write_word_data = zl6100_write_word_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	info->write_byte = zl6100_write_byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	return pmbus_do_probe(client, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) static struct i2c_driver zl6100_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 		   .name = "zl6100",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 		   },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	.probe_new = zl6100_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	.remove = pmbus_do_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	.id_table = zl6100_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) module_i2c_driver(zl6100_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) MODULE_AUTHOR("Guenter Roeck");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) MODULE_DESCRIPTION("PMBus driver for ZL6100 and compatibles");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) MODULE_LICENSE("GPL");