^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Hardware monitoring driver for UCD90xxx Sequencer and System Health
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Controller series
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2011 Ericsson AB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/debugfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/pmbus.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "pmbus.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) enum chips { ucd9000, ucd90120, ucd90124, ucd90160, ucd90320, ucd9090,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) ucd90910 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define UCD9000_MONITOR_CONFIG 0xd5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define UCD9000_NUM_PAGES 0xd6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define UCD9000_FAN_CONFIG_INDEX 0xe7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define UCD9000_FAN_CONFIG 0xe8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define UCD9000_MFR_STATUS 0xf3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define UCD9000_GPIO_SELECT 0xfa
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define UCD9000_GPIO_CONFIG 0xfb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define UCD9000_DEVICE_ID 0xfd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /* GPIO CONFIG bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define UCD9000_GPIO_CONFIG_ENABLE BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define UCD9000_GPIO_CONFIG_OUT_ENABLE BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define UCD9000_GPIO_CONFIG_OUT_VALUE BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define UCD9000_GPIO_CONFIG_STATUS BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define UCD9000_GPIO_INPUT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define UCD9000_GPIO_OUTPUT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define UCD9000_MON_TYPE(x) (((x) >> 5) & 0x07)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define UCD9000_MON_PAGE(x) ((x) & 0x1f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define UCD9000_MON_VOLTAGE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define UCD9000_MON_TEMPERATURE 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define UCD9000_MON_CURRENT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define UCD9000_MON_VOLTAGE_HW 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define UCD9000_NUM_FAN 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define UCD9000_GPIO_NAME_LEN 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define UCD9090_NUM_GPIOS 23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define UCD901XX_NUM_GPIOS 26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define UCD90320_NUM_GPIOS 84
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define UCD90910_NUM_GPIOS 26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define UCD9000_DEBUGFS_NAME_LEN 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define UCD9000_GPI_COUNT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define UCD90320_GPI_COUNT 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct ucd9000_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) u8 fan_data[UCD9000_NUM_FAN][I2C_SMBUS_BLOCK_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct pmbus_driver_info info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #ifdef CONFIG_GPIOLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct gpio_chip gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct dentry *debugfs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define to_ucd9000_data(_info) container_of(_info, struct ucd9000_data, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct ucd9000_debugfs_entry {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) u8 index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static int ucd9000_get_fan_config(struct i2c_client *client, int fan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) int fan_config = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) struct ucd9000_data *data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) = to_ucd9000_data(pmbus_get_driver_info(client));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (data->fan_data[fan][3] & 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) fan_config |= PB_FAN_2_INSTALLED; /* Use lower bit position */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /* Pulses/revolution */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) fan_config |= (data->fan_data[fan][3] & 0x06) >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return fan_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static int ucd9000_read_byte_data(struct i2c_client *client, int page, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) int fan_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) case PMBUS_FAN_CONFIG_12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) if (page > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) ret = ucd9000_get_fan_config(client, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) fan_config = ret << 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) ret = ucd9000_get_fan_config(client, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) fan_config |= ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) ret = fan_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) case PMBUS_FAN_CONFIG_34:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) if (page > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) ret = ucd9000_get_fan_config(client, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) fan_config = ret << 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) ret = ucd9000_get_fan_config(client, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) fan_config |= ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) ret = fan_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) ret = -ENODATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static const struct i2c_device_id ucd9000_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {"ucd9000", ucd9000},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {"ucd90120", ucd90120},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {"ucd90124", ucd90124},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {"ucd90160", ucd90160},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {"ucd90320", ucd90320},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {"ucd9090", ucd9090},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {"ucd90910", ucd90910},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) MODULE_DEVICE_TABLE(i2c, ucd9000_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static const struct of_device_id __maybe_unused ucd9000_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .compatible = "ti,ucd9000",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .data = (void *)ucd9000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .compatible = "ti,ucd90120",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .data = (void *)ucd90120
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .compatible = "ti,ucd90124",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .data = (void *)ucd90124
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .compatible = "ti,ucd90160",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .data = (void *)ucd90160
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .compatible = "ti,ucd90320",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .data = (void *)ucd90320
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .compatible = "ti,ucd9090",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .data = (void *)ucd9090
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .compatible = "ti,ucd90910",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .data = (void *)ucd90910
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) MODULE_DEVICE_TABLE(of, ucd9000_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #ifdef CONFIG_GPIOLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static int ucd9000_gpio_read_config(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) /* No page set required */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_SELECT, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) return i2c_smbus_read_byte_data(client, UCD9000_GPIO_CONFIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static int ucd9000_gpio_get(struct gpio_chip *gc, unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) struct i2c_client *client = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) ret = ucd9000_gpio_read_config(client, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) return !!(ret & UCD9000_GPIO_CONFIG_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static void ucd9000_gpio_set(struct gpio_chip *gc, unsigned int offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) struct i2c_client *client = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) ret = ucd9000_gpio_read_config(client, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) dev_dbg(&client->dev, "failed to read GPIO %d config: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) offset, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) if (value) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) if (ret & UCD9000_GPIO_CONFIG_STATUS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) ret |= UCD9000_GPIO_CONFIG_STATUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) if (!(ret & UCD9000_GPIO_CONFIG_STATUS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) ret &= ~UCD9000_GPIO_CONFIG_STATUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) ret |= UCD9000_GPIO_CONFIG_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) /* Page set not required */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) dev_dbg(&client->dev, "Failed to write GPIO %d config: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) offset, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) ret &= ~UCD9000_GPIO_CONFIG_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) dev_dbg(&client->dev, "Failed to write GPIO %d config: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) offset, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static int ucd9000_gpio_get_direction(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) struct i2c_client *client = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) ret = ucd9000_gpio_read_config(client, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) return !(ret & UCD9000_GPIO_CONFIG_OUT_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) static int ucd9000_gpio_set_direction(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) unsigned int offset, bool direction_out,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) int requested_out)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) struct i2c_client *client = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) int ret, config, out_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) ret = ucd9000_gpio_read_config(client, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) if (direction_out) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) out_val = requested_out ? UCD9000_GPIO_CONFIG_OUT_VALUE : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) if (ret & UCD9000_GPIO_CONFIG_OUT_ENABLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) if ((ret & UCD9000_GPIO_CONFIG_OUT_VALUE) == out_val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) ret |= UCD9000_GPIO_CONFIG_OUT_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) if (out_val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) ret |= UCD9000_GPIO_CONFIG_OUT_VALUE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) ret &= ~UCD9000_GPIO_CONFIG_OUT_VALUE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) if (!(ret & UCD9000_GPIO_CONFIG_OUT_ENABLE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) ret &= ~UCD9000_GPIO_CONFIG_OUT_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) ret |= UCD9000_GPIO_CONFIG_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) config = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) /* Page set not required */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) config &= ~UCD9000_GPIO_CONFIG_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) return i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) static int ucd9000_gpio_direction_input(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) return ucd9000_gpio_set_direction(gc, offset, UCD9000_GPIO_INPUT, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) static int ucd9000_gpio_direction_output(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) unsigned int offset, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) return ucd9000_gpio_set_direction(gc, offset, UCD9000_GPIO_OUTPUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) static void ucd9000_probe_gpio(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) const struct i2c_device_id *mid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) struct ucd9000_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) switch (mid->driver_data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) case ucd9090:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) data->gpio.ngpio = UCD9090_NUM_GPIOS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) case ucd90120:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) case ucd90124:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) case ucd90160:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) data->gpio.ngpio = UCD901XX_NUM_GPIOS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) case ucd90320:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) data->gpio.ngpio = UCD90320_NUM_GPIOS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) case ucd90910:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) data->gpio.ngpio = UCD90910_NUM_GPIOS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) return; /* GPIO support is optional. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) * Pinmux support has not been added to the new gpio_chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) * This support should be added when possible given the mux
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) * behavior of these IO devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) data->gpio.label = client->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) data->gpio.get_direction = ucd9000_gpio_get_direction;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) data->gpio.direction_input = ucd9000_gpio_direction_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) data->gpio.direction_output = ucd9000_gpio_direction_output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) data->gpio.get = ucd9000_gpio_get;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) data->gpio.set = ucd9000_gpio_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) data->gpio.can_sleep = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) data->gpio.base = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) data->gpio.parent = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) rc = devm_gpiochip_add_data(&client->dev, &data->gpio, client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) dev_warn(&client->dev, "Could not add gpiochip: %d\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) static void ucd9000_probe_gpio(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) const struct i2c_device_id *mid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) struct ucd9000_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) #endif /* CONFIG_GPIOLIB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) #ifdef CONFIG_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) static int ucd9000_get_mfr_status(struct i2c_client *client, u8 *buffer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) int ret = pmbus_set_page(client, 0, 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) return i2c_smbus_read_block_data(client, UCD9000_MFR_STATUS, buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) static int ucd9000_debugfs_show_mfr_status_bit(void *data, u64 *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) struct ucd9000_debugfs_entry *entry = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) struct i2c_client *client = entry->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) u8 buffer[I2C_SMBUS_BLOCK_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) ret = ucd9000_get_mfr_status(client, buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) * GPI fault bits are in sets of 8, two bytes from end of response.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) i = ret - 3 - entry->index / 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) if (i >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) *val = !!(buffer[i] & BIT(entry->index % 8));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) DEFINE_DEBUGFS_ATTRIBUTE(ucd9000_debugfs_mfr_status_bit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) ucd9000_debugfs_show_mfr_status_bit, NULL, "%1lld\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) static ssize_t ucd9000_debugfs_read_mfr_status(struct file *file,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) char __user *buf, size_t count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) struct i2c_client *client = file->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) u8 buffer[I2C_SMBUS_BLOCK_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) char str[(I2C_SMBUS_BLOCK_MAX * 2) + 2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) char *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) rc = ucd9000_get_mfr_status(client, buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) res = bin2hex(str, buffer, min(rc, I2C_SMBUS_BLOCK_MAX));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) *res++ = '\n';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) *res = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) return simple_read_from_buffer(buf, count, ppos, str, res - str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) static const struct file_operations ucd9000_debugfs_show_mfr_status_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .llseek = noop_llseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) .read = ucd9000_debugfs_read_mfr_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) .open = simple_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) static int ucd9000_init_debugfs(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) const struct i2c_device_id *mid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) struct ucd9000_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) struct dentry *debugfs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) struct ucd9000_debugfs_entry *entries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) int i, gpi_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) char name[UCD9000_DEBUGFS_NAME_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) debugfs = pmbus_get_debugfs_dir(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) if (!debugfs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) data->debugfs = debugfs_create_dir(client->name, debugfs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) if (!data->debugfs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) * Of the chips this driver supports, only the UCD9090, UCD90160,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) * UCD90320, and UCD90910 report GPI faults in their MFR_STATUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) * register, so only create the GPI fault debugfs attributes for those
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) * chips.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) if (mid->driver_data == ucd9090 || mid->driver_data == ucd90160 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) mid->driver_data == ucd90320 || mid->driver_data == ucd90910) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) gpi_count = mid->driver_data == ucd90320 ? UCD90320_GPI_COUNT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) : UCD9000_GPI_COUNT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) entries = devm_kcalloc(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) gpi_count, sizeof(*entries),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) if (!entries)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) for (i = 0; i < gpi_count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) entries[i].client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) entries[i].index = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) scnprintf(name, UCD9000_DEBUGFS_NAME_LEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) "gpi%d_alarm", i + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) debugfs_create_file(name, 0444, data->debugfs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) &entries[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) &ucd9000_debugfs_mfr_status_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) scnprintf(name, UCD9000_DEBUGFS_NAME_LEN, "mfr_status");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) debugfs_create_file(name, 0444, data->debugfs, client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) &ucd9000_debugfs_show_mfr_status_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) static int ucd9000_init_debugfs(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) const struct i2c_device_id *mid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) struct ucd9000_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) #endif /* CONFIG_DEBUG_FS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) static int ucd9000_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) struct ucd9000_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) struct pmbus_driver_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) const struct i2c_device_id *mid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) enum chips chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) if (!i2c_check_functionality(client->adapter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) I2C_FUNC_SMBUS_BYTE_DATA |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) I2C_FUNC_SMBUS_BLOCK_DATA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) ret = i2c_smbus_read_block_data(client, UCD9000_DEVICE_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) block_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) dev_err(&client->dev, "Failed to read device ID\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) block_buffer[ret] = '\0';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) dev_info(&client->dev, "Device ID %s\n", block_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) for (mid = ucd9000_id; mid->name[0]; mid++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) if (!strncasecmp(mid->name, block_buffer, strlen(mid->name)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) if (!mid->name[0]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) dev_err(&client->dev, "Unsupported device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) if (client->dev.of_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) chip = (enum chips)of_device_get_match_data(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) chip = mid->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) if (chip != ucd9000 && strcmp(client->name, mid->name) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) dev_notice(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) "Device mismatch: Configured %s, detected %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) client->name, mid->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) data = devm_kzalloc(&client->dev, sizeof(struct ucd9000_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) info = &data->info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) ret = i2c_smbus_read_byte_data(client, UCD9000_NUM_PAGES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) "Failed to read number of active pages\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) info->pages = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) if (!info->pages) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) dev_err(&client->dev, "No pages configured\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) /* The internal temperature sensor is always active */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) info->func[0] = PMBUS_HAVE_TEMP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) /* Everything else is configurable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) ret = i2c_smbus_read_block_data(client, UCD9000_MONITOR_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) block_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) if (ret <= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) dev_err(&client->dev, "Failed to read configuration data\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) for (i = 0; i < ret; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) int page = UCD9000_MON_PAGE(block_buffer[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) if (page >= info->pages)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) switch (UCD9000_MON_TYPE(block_buffer[i])) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) case UCD9000_MON_VOLTAGE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) case UCD9000_MON_VOLTAGE_HW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) info->func[page] |= PMBUS_HAVE_VOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) | PMBUS_HAVE_STATUS_VOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) case UCD9000_MON_TEMPERATURE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) info->func[page] |= PMBUS_HAVE_TEMP2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) | PMBUS_HAVE_STATUS_TEMP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) case UCD9000_MON_CURRENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) info->func[page] |= PMBUS_HAVE_IOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) | PMBUS_HAVE_STATUS_IOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) /* Fan configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) if (mid->driver_data == ucd90124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) for (i = 0; i < UCD9000_NUM_FAN; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) i2c_smbus_write_byte_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) UCD9000_FAN_CONFIG_INDEX, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) ret = i2c_smbus_read_block_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) UCD9000_FAN_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) data->fan_data[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) i2c_smbus_write_byte_data(client, UCD9000_FAN_CONFIG_INDEX, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) info->read_byte_data = ucd9000_read_byte_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) info->func[0] |= PMBUS_HAVE_FAN12 | PMBUS_HAVE_STATUS_FAN12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) | PMBUS_HAVE_FAN34 | PMBUS_HAVE_STATUS_FAN34;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) ucd9000_probe_gpio(client, mid, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) ret = pmbus_do_probe(client, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) ret = ucd9000_init_debugfs(client, mid, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) dev_warn(&client->dev, "Failed to register debugfs: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) /* This is the driver that will be inserted */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) static struct i2c_driver ucd9000_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) .name = "ucd9000",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) .of_match_table = of_match_ptr(ucd9000_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) .probe_new = ucd9000_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) .remove = pmbus_do_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) .id_table = ucd9000_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) module_i2c_driver(ucd9000_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) MODULE_AUTHOR("Guenter Roeck");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) MODULE_DESCRIPTION("PMBus driver for TI UCD90xxx");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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