^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Hardware monitoring driver for Maxim MAX16601
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Implementation notes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Ths chip supports two rails, VCORE and VSA. Telemetry information for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * two rails is reported in two subsequent I2C addresses. The driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * instantiates a dummy I2C client at the second I2C address to report
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * information for the VSA rail in a single instance of the driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Telemetry for the VSA rail is reported to the PMBus core in PMBus page 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * The chip reports input current using two separate methods. The input current
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * reported with the standard READ_IIN command is derived from the output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * current. The first method is reported to the PMBus core with PMBus page 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * the second method is reported with PMBus page 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * The chip supports reading per-phase temperatures and per-phase input/output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * currents for VCORE. Telemetry is reported in vendor specific registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * The driver translates the vendor specific register values to PMBus standard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * register values and reports per-phase information in PMBus page 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * Copyright 2019, 2020 Google LLC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/bits.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include "pmbus.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define REG_SETPT_DVID 0xd1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define DAC_10MV_MODE BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define REG_IOUT_AVG_PK 0xee
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define REG_IIN_SENSOR 0xf1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define REG_TOTAL_INPUT_POWER 0xf2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define REG_PHASE_ID 0xf3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define CORE_RAIL_INDICATOR BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define REG_PHASE_REPORTING 0xf4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct max16601_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct pmbus_driver_info info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct i2c_client *vsa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) int iout_avg_pkg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define to_max16601_data(x) container_of(x, struct max16601_data, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static int max16601_read_byte(struct i2c_client *client, int page, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct max16601_data *data = to_max16601_data(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) if (page > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) if (page == 2) /* VSA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return i2c_smbus_read_byte_data(data->vsa, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) return -ENODATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) static int max16601_read_word(struct i2c_client *client, int page, int phase,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct max16601_data *data = to_max16601_data(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) u8 buf[I2C_SMBUS_BLOCK_MAX + 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) switch (page) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) case 0: /* VCORE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) if (phase == 0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return -ENODATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) case PMBUS_READ_IIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) case PMBUS_READ_IOUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) case PMBUS_READ_TEMPERATURE_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) ret = i2c_smbus_write_byte_data(client, REG_PHASE_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) phase);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) ret = i2c_smbus_read_block_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) REG_PHASE_REPORTING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (ret < 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) case PMBUS_READ_TEMPERATURE_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return buf[1] << 8 | buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) case PMBUS_READ_IOUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return buf[3] << 8 | buf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) case PMBUS_READ_IIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) return buf[5] << 8 | buf[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) case 1: /* VCORE, read IIN/PIN from sensor element */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) case PMBUS_READ_IIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return i2c_smbus_read_word_data(client, REG_IIN_SENSOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) case PMBUS_READ_PIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return i2c_smbus_read_word_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) REG_TOTAL_INPUT_POWER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) case 2: /* VSA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) case PMBUS_VIRT_READ_IOUT_MAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) ret = i2c_smbus_read_word_data(data->vsa,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) REG_IOUT_AVG_PK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) if (sign_extend32(ret, 10) >
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) sign_extend32(data->iout_avg_pkg, 10))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) data->iout_avg_pkg = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return data->iout_avg_pkg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) case PMBUS_VIRT_RESET_IOUT_HISTORY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) case PMBUS_IOUT_OC_FAULT_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) case PMBUS_IOUT_OC_WARN_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) case PMBUS_OT_FAULT_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) case PMBUS_OT_WARN_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) case PMBUS_READ_IIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) case PMBUS_READ_IOUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) case PMBUS_READ_TEMPERATURE_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) case PMBUS_STATUS_WORD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return i2c_smbus_read_word_data(data->vsa, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static int max16601_write_byte(struct i2c_client *client, int page, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) struct max16601_data *data = to_max16601_data(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (page == 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (reg == PMBUS_CLEAR_FAULTS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return i2c_smbus_write_byte(data->vsa, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return -ENODATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static int max16601_write_word(struct i2c_client *client, int page, int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) u16 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) struct max16601_data *data = to_max16601_data(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) switch (page) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) case 0: /* VCORE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return -ENODATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) case 1: /* VCORE IIN/PIN from sensor element */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) case 2: /* VSA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) case PMBUS_VIRT_RESET_IOUT_HISTORY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) data->iout_avg_pkg = 0xfc00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) case PMBUS_IOUT_OC_FAULT_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) case PMBUS_IOUT_OC_WARN_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) case PMBUS_OT_FAULT_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) case PMBUS_OT_WARN_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) return i2c_smbus_write_word_data(data->vsa, reg, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static int max16601_identify(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) struct pmbus_driver_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) reg = i2c_smbus_read_byte_data(client, REG_SETPT_DVID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (reg < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) return reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) if (reg & DAC_10MV_MODE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) info->vrm_version[0] = vr13;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) info->vrm_version[0] = vr12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) static struct pmbus_driver_info max16601_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) .pages = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) .format[PSC_VOLTAGE_IN] = linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) .format[PSC_VOLTAGE_OUT] = vid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) .format[PSC_CURRENT_IN] = linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) .format[PSC_CURRENT_OUT] = linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .format[PSC_TEMPERATURE] = linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) .format[PSC_POWER] = linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) PMBUS_HAVE_STATUS_INPUT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) PMBUS_HAVE_POUT | PMBUS_PAGE_VIRTUAL | PMBUS_PHASE_VIRTUAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) .func[1] = PMBUS_HAVE_IIN | PMBUS_HAVE_PIN | PMBUS_PAGE_VIRTUAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .func[2] = PMBUS_HAVE_IIN | PMBUS_HAVE_STATUS_INPUT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | PMBUS_PAGE_VIRTUAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) .phases[0] = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) .pfunc[0] = PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .pfunc[1] = PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) .pfunc[2] = PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) .pfunc[3] = PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) .pfunc[4] = PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) .pfunc[5] = PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) .pfunc[6] = PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .pfunc[7] = PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .identify = max16601_identify,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .read_byte_data = max16601_read_byte,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .read_word_data = max16601_read_word,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) .write_byte = max16601_write_byte,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) .write_word_data = max16601_write_word,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) static void max16601_remove(void *_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) struct max16601_data *data = _data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) i2c_unregister_device(data->vsa);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static int max16601_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) u8 buf[I2C_SMBUS_BLOCK_MAX + 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) struct max16601_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) if (!i2c_check_functionality(client->adapter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) I2C_FUNC_SMBUS_READ_BYTE_DATA |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) I2C_FUNC_SMBUS_READ_BLOCK_DATA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) ret = i2c_smbus_read_block_data(client, PMBUS_IC_DEVICE_ID, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) /* PMBUS_IC_DEVICE_ID is expected to return "MAX16601y.xx" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) if (ret < 11 || strncmp(buf, "MAX16601", 8)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) buf[ret] = '\0';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) dev_err(dev, "Unsupported chip '%s'\n", buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) ret = i2c_smbus_read_byte_data(client, REG_PHASE_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) if (!(ret & CORE_RAIL_INDICATOR)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) "Driver must be instantiated on CORE rail I2C address\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) data->iout_avg_pkg = 0xfc00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) data->vsa = i2c_new_dummy_device(client->adapter, client->addr + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) if (IS_ERR(data->vsa)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) dev_err(dev, "Failed to register VSA client\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) return PTR_ERR(data->vsa);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) ret = devm_add_action_or_reset(dev, max16601_remove, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) data->info = max16601_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) return pmbus_do_probe(client, &data->info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) static const struct i2c_device_id max16601_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) {"max16601", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) MODULE_DEVICE_TABLE(i2c, max16601_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) static struct i2c_driver max16601_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) .name = "max16601",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) .probe_new = max16601_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) .remove = pmbus_do_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) .id_table = max16601_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) module_i2c_driver(max16601_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) MODULE_DESCRIPTION("PMBus driver for Maxim MAX16601");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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