Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Hardware monitoring driver for LTC2978 and compatible chips.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (c) 2011 Ericsson AB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (c) 2013, 2014, 2015 Guenter Roeck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright (c) 2015 Linear Technology
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Copyright (c) 2018 Analog Devices Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include "pmbus.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) enum chips {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	/* Managers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	ltc2972, ltc2974, ltc2975, ltc2977, ltc2978, ltc2979, ltc2980,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	/* Controllers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	ltc3880, ltc3882, ltc3883, ltc3884, ltc3886, ltc3887, ltc3889, ltc7880,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	/* Modules */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	ltm2987, ltm4664, ltm4675, ltm4676, ltm4677, ltm4678, ltm4680, ltm4686,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	ltm4700,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) /* Common for all chips */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define LTC2978_MFR_VOUT_PEAK		0xdd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define LTC2978_MFR_VIN_PEAK		0xde
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define LTC2978_MFR_TEMPERATURE_PEAK	0xdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define LTC2978_MFR_SPECIAL_ID		0xe7	/* Undocumented on LTC3882 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define LTC2978_MFR_COMMON		0xef
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) /* LTC2974, LTC2975, LCT2977, LTC2980, LTC2978, and LTM2987 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define LTC2978_MFR_VOUT_MIN		0xfb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define LTC2978_MFR_VIN_MIN		0xfc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define LTC2978_MFR_TEMPERATURE_MIN	0xfd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) /* LTC2974, LTC2975 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define LTC2974_MFR_IOUT_PEAK		0xd7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define LTC2974_MFR_IOUT_MIN		0xd8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) /* LTC3880, LTC3882, LTC3883, LTC3887, LTM4675, and LTM4676 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define LTC3880_MFR_IOUT_PEAK		0xd7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define LTC3880_MFR_CLEAR_PEAKS		0xe3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define LTC3880_MFR_TEMPERATURE2_PEAK	0xf4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) /* LTC3883, LTC3884, LTC3886, LTC3889 and LTC7880 only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define LTC3883_MFR_IIN_PEAK		0xe1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) /* LTC2975 only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) #define LTC2975_MFR_IIN_PEAK		0xc4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) #define LTC2975_MFR_IIN_MIN		0xc5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #define LTC2975_MFR_PIN_PEAK		0xc6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) #define LTC2975_MFR_PIN_MIN		0xc7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) #define LTC2978_ID_MASK			0xfff0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) #define LTC2972_ID			0x0310
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) #define LTC2974_ID			0x0210
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) #define LTC2975_ID			0x0220
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) #define LTC2977_ID			0x0130
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) #define LTC2978_ID_REV1			0x0110	/* Early revision */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) #define LTC2978_ID_REV2			0x0120
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) #define LTC2979_ID_A			0x8060
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) #define LTC2979_ID_B			0x8070
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) #define LTC2980_ID_A			0x8030	/* A/B for two die IDs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) #define LTC2980_ID_B			0x8040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) #define LTC3880_ID			0x4020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) #define LTC3882_ID			0x4200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) #define LTC3882_ID_D1			0x4240	/* Dash 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) #define LTC3883_ID			0x4300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) #define LTC3884_ID			0x4C00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) #define LTC3886_ID			0x4600
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) #define LTC3887_ID			0x4700
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) #define LTM2987_ID_A			0x8010	/* A/B for two die IDs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) #define LTM2987_ID_B			0x8020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) #define LTC3889_ID			0x4900
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) #define LTC7880_ID			0x49E0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) #define LTM4664_ID			0x4120
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) #define LTM4675_ID			0x47a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) #define LTM4676_ID_REV1			0x4400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) #define LTM4676_ID_REV2			0x4480
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) #define LTM4676A_ID			0x47e0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) #define LTM4677_ID_REV1			0x47B0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) #define LTM4677_ID_REV2			0x47D0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) #define LTM4678_ID_REV1			0x4100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) #define LTM4678_ID_REV2			0x4110
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) #define LTM4680_ID			0x4140
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) #define LTM4686_ID			0x4770
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) #define LTM4700_ID			0x4130
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) #define LTC2972_NUM_PAGES		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define LTC2974_NUM_PAGES		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define LTC2978_NUM_PAGES		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define LTC3880_NUM_PAGES		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define LTC3883_NUM_PAGES		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define LTC_POLL_TIMEOUT		100	/* in milli-seconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define LTC_NOT_BUSY			BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define LTC_NOT_PENDING			BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)  * LTC2978 clears peak data whenever the CLEAR_FAULTS command is executed, which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)  * happens pretty much each time chip data is updated. Raw peak data therefore
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)  * does not provide much value. To be able to provide useful peak data, keep an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)  * internal cache of measured peak data, which is only cleared if an explicit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)  * "clear peak" command is executed for the sensor in question.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct ltc2978_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	enum chips id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	u16 vin_min, vin_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	u16 temp_min[LTC2974_NUM_PAGES], temp_max[LTC2974_NUM_PAGES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	u16 vout_min[LTC2978_NUM_PAGES], vout_max[LTC2978_NUM_PAGES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	u16 iout_min[LTC2974_NUM_PAGES], iout_max[LTC2974_NUM_PAGES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	u16 iin_min, iin_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	u16 pin_min, pin_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	u16 temp2_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	struct pmbus_driver_info info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	u32 features;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define to_ltc2978_data(x)  container_of(x, struct ltc2978_data, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define FEAT_CLEAR_PEAKS	BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define FEAT_NEEDS_POLLING	BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define has_clear_peaks(d)	((d)->features & FEAT_CLEAR_PEAKS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define needs_polling(d)	((d)->features & FEAT_NEEDS_POLLING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static int ltc_wait_ready(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	unsigned long timeout = jiffies + msecs_to_jiffies(LTC_POLL_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	struct ltc2978_data *data = to_ltc2978_data(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	u8 mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	if (!needs_polling(data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	 * LTC3883 does not support LTC_NOT_PENDING, even though
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	 * the datasheet claims that it does.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	mask = LTC_NOT_BUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	if (data->id != ltc3883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		mask |= LTC_NOT_PENDING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		status = pmbus_read_byte_data(client, 0, LTC2978_MFR_COMMON);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		if (status == -EBADMSG || status == -ENXIO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 			/* PEC error or NACK: chip may be busy, try again */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 			usleep_range(50, 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 			return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		if ((status & mask) == mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		usleep_range(50, 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	} while (time_before(jiffies, timeout));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static int ltc_read_word_data(struct i2c_client *client, int page, int phase,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 			      int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	ret = ltc_wait_ready(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	return pmbus_read_word_data(client, page, 0xff, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static int ltc_read_byte_data(struct i2c_client *client, int page, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	ret = ltc_wait_ready(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	return pmbus_read_byte_data(client, page, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static int ltc_write_byte(struct i2c_client *client, int page, u8 byte)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	ret = ltc_wait_ready(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	return pmbus_write_byte(client, page, byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static inline int lin11_to_val(int data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	s16 e = ((s16)data) >> 11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	s32 m = (((s16)(data << 5)) >> 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	 * mantissa is 10 bit + sign, exponent adds up to 15 bit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	 * Add 6 bit to exponent for maximum accuracy (10 + 15 + 6 = 31).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	e += 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	return (e < 0 ? m >> -e : m << e);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static int ltc_get_max(struct ltc2978_data *data, struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		       int page, int reg, u16 *pmax)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	ret = ltc_read_word_data(client, page, 0xff, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	if (ret >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		if (lin11_to_val(ret) > lin11_to_val(*pmax))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 			*pmax = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		ret = *pmax;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) static int ltc_get_min(struct ltc2978_data *data, struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		       int page, int reg, u16 *pmin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	ret = ltc_read_word_data(client, page, 0xff, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	if (ret >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 		if (lin11_to_val(ret) < lin11_to_val(*pmin))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 			*pmin = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 		ret = *pmin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) static int ltc2978_read_word_data_common(struct i2c_client *client, int page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 					 int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	struct ltc2978_data *data = to_ltc2978_data(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	case PMBUS_VIRT_READ_VIN_MAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		ret = ltc_get_max(data, client, page, LTC2978_MFR_VIN_PEAK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 				  &data->vin_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	case PMBUS_VIRT_READ_VOUT_MAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		ret = ltc_read_word_data(client, page, 0xff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 					 LTC2978_MFR_VOUT_PEAK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		if (ret >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 			 * VOUT is 16 bit unsigned with fixed exponent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 			 * so we can compare it directly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 			if (ret > data->vout_max[page])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 				data->vout_max[page] = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 			ret = data->vout_max[page];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	case PMBUS_VIRT_READ_TEMP_MAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 		ret = ltc_get_max(data, client, page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 				  LTC2978_MFR_TEMPERATURE_PEAK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 				  &data->temp_max[page]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	case PMBUS_VIRT_RESET_VOUT_HISTORY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	case PMBUS_VIRT_RESET_VIN_HISTORY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	case PMBUS_VIRT_RESET_TEMP_HISTORY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 		ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		ret = ltc_wait_ready(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 		ret = -ENODATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) static int ltc2978_read_word_data(struct i2c_client *client, int page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 				  int phase, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	struct ltc2978_data *data = to_ltc2978_data(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	case PMBUS_VIRT_READ_VIN_MIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 		ret = ltc_get_min(data, client, page, LTC2978_MFR_VIN_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 				  &data->vin_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	case PMBUS_VIRT_READ_VOUT_MIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 		ret = ltc_read_word_data(client, page, phase,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 					 LTC2978_MFR_VOUT_MIN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 		if (ret >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 			 * VOUT_MIN is known to not be supported on some lots
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 			 * of LTC2978 revision 1, and will return the maximum
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 			 * possible voltage if read. If VOUT_MAX is valid and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 			 * lower than the reading of VOUT_MIN, use it instead.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 			if (data->vout_max[page] && ret > data->vout_max[page])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 				ret = data->vout_max[page];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 			if (ret < data->vout_min[page])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 				data->vout_min[page] = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 			ret = data->vout_min[page];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	case PMBUS_VIRT_READ_TEMP_MIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 		ret = ltc_get_min(data, client, page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 				  LTC2978_MFR_TEMPERATURE_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 				  &data->temp_min[page]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	case PMBUS_VIRT_READ_IOUT_MAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	case PMBUS_VIRT_RESET_IOUT_HISTORY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	case PMBUS_VIRT_READ_TEMP2_MAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	case PMBUS_VIRT_RESET_TEMP2_HISTORY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 		ret = -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 		ret = ltc2978_read_word_data_common(client, page, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) static int ltc2974_read_word_data(struct i2c_client *client, int page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 				  int phase, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	struct ltc2978_data *data = to_ltc2978_data(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	case PMBUS_VIRT_READ_IOUT_MAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 		ret = ltc_get_max(data, client, page, LTC2974_MFR_IOUT_PEAK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 				  &data->iout_max[page]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	case PMBUS_VIRT_READ_IOUT_MIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 		ret = ltc_get_min(data, client, page, LTC2974_MFR_IOUT_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 				  &data->iout_min[page]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	case PMBUS_VIRT_RESET_IOUT_HISTORY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 		ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 		ret = ltc2978_read_word_data(client, page, phase, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) static int ltc2975_read_word_data(struct i2c_client *client, int page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 				  int phase, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	struct ltc2978_data *data = to_ltc2978_data(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	case PMBUS_VIRT_READ_IIN_MAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 		ret = ltc_get_max(data, client, page, LTC2975_MFR_IIN_PEAK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 				  &data->iin_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	case PMBUS_VIRT_READ_IIN_MIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 		ret = ltc_get_min(data, client, page, LTC2975_MFR_IIN_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 				  &data->iin_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	case PMBUS_VIRT_READ_PIN_MAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 		ret = ltc_get_max(data, client, page, LTC2975_MFR_PIN_PEAK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 				  &data->pin_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	case PMBUS_VIRT_READ_PIN_MIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 		ret = ltc_get_min(data, client, page, LTC2975_MFR_PIN_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 				  &data->pin_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	case PMBUS_VIRT_RESET_IIN_HISTORY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	case PMBUS_VIRT_RESET_PIN_HISTORY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 		ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 		ret = ltc2978_read_word_data(client, page, phase, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) static int ltc3880_read_word_data(struct i2c_client *client, int page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 				  int phase, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	struct ltc2978_data *data = to_ltc2978_data(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	case PMBUS_VIRT_READ_IOUT_MAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 		ret = ltc_get_max(data, client, page, LTC3880_MFR_IOUT_PEAK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 				  &data->iout_max[page]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 	case PMBUS_VIRT_READ_TEMP2_MAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 		ret = ltc_get_max(data, client, page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 				  LTC3880_MFR_TEMPERATURE2_PEAK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 				  &data->temp2_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 	case PMBUS_VIRT_READ_VIN_MIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	case PMBUS_VIRT_READ_VOUT_MIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 	case PMBUS_VIRT_READ_TEMP_MIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 		ret = -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 	case PMBUS_VIRT_RESET_IOUT_HISTORY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 	case PMBUS_VIRT_RESET_TEMP2_HISTORY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 		ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 		ret = ltc2978_read_word_data_common(client, page, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) static int ltc3883_read_word_data(struct i2c_client *client, int page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 				  int phase, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 	const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 	struct ltc2978_data *data = to_ltc2978_data(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 	switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	case PMBUS_VIRT_READ_IIN_MAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 		ret = ltc_get_max(data, client, page, LTC3883_MFR_IIN_PEAK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 				  &data->iin_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 	case PMBUS_VIRT_RESET_IIN_HISTORY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 		ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 		ret = ltc3880_read_word_data(client, page, phase, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) static int ltc2978_clear_peaks(struct ltc2978_data *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 			       struct i2c_client *client, int page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 	if (has_clear_peaks(data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 		ret = ltc_write_byte(client, 0, LTC3880_MFR_CLEAR_PEAKS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 		ret = ltc_write_byte(client, page, PMBUS_CLEAR_FAULTS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) static int ltc2978_write_word_data(struct i2c_client *client, int page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 				    int reg, u16 word)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 	const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 	struct ltc2978_data *data = to_ltc2978_data(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 	switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 	case PMBUS_VIRT_RESET_IIN_HISTORY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 		data->iin_max = 0x7c00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 		data->iin_min = 0x7bff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 		ret = ltc2978_clear_peaks(data, client, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 	case PMBUS_VIRT_RESET_PIN_HISTORY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 		data->pin_max = 0x7c00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 		data->pin_min = 0x7bff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 		ret = ltc2978_clear_peaks(data, client, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 	case PMBUS_VIRT_RESET_IOUT_HISTORY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 		data->iout_max[page] = 0x7c00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 		data->iout_min[page] = 0xfbff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 		ret = ltc2978_clear_peaks(data, client, page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 	case PMBUS_VIRT_RESET_TEMP2_HISTORY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 		data->temp2_max = 0x7c00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 		ret = ltc2978_clear_peaks(data, client, page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 	case PMBUS_VIRT_RESET_VOUT_HISTORY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) 		data->vout_min[page] = 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 		data->vout_max[page] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 		ret = ltc2978_clear_peaks(data, client, page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 	case PMBUS_VIRT_RESET_VIN_HISTORY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 		data->vin_min = 0x7bff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 		data->vin_max = 0x7c00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) 		ret = ltc2978_clear_peaks(data, client, page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) 	case PMBUS_VIRT_RESET_TEMP_HISTORY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 		data->temp_min[page] = 0x7bff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 		data->temp_max[page] = 0x7c00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 		ret = ltc2978_clear_peaks(data, client, page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 		ret = ltc_wait_ready(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 		ret = -ENODATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) static const struct i2c_device_id ltc2978_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 	{"ltc2972", ltc2972},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 	{"ltc2974", ltc2974},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) 	{"ltc2975", ltc2975},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 	{"ltc2977", ltc2977},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 	{"ltc2978", ltc2978},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 	{"ltc2979", ltc2979},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) 	{"ltc2980", ltc2980},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) 	{"ltc3880", ltc3880},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 	{"ltc3882", ltc3882},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 	{"ltc3883", ltc3883},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) 	{"ltc3884", ltc3884},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 	{"ltc3886", ltc3886},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 	{"ltc3887", ltc3887},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 	{"ltc3889", ltc3889},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 	{"ltc7880", ltc7880},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) 	{"ltm2987", ltm2987},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) 	{"ltm4664", ltm4664},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) 	{"ltm4675", ltm4675},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) 	{"ltm4676", ltm4676},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) 	{"ltm4677", ltm4677},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) 	{"ltm4678", ltm4678},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) 	{"ltm4680", ltm4680},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) 	{"ltm4686", ltm4686},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) 	{"ltm4700", ltm4700},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) MODULE_DEVICE_TABLE(i2c, ltc2978_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) #if IS_ENABLED(CONFIG_SENSORS_LTC2978_REGULATOR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) static const struct regulator_desc ltc2978_reg_desc[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) 	PMBUS_REGULATOR("vout", 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) 	PMBUS_REGULATOR("vout", 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) 	PMBUS_REGULATOR("vout", 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) 	PMBUS_REGULATOR("vout", 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) 	PMBUS_REGULATOR("vout", 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) 	PMBUS_REGULATOR("vout", 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) 	PMBUS_REGULATOR("vout", 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 	PMBUS_REGULATOR("vout", 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) #endif /* CONFIG_SENSORS_LTC2978_REGULATOR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) static int ltc2978_get_id(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) 	int chip_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) 	chip_id = i2c_smbus_read_word_data(client, LTC2978_MFR_SPECIAL_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) 	if (chip_id < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) 		const struct i2c_device_id *id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) 		u8 buf[I2C_SMBUS_BLOCK_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) 		int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) 		if (!i2c_check_functionality(client->adapter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) 					     I2C_FUNC_SMBUS_READ_BLOCK_DATA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) 			return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) 		ret = i2c_smbus_read_block_data(client, PMBUS_MFR_ID, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) 		if (ret < 3 || strncmp(buf, "LTC", 3))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) 			return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) 		ret = i2c_smbus_read_block_data(client, PMBUS_MFR_MODEL, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) 		for (id = &ltc2978_id[0]; strlen(id->name); id++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) 			if (!strncasecmp(id->name, buf, strlen(id->name)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) 				return (int)id->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) 	chip_id &= LTC2978_ID_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) 	if (chip_id == LTC2972_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) 		return ltc2972;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) 	else if (chip_id == LTC2974_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) 		return ltc2974;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) 	else if (chip_id == LTC2975_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) 		return ltc2975;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) 	else if (chip_id == LTC2977_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) 		return ltc2977;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) 	else if (chip_id == LTC2978_ID_REV1 || chip_id == LTC2978_ID_REV2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) 		return ltc2978;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) 	else if (chip_id == LTC2979_ID_A || chip_id == LTC2979_ID_B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) 		return ltc2979;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) 	else if (chip_id == LTC2980_ID_A || chip_id == LTC2980_ID_B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) 		return ltc2980;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) 	else if (chip_id == LTC3880_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) 		return ltc3880;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) 	else if (chip_id == LTC3882_ID || chip_id == LTC3882_ID_D1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) 		return ltc3882;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) 	else if (chip_id == LTC3883_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) 		return ltc3883;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) 	else if (chip_id == LTC3884_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) 		return ltc3884;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) 	else if (chip_id == LTC3886_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) 		return ltc3886;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) 	else if (chip_id == LTC3887_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) 		return ltc3887;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) 	else if (chip_id == LTC3889_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) 		return ltc3889;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) 	else if (chip_id == LTC7880_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) 		return ltc7880;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) 	else if (chip_id == LTM2987_ID_A || chip_id == LTM2987_ID_B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) 		return ltm2987;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) 	else if (chip_id == LTM4664_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) 		return ltm4664;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) 	else if (chip_id == LTM4675_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) 		return ltm4675;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) 	else if (chip_id == LTM4676_ID_REV1 || chip_id == LTM4676_ID_REV2 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) 		 chip_id == LTM4676A_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) 		return ltm4676;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) 	else if (chip_id == LTM4677_ID_REV1 || chip_id == LTM4677_ID_REV2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) 		return ltm4677;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) 	else if (chip_id == LTM4678_ID_REV1 || chip_id == LTM4678_ID_REV2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) 		return ltm4678;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) 	else if (chip_id == LTM4680_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) 		return ltm4680;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) 	else if (chip_id == LTM4686_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) 		return ltm4686;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) 	else if (chip_id == LTM4700_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) 		return ltm4700;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) 	dev_err(&client->dev, "Unsupported chip ID 0x%x\n", chip_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) 	return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) static int ltc2978_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) 	int i, chip_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) 	struct ltc2978_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) 	struct pmbus_driver_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) 	const struct i2c_device_id *id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) 	if (!i2c_check_functionality(client->adapter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) 				     I2C_FUNC_SMBUS_READ_WORD_DATA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) 	data = devm_kzalloc(&client->dev, sizeof(struct ltc2978_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) 			    GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) 	if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) 	chip_id = ltc2978_get_id(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) 	if (chip_id < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) 		return chip_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) 	data->id = chip_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) 	id = i2c_match_id(ltc2978_id, client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) 	if (data->id != id->driver_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) 		dev_warn(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) 			 "Device mismatch: Configured %s (%d), detected %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) 			 id->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) 			 (int) id->driver_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) 			 chip_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) 	info = &data->info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) 	info->write_word_data = ltc2978_write_word_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) 	info->write_byte = ltc_write_byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) 	info->read_word_data = ltc_read_word_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) 	info->read_byte_data = ltc_read_byte_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) 	data->vin_min = 0x7bff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) 	data->vin_max = 0x7c00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) 	for (i = 0; i < ARRAY_SIZE(data->vout_min); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) 		data->vout_min[i] = 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) 	for (i = 0; i < ARRAY_SIZE(data->iout_min); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) 		data->iout_min[i] = 0xfbff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) 	for (i = 0; i < ARRAY_SIZE(data->iout_max); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) 		data->iout_max[i] = 0x7c00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) 	for (i = 0; i < ARRAY_SIZE(data->temp_min); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) 		data->temp_min[i] = 0x7bff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) 	for (i = 0; i < ARRAY_SIZE(data->temp_max); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) 		data->temp_max[i] = 0x7c00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) 	data->temp2_max = 0x7c00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) 	switch (data->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) 	case ltc2972:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) 		info->read_word_data = ltc2975_read_word_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) 		info->pages = LTC2972_NUM_PAGES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) 		info->func[0] = PMBUS_HAVE_IIN | PMBUS_HAVE_PIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) 		  | PMBUS_HAVE_VIN | PMBUS_HAVE_STATUS_INPUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) 		  | PMBUS_HAVE_TEMP2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) 		for (i = 0; i < info->pages; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) 			info->func[i] |= PMBUS_HAVE_VOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) 			  | PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_POUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) 			  | PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) 			  | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) 	case ltc2974:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) 		info->read_word_data = ltc2974_read_word_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) 		info->pages = LTC2974_NUM_PAGES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) 		info->func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_STATUS_INPUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) 		  | PMBUS_HAVE_TEMP2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) 		for (i = 0; i < info->pages; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) 			info->func[i] |= PMBUS_HAVE_VOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) 			  | PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_POUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) 			  | PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) 			  | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) 	case ltc2975:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) 		info->read_word_data = ltc2975_read_word_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) 		info->pages = LTC2974_NUM_PAGES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) 		info->func[0] = PMBUS_HAVE_IIN | PMBUS_HAVE_PIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) 		  | PMBUS_HAVE_VIN | PMBUS_HAVE_STATUS_INPUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) 		  | PMBUS_HAVE_TEMP2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) 		for (i = 0; i < info->pages; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) 			info->func[i] |= PMBUS_HAVE_VOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) 			  | PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_POUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) 			  | PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) 			  | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) 	case ltc2977:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) 	case ltc2978:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) 	case ltc2979:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) 	case ltc2980:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) 	case ltm2987:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) 		info->read_word_data = ltc2978_read_word_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) 		info->pages = LTC2978_NUM_PAGES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) 		info->func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_STATUS_INPUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) 		  | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) 		  | PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) 		for (i = 1; i < LTC2978_NUM_PAGES; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) 			info->func[i] = PMBUS_HAVE_VOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) 			  | PMBUS_HAVE_STATUS_VOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) 	case ltc3880:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) 	case ltc3887:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) 	case ltm4675:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) 	case ltm4676:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) 	case ltm4677:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) 	case ltm4686:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) 		data->features |= FEAT_CLEAR_PEAKS | FEAT_NEEDS_POLLING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) 		info->read_word_data = ltc3880_read_word_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) 		info->pages = LTC3880_NUM_PAGES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) 		info->func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) 		  | PMBUS_HAVE_STATUS_INPUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) 		  | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) 		  | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) 		  | PMBUS_HAVE_POUT | PMBUS_HAVE_TEMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) 		  | PMBUS_HAVE_TEMP2 | PMBUS_HAVE_STATUS_TEMP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) 		info->func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) 		  | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) 		  | PMBUS_HAVE_POUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) 		  | PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) 	case ltc3882:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) 		data->features |= FEAT_CLEAR_PEAKS | FEAT_NEEDS_POLLING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) 		info->read_word_data = ltc3880_read_word_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) 		info->pages = LTC3880_NUM_PAGES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) 		info->func[0] = PMBUS_HAVE_VIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) 		  | PMBUS_HAVE_STATUS_INPUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) 		  | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) 		  | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) 		  | PMBUS_HAVE_POUT | PMBUS_HAVE_TEMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) 		  | PMBUS_HAVE_TEMP2 | PMBUS_HAVE_STATUS_TEMP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) 		info->func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) 		  | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) 		  | PMBUS_HAVE_POUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) 		  | PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) 	case ltc3883:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) 		data->features |= FEAT_CLEAR_PEAKS | FEAT_NEEDS_POLLING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) 		info->read_word_data = ltc3883_read_word_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) 		info->pages = LTC3883_NUM_PAGES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) 		info->func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) 		  | PMBUS_HAVE_STATUS_INPUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) 		  | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) 		  | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) 		  | PMBUS_HAVE_PIN | PMBUS_HAVE_POUT | PMBUS_HAVE_TEMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) 		  | PMBUS_HAVE_TEMP2 | PMBUS_HAVE_STATUS_TEMP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) 	case ltc3884:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) 	case ltc3886:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) 	case ltc3889:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) 	case ltc7880:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) 	case ltm4664:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) 	case ltm4678:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) 	case ltm4680:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) 	case ltm4700:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) 		data->features |= FEAT_CLEAR_PEAKS | FEAT_NEEDS_POLLING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) 		info->read_word_data = ltc3883_read_word_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) 		info->pages = LTC3880_NUM_PAGES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) 		info->func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) 		  | PMBUS_HAVE_STATUS_INPUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) 		  | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) 		  | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) 		  | PMBUS_HAVE_PIN | PMBUS_HAVE_POUT | PMBUS_HAVE_TEMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) 		  | PMBUS_HAVE_TEMP2 | PMBUS_HAVE_STATUS_TEMP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) 		info->func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) 		  | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) 		  | PMBUS_HAVE_POUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) 		  | PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) #if IS_ENABLED(CONFIG_SENSORS_LTC2978_REGULATOR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) 	info->num_regulators = info->pages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) 	info->reg_desc = ltc2978_reg_desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) 	if (info->num_regulators > ARRAY_SIZE(ltc2978_reg_desc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) 		dev_err(&client->dev, "num_regulators too large!");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) 		info->num_regulators = ARRAY_SIZE(ltc2978_reg_desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) 	return pmbus_do_probe(client, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) static const struct of_device_id ltc2978_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) 	{ .compatible = "lltc,ltc2972" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) 	{ .compatible = "lltc,ltc2974" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) 	{ .compatible = "lltc,ltc2975" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) 	{ .compatible = "lltc,ltc2977" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) 	{ .compatible = "lltc,ltc2978" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) 	{ .compatible = "lltc,ltc2979" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) 	{ .compatible = "lltc,ltc2980" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) 	{ .compatible = "lltc,ltc3880" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) 	{ .compatible = "lltc,ltc3882" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) 	{ .compatible = "lltc,ltc3883" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) 	{ .compatible = "lltc,ltc3884" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) 	{ .compatible = "lltc,ltc3886" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) 	{ .compatible = "lltc,ltc3887" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) 	{ .compatible = "lltc,ltc3889" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) 	{ .compatible = "lltc,ltc7880" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) 	{ .compatible = "lltc,ltm2987" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) 	{ .compatible = "lltc,ltm4664" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) 	{ .compatible = "lltc,ltm4675" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) 	{ .compatible = "lltc,ltm4676" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) 	{ .compatible = "lltc,ltm4677" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) 	{ .compatible = "lltc,ltm4678" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) 	{ .compatible = "lltc,ltm4680" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) 	{ .compatible = "lltc,ltm4686" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) 	{ .compatible = "lltc,ltm4700" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) MODULE_DEVICE_TABLE(of, ltc2978_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) static struct i2c_driver ltc2978_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) 		   .name = "ltc2978",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) 		   .of_match_table = of_match_ptr(ltc2978_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) 		   },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) 	.probe_new = ltc2978_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) 	.remove = pmbus_do_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) 	.id_table = ltc2978_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) module_i2c_driver(ltc2978_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) MODULE_AUTHOR("Guenter Roeck");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) MODULE_DESCRIPTION("PMBus driver for LTC2978 and compatible chips");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) MODULE_LICENSE("GPL");