Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

3 Commits   0 Branches   0 Tags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (C) 2001-2004 Aurelien Jarno <aurelien@aurel32.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Ported to Linux 2.6 by Aurelien Jarno <aurelien@aurel32.net> with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * the help of Jean Delvare <jdelvare@suse.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) /* Insmod parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) static int input_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) module_param(input_mode, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) MODULE_PARM_DESC(input_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	"Analog input mode:\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	" 0 = four single ended inputs\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	" 1 = three differential inputs\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	" 2 = single ended and differential mixed\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	" 3 = two differential inputs\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  * The PCF8591 control byte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  *      7    6    5    4    3    2    1    0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  *   |  0 |AOEF|   AIP   |  0 |AINC|  AICH   |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) /* Analog Output Enable Flag (analog output active if 1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define PCF8591_CONTROL_AOEF		0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  * Analog Input Programming
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  * 0x00 = four single ended inputs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41)  * 0x10 = three differential inputs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)  * 0x20 = single ended and differential mixed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)  * 0x30 = two differential inputs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define PCF8591_CONTROL_AIP_MASK	0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) /* Autoincrement Flag (switch on if 1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define PCF8591_CONTROL_AINC		0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51)  * Channel selection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52)  * 0x00 = channel 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53)  * 0x01 = channel 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54)  * 0x02 = channel 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55)  * 0x03 = channel 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) #define PCF8591_CONTROL_AICH_MASK	0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) /* Initial values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #define PCF8591_INIT_CONTROL	((input_mode << 4) | PCF8591_CONTROL_AOEF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) #define PCF8591_INIT_AOUT	0	/* DAC out = 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) /* Conversions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) #define REG_TO_SIGNED(reg)	(((reg) & 0x80) ? ((reg) - 256) : (reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) struct pcf8591_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	struct mutex update_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	u8 control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	u8 aout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) static void pcf8591_init_client(struct i2c_client *client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) static int pcf8591_read_channel(struct device *dev, int channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) /* following are the sysfs callback functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) #define show_in_channel(channel)					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) static ssize_t show_in##channel##_input(struct device *dev,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 					struct device_attribute *attr,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 					char *buf)			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) {									\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	return sprintf(buf, "%d\n", pcf8591_read_channel(dev, channel));\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) }									\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) static DEVICE_ATTR(in##channel##_input, S_IRUGO,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		   show_in##channel##_input, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) show_in_channel(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) show_in_channel(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) show_in_channel(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) show_in_channel(3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) static ssize_t out0_output_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 				struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	struct pcf8591_data *data = i2c_get_clientdata(to_i2c_client(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	return sprintf(buf, "%d\n", data->aout * 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static ssize_t out0_output_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 				 struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 				 const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	struct pcf8591_data *data = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	val /= 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	if (val > 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	data->aout = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	i2c_smbus_write_byte_data(client, data->control, data->aout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static DEVICE_ATTR_RW(out0_output);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static ssize_t out0_enable_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 				struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	struct pcf8591_data *data = i2c_get_clientdata(to_i2c_client(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	return sprintf(buf, "%u\n", !(!(data->control & PCF8591_CONTROL_AOEF)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static ssize_t out0_enable_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 				 struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 				 const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	struct pcf8591_data *data = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	if (val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		data->control |= PCF8591_CONTROL_AOEF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		data->control &= ~PCF8591_CONTROL_AOEF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	i2c_smbus_write_byte(client, data->control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static DEVICE_ATTR_RW(out0_enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static struct attribute *pcf8591_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	&dev_attr_out0_enable.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	&dev_attr_out0_output.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	&dev_attr_in0_input.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	&dev_attr_in1_input.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static const struct attribute_group pcf8591_attr_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	.attrs = pcf8591_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static struct attribute *pcf8591_attributes_opt[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	&dev_attr_in2_input.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	&dev_attr_in3_input.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static const struct attribute_group pcf8591_attr_group_opt = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	.attrs = pcf8591_attributes_opt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)  * Real code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static int pcf8591_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	struct pcf8591_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	data = devm_kzalloc(&client->dev, sizeof(struct pcf8591_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 			    GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	i2c_set_clientdata(client, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	mutex_init(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	/* Initialize the PCF8591 chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	pcf8591_init_client(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	/* Register sysfs hooks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	err = sysfs_create_group(&client->dev.kobj, &pcf8591_attr_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	/* Register input2 if not in "two differential inputs" mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	if (input_mode != 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		err = device_create_file(&client->dev, &dev_attr_in2_input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 			goto exit_sysfs_remove;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	/* Register input3 only in "four single ended inputs" mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	if (input_mode == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		err = device_create_file(&client->dev, &dev_attr_in3_input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 			goto exit_sysfs_remove;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	data->hwmon_dev = hwmon_device_register(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	if (IS_ERR(data->hwmon_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		err = PTR_ERR(data->hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		goto exit_sysfs_remove;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) exit_sysfs_remove:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	sysfs_remove_group(&client->dev.kobj, &pcf8591_attr_group_opt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	sysfs_remove_group(&client->dev.kobj, &pcf8591_attr_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) static int pcf8591_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	struct pcf8591_data *data = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	hwmon_device_unregister(data->hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	sysfs_remove_group(&client->dev.kobj, &pcf8591_attr_group_opt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	sysfs_remove_group(&client->dev.kobj, &pcf8591_attr_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) /* Called when we have found a new PCF8591. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static void pcf8591_init_client(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	struct pcf8591_data *data = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	data->control = PCF8591_INIT_CONTROL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	data->aout = PCF8591_INIT_AOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	i2c_smbus_write_byte_data(client, data->control, data->aout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	 * The first byte transmitted contains the conversion code of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	 * previous read cycle. FLUSH IT!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	i2c_smbus_read_byte(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) static int pcf8591_read_channel(struct device *dev, int channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	u8 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	struct pcf8591_data *data = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	if ((data->control & PCF8591_CONTROL_AICH_MASK) != channel) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		data->control = (data->control & ~PCF8591_CONTROL_AICH_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 			      | channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		i2c_smbus_write_byte(client, data->control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		 * The first byte transmitted contains the conversion code of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 		 * the previous read cycle. FLUSH IT!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 		i2c_smbus_read_byte(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	value = i2c_smbus_read_byte(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	if ((channel == 2 && input_mode == 2) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	    (channel != 3 && (input_mode == 1 || input_mode == 3)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 		return 10 * REG_TO_SIGNED(value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 		return 10 * value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) static const struct i2c_device_id pcf8591_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	{ "pcf8591", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) MODULE_DEVICE_TABLE(i2c, pcf8591_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) static struct i2c_driver pcf8591_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 		.name	= "pcf8591",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	.probe_new	= pcf8591_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	.remove		= pcf8591_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	.id_table	= pcf8591_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) static int __init pcf8591_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	if (input_mode < 0 || input_mode > 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 		pr_warn("invalid input_mode (%d)\n", input_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 		input_mode = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	return i2c_add_driver(&pcf8591_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) static void __exit pcf8591_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	i2c_del_driver(&pcf8591_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) MODULE_AUTHOR("Aurelien Jarno <aurelien@aurel32.net>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) MODULE_DESCRIPTION("PCF8591 driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) module_init(pcf8591_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) module_exit(pcf8591_exit);