Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) // Copyright (c) 2018 Mellanox Technologies. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) // Copyright (c) 2018 Vadim Pasternak <vadimp@mellanox.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/platform_data/mlxreg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/thermal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #define MLXREG_FAN_MAX_TACHO		12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #define MLXREG_FAN_MAX_STATE		10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #define MLXREG_FAN_MIN_DUTY		51	/* 20% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define MLXREG_FAN_MAX_DUTY		255	/* 100% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  * Minimum and maximum FAN allowed speed in percent: from 20% to 100%. Values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)  * MLXREG_FAN_MAX_STATE + x, where x is between 2 and 10 are used for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)  * setting FAN speed dynamic minimum. For example, if value is set to 14 (40%)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)  * cooling levels vector will be set to 4, 4, 4, 4, 4, 5, 6, 7, 8, 9, 10 to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)  * introduce PWM speed in percent: 40, 40, 40, 40, 40, 50, 60. 70, 80, 90, 100.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define MLXREG_FAN_SPEED_MIN			(MLXREG_FAN_MAX_STATE + 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define MLXREG_FAN_SPEED_MAX			(MLXREG_FAN_MAX_STATE * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define MLXREG_FAN_SPEED_MIN_LEVEL		2	/* 20 percent */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define MLXREG_FAN_TACHO_SAMPLES_PER_PULSE_DEF	44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define MLXREG_FAN_TACHO_DIV_MIN		283
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define MLXREG_FAN_TACHO_DIV_DEF		(MLXREG_FAN_TACHO_DIV_MIN * 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define MLXREG_FAN_TACHO_DIV_SCALE_MAX	64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)  * FAN datasheet defines the formula for RPM calculations as RPM = 15/t-high.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)  * The logic in a programmable device measures the time t-high by sampling the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)  * tachometer every t-sample (with the default value 11.32 uS) and increment
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)  * a counter (N) as long as the pulse has not change:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  * RPM = 15 / (t-sample * (K + Regval)), where:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  * Regval: is the value read from the programmable device register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  *  - 0xff - represents tachometer fault;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41)  *  - 0xfe - represents tachometer minimum value , which is 4444 RPM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)  *  - 0x00 - represents tachometer maximum value , which is 300000 RPM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)  * K: is 44 and it represents the minimum allowed samples per pulse;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  * N: is equal K + Regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)  * In order to calculate RPM from the register value the following formula is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46)  * used: RPM = 15 / ((Regval + K) * 11.32) * 10^(-6)), which in  the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47)  * default case is modified to:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)  * RPM = 15000000 * 100 / ((Regval + 44) * 1132);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)  * - for Regval 0x00, RPM will be 15000000 * 100 / (44 * 1132) = 30115;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)  * - for Regval 0xfe, RPM will be 15000000 * 100 / ((254 + 44) * 1132) = 4446;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51)  * In common case the formula is modified to:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52)  * RPM = 15000000 * 100 / ((Regval + samples) * divider).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define MLXREG_FAN_GET_RPM(rval, d, s)	(DIV_ROUND_CLOSEST(15000000 * 100, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 					 ((rval) + (s)) * (d)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) #define MLXREG_FAN_GET_FAULT(val, mask) ((val) == (mask))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) #define MLXREG_FAN_PWM_DUTY2STATE(duty)	(DIV_ROUND_CLOSEST((duty) *	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 					 MLXREG_FAN_MAX_STATE,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 					 MLXREG_FAN_MAX_DUTY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #define MLXREG_FAN_PWM_STATE2DUTY(stat)	(DIV_ROUND_CLOSEST((stat) *	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 					 MLXREG_FAN_MAX_DUTY,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 					 MLXREG_FAN_MAX_STATE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65)  * struct mlxreg_fan_tacho - tachometer data (internal use):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67)  * @connected: indicates if tachometer is connected;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68)  * @reg: register offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69)  * @mask: fault mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) struct mlxreg_fan_tacho {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	bool connected;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	u32 mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78)  * struct mlxreg_fan_pwm - PWM data (internal use):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80)  * @connected: indicates if PWM is connected;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81)  * @reg: register offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) struct mlxreg_fan_pwm {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	bool connected;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89)  * struct mlxreg_fan - private data (internal use):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91)  * @dev: basic device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92)  * @regmap: register map of parent device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93)  * @tacho: tachometer data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94)  * @pwm: PWM data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95)  * @samples: minimum allowed samples per pulse;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96)  * @divider: divider value for tachometer RPM calculation;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97)  * @cooling: cooling device levels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98)  * @cdev: cooling device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct mlxreg_fan {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	void *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	struct mlxreg_core_platform_data *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	struct mlxreg_fan_tacho tacho[MLXREG_FAN_MAX_TACHO];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	struct mlxreg_fan_pwm pwm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	int samples;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	int divider;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	u8 cooling_levels[MLXREG_FAN_MAX_STATE + 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	struct thermal_cooling_device *cdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) mlxreg_fan_read(struct device *dev, enum hwmon_sensor_types type, u32 attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		int channel, long *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	struct mlxreg_fan *fan = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	struct mlxreg_fan_tacho *tacho;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	u32 regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	case hwmon_fan:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		tacho = &fan->tacho[channel];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		switch (attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 		case hwmon_fan_input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 			err = regmap_read(fan->regmap, tacho->reg, &regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 			if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 				return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 			*val = MLXREG_FAN_GET_RPM(regval, fan->divider,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 						  fan->samples);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		case hwmon_fan_fault:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 			err = regmap_read(fan->regmap, tacho->reg, &regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 			if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 				return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 			*val = MLXREG_FAN_GET_FAULT(regval, tacho->mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 			return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	case hwmon_pwm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		switch (attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		case hwmon_pwm_input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 			err = regmap_read(fan->regmap, fan->pwm.reg, &regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 			if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 				return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 			*val = regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 			return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) mlxreg_fan_write(struct device *dev, enum hwmon_sensor_types type, u32 attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		 int channel, long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	struct mlxreg_fan *fan = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	case hwmon_pwm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		switch (attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		case hwmon_pwm_input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 			if (val < MLXREG_FAN_MIN_DUTY ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 			    val > MLXREG_FAN_MAX_DUTY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 				return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 			return regmap_write(fan->regmap, fan->pwm.reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 			return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static umode_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) mlxreg_fan_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		      int channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	case hwmon_fan:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		if (!(((struct mlxreg_fan *)data)->tacho[channel].connected))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		switch (attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		case hwmon_fan_input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		case hwmon_fan_fault:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 			return 0444;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	case hwmon_pwm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		if (!(((struct mlxreg_fan *)data)->pwm.connected))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		switch (attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		case hwmon_pwm_input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 			return 0644;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) static const struct hwmon_channel_info *mlxreg_fan_hwmon_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	HWMON_CHANNEL_INFO(fan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 			   HWMON_F_INPUT | HWMON_F_FAULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 			   HWMON_F_INPUT | HWMON_F_FAULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 			   HWMON_F_INPUT | HWMON_F_FAULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 			   HWMON_F_INPUT | HWMON_F_FAULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 			   HWMON_F_INPUT | HWMON_F_FAULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 			   HWMON_F_INPUT | HWMON_F_FAULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 			   HWMON_F_INPUT | HWMON_F_FAULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 			   HWMON_F_INPUT | HWMON_F_FAULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 			   HWMON_F_INPUT | HWMON_F_FAULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 			   HWMON_F_INPUT | HWMON_F_FAULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 			   HWMON_F_INPUT | HWMON_F_FAULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 			   HWMON_F_INPUT | HWMON_F_FAULT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	HWMON_CHANNEL_INFO(pwm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 			   HWMON_PWM_INPUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) static const struct hwmon_ops mlxreg_fan_hwmon_hwmon_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	.is_visible = mlxreg_fan_is_visible,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	.read = mlxreg_fan_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	.write = mlxreg_fan_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) static const struct hwmon_chip_info mlxreg_fan_hwmon_chip_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	.ops = &mlxreg_fan_hwmon_hwmon_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	.info = mlxreg_fan_hwmon_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static int mlxreg_fan_get_max_state(struct thermal_cooling_device *cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 				    unsigned long *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	*state = MLXREG_FAN_MAX_STATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) static int mlxreg_fan_get_cur_state(struct thermal_cooling_device *cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 				    unsigned long *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	struct mlxreg_fan *fan = cdev->devdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	u32 regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	err = regmap_read(fan->regmap, fan->pwm.reg, &regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		dev_err(fan->dev, "Failed to query PWM duty\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	*state = MLXREG_FAN_PWM_DUTY2STATE(regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static int mlxreg_fan_set_cur_state(struct thermal_cooling_device *cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 				    unsigned long state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	struct mlxreg_fan *fan = cdev->devdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	unsigned long cur_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	int i, config = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	u32 regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	 * Verify if this request is for changing allowed FAN dynamical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	 * minimum. If it is - update cooling levels accordingly and update
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	 * state, if current state is below the newly requested minimum state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	 * For example, if current state is 5, and minimal state is to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	 * changed from 4 to 6, fan->cooling_levels[0 to 5] will be changed all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	 * from 4 to 6. And state 5 (fan->cooling_levels[4]) should be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	 * overwritten.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	if (state >= MLXREG_FAN_SPEED_MIN && state <= MLXREG_FAN_SPEED_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 		 * This is configuration change, which is only supported through sysfs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 		 * For configuration non-zero value is to be returned to avoid thermal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 		 * statistics update.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 		config = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 		state -= MLXREG_FAN_MAX_STATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 		for (i = 0; i < state; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 			fan->cooling_levels[i] = state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 		for (i = state; i <= MLXREG_FAN_MAX_STATE; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 			fan->cooling_levels[i] = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 		err = regmap_read(fan->regmap, fan->pwm.reg, &regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 		if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 			dev_err(fan->dev, "Failed to query PWM duty\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 			return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 		cur_state = MLXREG_FAN_PWM_DUTY2STATE(regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		if (state < cur_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 			return config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 		state = cur_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	if (state > MLXREG_FAN_MAX_STATE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	/* Normalize the state to the valid speed range. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	state = fan->cooling_levels[state];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	err = regmap_write(fan->regmap, fan->pwm.reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 			   MLXREG_FAN_PWM_STATE2DUTY(state));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 		dev_err(fan->dev, "Failed to write PWM duty\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	return config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) static const struct thermal_cooling_device_ops mlxreg_fan_cooling_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	.get_max_state	= mlxreg_fan_get_max_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	.get_cur_state	= mlxreg_fan_get_cur_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	.set_cur_state	= mlxreg_fan_set_cur_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) static int mlxreg_fan_connect_verify(struct mlxreg_fan *fan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 				     struct mlxreg_core_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	u32 regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	err = regmap_read(fan->regmap, data->capability, &regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 		dev_err(fan->dev, "Failed to query capability register 0x%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 			data->capability);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	return !!(regval & data->bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) static int mlxreg_fan_speed_divider_get(struct mlxreg_fan *fan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 					struct mlxreg_core_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	u32 regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	err = regmap_read(fan->regmap, data->capability, &regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 		dev_err(fan->dev, "Failed to query capability register 0x%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 			data->capability);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	 * Set divider value according to the capability register, in case it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	 * contains valid value. Otherwise use default value. The purpose of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	 * this validation is to protect against the old hardware, in which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	 * this register can return zero.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	if (regval > 0 && regval <= MLXREG_FAN_TACHO_DIV_SCALE_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 		fan->divider = regval * MLXREG_FAN_TACHO_DIV_MIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) static int mlxreg_fan_config(struct mlxreg_fan *fan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 			     struct mlxreg_core_platform_data *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	struct mlxreg_core_data *data = pdata->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	bool configured = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	int tacho_num = 0, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	fan->samples = MLXREG_FAN_TACHO_SAMPLES_PER_PULSE_DEF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	fan->divider = MLXREG_FAN_TACHO_DIV_DEF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	for (i = 0; i < pdata->counter; i++, data++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 		if (strnstr(data->label, "tacho", sizeof(data->label))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 			if (tacho_num == MLXREG_FAN_MAX_TACHO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 				dev_err(fan->dev, "too many tacho entries: %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 					data->label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 				return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 			if (data->capability) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 				err = mlxreg_fan_connect_verify(fan, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 				if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 					return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 				else if (!err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 					tacho_num++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 					continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 				}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 			fan->tacho[tacho_num].reg = data->reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 			fan->tacho[tacho_num].mask = data->mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 			fan->tacho[tacho_num++].connected = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 		} else if (strnstr(data->label, "pwm", sizeof(data->label))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 			if (fan->pwm.connected) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 				dev_err(fan->dev, "duplicate pwm entry: %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 					data->label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 				return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 			fan->pwm.reg = data->reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 			fan->pwm.connected = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 		} else if (strnstr(data->label, "conf", sizeof(data->label))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 			if (configured) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 				dev_err(fan->dev, "duplicate conf entry: %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 					data->label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 				return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 			/* Validate that conf parameters are not zeros. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 			if (!data->mask && !data->bit && !data->capability) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 				dev_err(fan->dev, "invalid conf entry params: %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 					data->label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 				return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 			if (data->capability) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 				err = mlxreg_fan_speed_divider_get(fan, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 				if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 					return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 			} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 				if (data->mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 					fan->samples = data->mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 				if (data->bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 					fan->divider = data->bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 			configured = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 			dev_err(fan->dev, "invalid label: %s\n", data->label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 	/* Init cooling levels per PWM state. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 	for (i = 0; i < MLXREG_FAN_SPEED_MIN_LEVEL; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 		fan->cooling_levels[i] = MLXREG_FAN_SPEED_MIN_LEVEL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 	for (i = MLXREG_FAN_SPEED_MIN_LEVEL; i <= MLXREG_FAN_MAX_STATE; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 		fan->cooling_levels[i] = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) static int mlxreg_fan_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 	struct mlxreg_core_platform_data *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 	struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 	struct mlxreg_fan *fan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 	struct device *hwm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 	pdata = dev_get_platdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 	if (!pdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 		dev_err(dev, "Failed to get platform data.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 	fan = devm_kzalloc(dev, sizeof(*fan), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 	if (!fan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 	fan->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 	fan->regmap = pdata->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 	err = mlxreg_fan_config(fan, pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 	hwm = devm_hwmon_device_register_with_info(dev, "mlxreg_fan",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 						   fan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 						   &mlxreg_fan_hwmon_chip_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 						   NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) 	if (IS_ERR(hwm)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 		dev_err(dev, "Failed to register hwmon device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 		return PTR_ERR(hwm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 	if (IS_REACHABLE(CONFIG_THERMAL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 		fan->cdev = devm_thermal_of_cooling_device_register(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) 			NULL, "mlxreg_fan", fan, &mlxreg_fan_cooling_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 		if (IS_ERR(fan->cdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) 			dev_err(dev, "Failed to register cooling device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 			return PTR_ERR(fan->cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) static struct platform_driver mlxreg_fan_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 	    .name = "mlxreg-fan",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 	.probe = mlxreg_fan_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) module_platform_driver(mlxreg_fan_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) MODULE_AUTHOR("Vadim Pasternak <vadimp@mellanox.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) MODULE_DESCRIPTION("Mellanox FAN driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) MODULE_ALIAS("platform:mlxreg-fan");