^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2012 Guenter Roeck <linux@roeck-us.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * based on max1668.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (c) 2011 David George <david.george@ska.ac.za>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/hwmon-sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/platform_data/max6697.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) enum chips { max6581, max6602, max6622, max6636, max6689, max6693, max6694,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) max6697, max6698, max6699 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /* Report local sensor as temp1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static const u8 MAX6697_REG_TEMP[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 0x07, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x08 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static const u8 MAX6697_REG_TEMP_EXT[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 0x57, 0x09, 0x52, 0x53, 0x54, 0x55, 0x56, 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static const u8 MAX6697_REG_MAX[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 0x17, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x18 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static const u8 MAX6697_REG_CRIT[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * Map device tree / platform data register bit map to chip bit map.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * Applies to alert register and over-temperature register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define MAX6697_ALERT_MAP_BITS(reg) ((((reg) & 0x7e) >> 1) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) (((reg) & 0x01) << 6) | ((reg) & 0x80))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define MAX6697_OVERT_MAP_BITS(reg) (((reg) >> 1) | (((reg) & 0x01) << 7))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define MAX6697_REG_STAT(n) (0x44 + (n))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define MAX6697_REG_CONFIG 0x41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define MAX6581_CONF_EXTENDED (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define MAX6693_CONF_BETA (1 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define MAX6697_CONF_RESISTANCE (1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define MAX6697_CONF_TIMEOUT (1 << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define MAX6697_REG_ALERT_MASK 0x42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define MAX6697_REG_OVERT_MASK 0x43
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define MAX6581_REG_RESISTANCE 0x4a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define MAX6581_REG_IDEALITY 0x4b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define MAX6581_REG_IDEALITY_SELECT 0x4c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define MAX6581_REG_OFFSET 0x4d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define MAX6581_REG_OFFSET_SELECT 0x4e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define MAX6581_OFFSET_MIN -31750
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define MAX6581_OFFSET_MAX 31750
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define MAX6697_CONV_TIME 156 /* ms per channel, worst case */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct max6697_chip_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) int channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) u32 have_ext;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) u32 have_crit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) u32 have_fault;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) u8 valid_conf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) const u8 *alarm_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct max6697_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) enum chips type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) const struct max6697_chip_data *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) int update_interval; /* in milli-seconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) int temp_offset; /* in degrees C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) struct mutex update_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) unsigned long last_updated; /* In jiffies */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) bool valid; /* true if following fields are valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* 1x local and up to 7x remote */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) u8 temp[8][4]; /* [nr][0]=temp [1]=ext [2]=max [3]=crit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define MAX6697_TEMP_INPUT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define MAX6697_TEMP_EXT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define MAX6697_TEMP_MAX 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define MAX6697_TEMP_CRIT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) u32 alarms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /* Diode fault status bits on MAX6581 are right shifted by one bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static const u8 max6581_alarm_map[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) 0, 0, 1, 2, 3, 4, 5, 6, 8, 9, 10, 11, 12, 13, 14, 15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) 16, 17, 18, 19, 20, 21, 22, 23 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static const struct max6697_chip_data max6697_chip_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) [max6581] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .channels = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .have_crit = 0xff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .have_ext = 0x7f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .have_fault = 0xfe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .valid_conf = MAX6581_CONF_EXTENDED | MAX6697_CONF_TIMEOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .alarm_map = max6581_alarm_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) [max6602] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .channels = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .have_crit = 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .have_ext = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .have_fault = 0x1e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) [max6622] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .channels = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .have_crit = 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .have_ext = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .have_fault = 0x1e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) [max6636] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .channels = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .have_crit = 0x72,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .have_ext = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .have_fault = 0x7e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) [max6689] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .channels = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .have_crit = 0x72,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .have_ext = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .have_fault = 0x7e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) [max6693] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .channels = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .have_crit = 0x72,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .have_ext = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .have_fault = 0x7e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .valid_conf = MAX6697_CONF_RESISTANCE | MAX6693_CONF_BETA |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) MAX6697_CONF_TIMEOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) [max6694] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .channels = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .have_crit = 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .have_ext = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .have_fault = 0x1e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .valid_conf = MAX6697_CONF_RESISTANCE | MAX6693_CONF_BETA |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) MAX6697_CONF_TIMEOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) [max6697] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .channels = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .have_crit = 0x72,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .have_ext = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .have_fault = 0x7e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) [max6698] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .channels = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .have_crit = 0x72,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .have_ext = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) .have_fault = 0x0e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) [max6699] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .channels = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .have_crit = 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .have_ext = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .have_fault = 0x1e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) static inline int max6581_offset_to_millic(int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) return sign_extend32(val, 7) * 250;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static struct max6697_data *max6697_update_device(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) struct max6697_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) struct max6697_data *ret = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) u32 alarms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) if (data->valid &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) !time_after(jiffies, data->last_updated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) + msecs_to_jiffies(data->update_interval)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) goto abort;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) for (i = 0; i < data->chip->channels; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) if (data->chip->have_ext & (1 << i)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) val = i2c_smbus_read_byte_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) MAX6697_REG_TEMP_EXT[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) if (unlikely(val < 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) ret = ERR_PTR(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) goto abort;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) data->temp[i][MAX6697_TEMP_EXT] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) val = i2c_smbus_read_byte_data(client, MAX6697_REG_TEMP[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) if (unlikely(val < 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) ret = ERR_PTR(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) goto abort;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) data->temp[i][MAX6697_TEMP_INPUT] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) val = i2c_smbus_read_byte_data(client, MAX6697_REG_MAX[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) if (unlikely(val < 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) ret = ERR_PTR(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) goto abort;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) data->temp[i][MAX6697_TEMP_MAX] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (data->chip->have_crit & (1 << i)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) val = i2c_smbus_read_byte_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) MAX6697_REG_CRIT[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) if (unlikely(val < 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) ret = ERR_PTR(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) goto abort;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) data->temp[i][MAX6697_TEMP_CRIT] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) alarms = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) for (i = 0; i < 3; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) val = i2c_smbus_read_byte_data(client, MAX6697_REG_STAT(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) if (unlikely(val < 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) ret = ERR_PTR(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) goto abort;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) alarms = (alarms << 8) | val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) data->alarms = alarms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) data->last_updated = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) data->valid = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) abort:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) static ssize_t temp_input_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) int index = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) struct max6697_data *data = max6697_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) int temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) if (IS_ERR(data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) return PTR_ERR(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) temp = (data->temp[index][MAX6697_TEMP_INPUT] - data->temp_offset) << 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) temp |= data->temp[index][MAX6697_TEMP_EXT] >> 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) return sprintf(buf, "%d\n", temp * 125);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) static ssize_t temp_show(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) int nr = to_sensor_dev_attr_2(devattr)->nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) int index = to_sensor_dev_attr_2(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) struct max6697_data *data = max6697_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) int temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) if (IS_ERR(data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) return PTR_ERR(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) temp = data->temp[nr][index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) temp -= data->temp_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) return sprintf(buf, "%d\n", temp * 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static ssize_t alarm_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) int index = to_sensor_dev_attr(attr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) struct max6697_data *data = max6697_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) if (IS_ERR(data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) return PTR_ERR(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) if (data->chip->alarm_map)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) index = data->chip->alarm_map[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) return sprintf(buf, "%u\n", (data->alarms >> index) & 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) static ssize_t temp_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) struct device_attribute *devattr, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) int nr = to_sensor_dev_attr_2(devattr)->nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) int index = to_sensor_dev_attr_2(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) struct max6697_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) long temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) ret = kstrtol(buf, 10, &temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) temp = DIV_ROUND_CLOSEST(temp, 1000) + data->temp_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) temp = clamp_val(temp, 0, data->type == max6581 ? 255 : 127);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) data->temp[nr][index] = temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) ret = i2c_smbus_write_byte_data(data->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) index == 2 ? MAX6697_REG_MAX[nr]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) : MAX6697_REG_CRIT[nr],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) return ret < 0 ? ret : count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) static ssize_t offset_store(struct device *dev, struct device_attribute *devattr, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) int val, ret, index, select;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) struct max6697_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) bool channel_enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) long temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) index = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) ret = kstrtol(buf, 10, &temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) select = i2c_smbus_read_byte_data(data->client, MAX6581_REG_OFFSET_SELECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) if (select < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) ret = select;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) goto abort;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) channel_enabled = (select & (1 << (index - 1)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) temp = clamp_val(temp, MAX6581_OFFSET_MIN, MAX6581_OFFSET_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) val = DIV_ROUND_CLOSEST(temp, 250);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) /* disable the offset for channel if the new offset is 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) if (val == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) if (channel_enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) ret = i2c_smbus_write_byte_data(data->client, MAX6581_REG_OFFSET_SELECT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) select & ~(1 << (index - 1)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) ret = ret < 0 ? ret : count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) goto abort;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) if (!channel_enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) ret = i2c_smbus_write_byte_data(data->client, MAX6581_REG_OFFSET_SELECT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) select | (1 << (index - 1)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) goto abort;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) ret = i2c_smbus_write_byte_data(data->client, MAX6581_REG_OFFSET, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) ret = ret < 0 ? ret : count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) abort:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) static ssize_t offset_show(struct device *dev, struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) struct max6697_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) int select, ret, index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) index = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) select = i2c_smbus_read_byte_data(data->client, MAX6581_REG_OFFSET_SELECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) if (select < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) ret = select;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) else if (select & (1 << (index - 1)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) ret = i2c_smbus_read_byte_data(data->client, MAX6581_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) return ret < 0 ? ret : sprintf(buf, "%d\n", max6581_offset_to_millic(ret));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) static SENSOR_DEVICE_ATTR_RO(temp1_input, temp_input, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) static SENSOR_DEVICE_ATTR_2_RW(temp1_max, temp, 0, MAX6697_TEMP_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) static SENSOR_DEVICE_ATTR_2_RW(temp1_crit, temp, 0, MAX6697_TEMP_CRIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) static SENSOR_DEVICE_ATTR_RO(temp2_input, temp_input, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) static SENSOR_DEVICE_ATTR_2_RW(temp2_max, temp, 1, MAX6697_TEMP_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) static SENSOR_DEVICE_ATTR_2_RW(temp2_crit, temp, 1, MAX6697_TEMP_CRIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) static SENSOR_DEVICE_ATTR_RO(temp3_input, temp_input, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) static SENSOR_DEVICE_ATTR_2_RW(temp3_max, temp, 2, MAX6697_TEMP_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) static SENSOR_DEVICE_ATTR_2_RW(temp3_crit, temp, 2, MAX6697_TEMP_CRIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) static SENSOR_DEVICE_ATTR_RO(temp4_input, temp_input, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) static SENSOR_DEVICE_ATTR_2_RW(temp4_max, temp, 3, MAX6697_TEMP_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) static SENSOR_DEVICE_ATTR_2_RW(temp4_crit, temp, 3, MAX6697_TEMP_CRIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) static SENSOR_DEVICE_ATTR_RO(temp5_input, temp_input, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) static SENSOR_DEVICE_ATTR_2_RW(temp5_max, temp, 4, MAX6697_TEMP_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) static SENSOR_DEVICE_ATTR_2_RW(temp5_crit, temp, 4, MAX6697_TEMP_CRIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) static SENSOR_DEVICE_ATTR_RO(temp6_input, temp_input, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) static SENSOR_DEVICE_ATTR_2_RW(temp6_max, temp, 5, MAX6697_TEMP_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) static SENSOR_DEVICE_ATTR_2_RW(temp6_crit, temp, 5, MAX6697_TEMP_CRIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) static SENSOR_DEVICE_ATTR_RO(temp7_input, temp_input, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) static SENSOR_DEVICE_ATTR_2_RW(temp7_max, temp, 6, MAX6697_TEMP_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) static SENSOR_DEVICE_ATTR_2_RW(temp7_crit, temp, 6, MAX6697_TEMP_CRIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) static SENSOR_DEVICE_ATTR_RO(temp8_input, temp_input, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) static SENSOR_DEVICE_ATTR_2_RW(temp8_max, temp, 7, MAX6697_TEMP_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) static SENSOR_DEVICE_ATTR_2_RW(temp8_crit, temp, 7, MAX6697_TEMP_CRIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) static SENSOR_DEVICE_ATTR_RO(temp1_max_alarm, alarm, 22);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) static SENSOR_DEVICE_ATTR_RO(temp2_max_alarm, alarm, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) static SENSOR_DEVICE_ATTR_RO(temp3_max_alarm, alarm, 17);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) static SENSOR_DEVICE_ATTR_RO(temp4_max_alarm, alarm, 18);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) static SENSOR_DEVICE_ATTR_RO(temp5_max_alarm, alarm, 19);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) static SENSOR_DEVICE_ATTR_RO(temp6_max_alarm, alarm, 20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) static SENSOR_DEVICE_ATTR_RO(temp7_max_alarm, alarm, 21);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) static SENSOR_DEVICE_ATTR_RO(temp8_max_alarm, alarm, 23);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) static SENSOR_DEVICE_ATTR_RO(temp1_crit_alarm, alarm, 14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) static SENSOR_DEVICE_ATTR_RO(temp2_crit_alarm, alarm, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) static SENSOR_DEVICE_ATTR_RO(temp3_crit_alarm, alarm, 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) static SENSOR_DEVICE_ATTR_RO(temp4_crit_alarm, alarm, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) static SENSOR_DEVICE_ATTR_RO(temp5_crit_alarm, alarm, 11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) static SENSOR_DEVICE_ATTR_RO(temp6_crit_alarm, alarm, 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) static SENSOR_DEVICE_ATTR_RO(temp7_crit_alarm, alarm, 13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) static SENSOR_DEVICE_ATTR_RO(temp8_crit_alarm, alarm, 15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) static SENSOR_DEVICE_ATTR_RO(temp2_fault, alarm, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) static SENSOR_DEVICE_ATTR_RO(temp3_fault, alarm, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) static SENSOR_DEVICE_ATTR_RO(temp4_fault, alarm, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) static SENSOR_DEVICE_ATTR_RO(temp5_fault, alarm, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) static SENSOR_DEVICE_ATTR_RO(temp6_fault, alarm, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) static SENSOR_DEVICE_ATTR_RO(temp7_fault, alarm, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) static SENSOR_DEVICE_ATTR_RO(temp8_fault, alarm, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) /* There is no offset for local temperature so starting from temp2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) static SENSOR_DEVICE_ATTR_RW(temp2_offset, offset, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) static SENSOR_DEVICE_ATTR_RW(temp3_offset, offset, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) static SENSOR_DEVICE_ATTR_RW(temp4_offset, offset, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) static SENSOR_DEVICE_ATTR_RW(temp5_offset, offset, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) static SENSOR_DEVICE_ATTR_RW(temp6_offset, offset, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) static SENSOR_DEVICE_ATTR_RW(temp7_offset, offset, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) static SENSOR_DEVICE_ATTR_RW(temp8_offset, offset, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) static DEVICE_ATTR(dummy, 0, NULL, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) static umode_t max6697_is_visible(struct kobject *kobj, struct attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) struct device *dev = container_of(kobj, struct device, kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) struct max6697_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) const struct max6697_chip_data *chip = data->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) int channel = index / 7; /* channel number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) int nr = index % 7; /* attribute index within channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) if (channel >= chip->channels)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) if ((nr == 3 || nr == 4) && !(chip->have_crit & (1 << channel)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) if (nr == 5 && !(chip->have_fault & (1 << channel)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) /* offset reg is only supported on max6581 remote channels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) if (nr == 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) if (data->type != max6581 || channel == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) return attr->mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) * max6697_is_visible uses the index into the following array to determine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) * if attributes should be created or not. Any change in order or content
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) * must be matched in max6697_is_visible.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) static struct attribute *max6697_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) &sensor_dev_attr_temp1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) &sensor_dev_attr_temp1_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) &sensor_dev_attr_temp1_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) &dev_attr_dummy.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) &dev_attr_dummy.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) &sensor_dev_attr_temp2_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) &sensor_dev_attr_temp2_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) &sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) &sensor_dev_attr_temp2_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) &sensor_dev_attr_temp2_fault.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) &sensor_dev_attr_temp2_offset.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) &sensor_dev_attr_temp3_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) &sensor_dev_attr_temp3_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) &sensor_dev_attr_temp3_max_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) &sensor_dev_attr_temp3_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) &sensor_dev_attr_temp3_crit_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) &sensor_dev_attr_temp3_fault.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) &sensor_dev_attr_temp3_offset.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) &sensor_dev_attr_temp4_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) &sensor_dev_attr_temp4_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) &sensor_dev_attr_temp4_max_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) &sensor_dev_attr_temp4_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) &sensor_dev_attr_temp4_crit_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) &sensor_dev_attr_temp4_fault.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) &sensor_dev_attr_temp4_offset.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) &sensor_dev_attr_temp5_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) &sensor_dev_attr_temp5_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) &sensor_dev_attr_temp5_max_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) &sensor_dev_attr_temp5_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) &sensor_dev_attr_temp5_crit_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) &sensor_dev_attr_temp5_fault.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) &sensor_dev_attr_temp5_offset.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) &sensor_dev_attr_temp6_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) &sensor_dev_attr_temp6_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) &sensor_dev_attr_temp6_max_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) &sensor_dev_attr_temp6_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) &sensor_dev_attr_temp6_crit_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) &sensor_dev_attr_temp6_fault.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) &sensor_dev_attr_temp6_offset.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) &sensor_dev_attr_temp7_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) &sensor_dev_attr_temp7_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) &sensor_dev_attr_temp7_max_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) &sensor_dev_attr_temp7_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) &sensor_dev_attr_temp7_crit_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) &sensor_dev_attr_temp7_fault.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) &sensor_dev_attr_temp7_offset.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) &sensor_dev_attr_temp8_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) &sensor_dev_attr_temp8_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) &sensor_dev_attr_temp8_max_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) &sensor_dev_attr_temp8_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) &sensor_dev_attr_temp8_crit_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) &sensor_dev_attr_temp8_fault.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) &sensor_dev_attr_temp8_offset.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) static const struct attribute_group max6697_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) .attrs = max6697_attributes, .is_visible = max6697_is_visible,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) __ATTRIBUTE_GROUPS(max6697);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) static void max6697_get_config_of(struct device_node *node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) struct max6697_platform_data *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) int len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) const __be32 *prop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) pdata->smbus_timeout_disable =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) of_property_read_bool(node, "smbus-timeout-disable");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) pdata->extended_range_enable =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) of_property_read_bool(node, "extended-range-enable");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) pdata->beta_compensation =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) of_property_read_bool(node, "beta-compensation-enable");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) prop = of_get_property(node, "alert-mask", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) if (prop && len == sizeof(u32))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) pdata->alert_mask = be32_to_cpu(prop[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) prop = of_get_property(node, "over-temperature-mask", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) if (prop && len == sizeof(u32))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) pdata->over_temperature_mask = be32_to_cpu(prop[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) prop = of_get_property(node, "resistance-cancellation", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) if (prop) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) if (len == sizeof(u32))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) pdata->resistance_cancellation = be32_to_cpu(prop[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) pdata->resistance_cancellation = 0xfe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) prop = of_get_property(node, "transistor-ideality", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) if (prop && len == 2 * sizeof(u32)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) pdata->ideality_mask = be32_to_cpu(prop[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) pdata->ideality_value = be32_to_cpu(prop[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) static int max6697_init_chip(struct max6697_data *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) struct max6697_platform_data *pdata = dev_get_platdata(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) struct max6697_platform_data p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) const struct max6697_chip_data *chip = data->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) int factor = chip->channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) int ret, reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) * Don't touch configuration if neither platform data nor OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) * configuration was specified. If that is the case, use the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) * current chip configuration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) if (!pdata && !client->dev.of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) reg = i2c_smbus_read_byte_data(client, MAX6697_REG_CONFIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) if (reg < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) return reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) if (data->type == max6581) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) if (reg & MAX6581_CONF_EXTENDED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) data->temp_offset = 64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) reg = i2c_smbus_read_byte_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) MAX6581_REG_RESISTANCE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) if (reg < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) return reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) factor += hweight8(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) if (reg & MAX6697_CONF_RESISTANCE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) factor++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) if (client->dev.of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) memset(&p, 0, sizeof(p));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) max6697_get_config_of(client->dev.of_node, &p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) pdata = &p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) reg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) if (pdata->smbus_timeout_disable &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) (chip->valid_conf & MAX6697_CONF_TIMEOUT)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) reg |= MAX6697_CONF_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) if (pdata->extended_range_enable &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) (chip->valid_conf & MAX6581_CONF_EXTENDED)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) reg |= MAX6581_CONF_EXTENDED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) data->temp_offset = 64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) if (pdata->resistance_cancellation &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) (chip->valid_conf & MAX6697_CONF_RESISTANCE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) reg |= MAX6697_CONF_RESISTANCE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) factor++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) if (pdata->beta_compensation &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) (chip->valid_conf & MAX6693_CONF_BETA)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) reg |= MAX6693_CONF_BETA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) ret = i2c_smbus_write_byte_data(client, MAX6697_REG_CONFIG, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) ret = i2c_smbus_write_byte_data(client, MAX6697_REG_ALERT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) MAX6697_ALERT_MAP_BITS(pdata->alert_mask));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) ret = i2c_smbus_write_byte_data(client, MAX6697_REG_OVERT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) MAX6697_OVERT_MAP_BITS(pdata->over_temperature_mask));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) if (data->type == max6581) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) factor += hweight8(pdata->resistance_cancellation >> 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) ret = i2c_smbus_write_byte_data(client, MAX6581_REG_RESISTANCE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) pdata->resistance_cancellation >> 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) ret = i2c_smbus_write_byte_data(client, MAX6581_REG_IDEALITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) pdata->ideality_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) ret = i2c_smbus_write_byte_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) MAX6581_REG_IDEALITY_SELECT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) pdata->ideality_mask >> 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) data->update_interval = factor * MAX6697_CONV_TIME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) static const struct i2c_device_id max6697_id[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) static int max6697_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) struct i2c_adapter *adapter = client->adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) struct max6697_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) data = devm_kzalloc(dev, sizeof(struct max6697_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) if (client->dev.of_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) data->type = (enum chips)of_device_get_match_data(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) data->type = i2c_match_id(max6697_id, client)->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) data->chip = &max6697_chip_data[data->type];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) mutex_init(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) err = max6697_init_chip(data, client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) max6697_groups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) return PTR_ERR_OR_ZERO(hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) static const struct i2c_device_id max6697_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) { "max6581", max6581 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) { "max6602", max6602 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) { "max6622", max6622 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) { "max6636", max6636 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) { "max6689", max6689 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) { "max6693", max6693 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) { "max6694", max6694 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) { "max6697", max6697 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) { "max6698", max6698 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) { "max6699", max6699 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) MODULE_DEVICE_TABLE(i2c, max6697_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) static const struct of_device_id __maybe_unused max6697_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) .compatible = "maxim,max6581",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) .data = (void *)max6581
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) .compatible = "maxim,max6602",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) .data = (void *)max6602
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) .compatible = "maxim,max6622",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) .data = (void *)max6622
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) .compatible = "maxim,max6636",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) .data = (void *)max6636
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) .compatible = "maxim,max6689",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) .data = (void *)max6689
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) .compatible = "maxim,max6693",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) .data = (void *)max6693
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) .compatible = "maxim,max6694",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) .data = (void *)max6694
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) .compatible = "maxim,max6697",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) .data = (void *)max6697
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) .compatible = "maxim,max6698",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) .data = (void *)max6698
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) .compatible = "maxim,max6699",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) .data = (void *)max6699
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) MODULE_DEVICE_TABLE(of, max6697_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) static struct i2c_driver max6697_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) .class = I2C_CLASS_HWMON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) .name = "max6697",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) .of_match_table = of_match_ptr(max6697_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) .probe_new = max6697_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) .id_table = max6697_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) module_i2c_driver(max6697_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) MODULE_DESCRIPTION("MAX6697 temperature sensor driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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