^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * max6650.c - Part of lm_sensors, Linux kernel modules for hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * monitoring.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * (C) 2007 by Hans J. Koch <hjk@hansjkoch.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * based on code written by John Morris <john.morris@spirentcom.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (c) 2003 Spirent Communications
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * and Claus Gindhart <claus.gindhart@kontron.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * This module has only been tested with the MAX6650 chip. It should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * also work with the MAX6651. It does not distinguish max6650 and max6651
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * chips.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * The datasheet was last seen at:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * http://pdfserv.maxim-ic.com/en/ds/MAX6650-MAX6651.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/hwmon-sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/thermal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * Insmod parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* fan_voltage: 5=5V fan, 12=12V fan, 0=don't change */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static int fan_voltage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* prescaler: Possible values are 1, 2, 4, 8, 16 or 0 for don't change */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static int prescaler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* clock: The clock frequency of the chip (max6651 can be clocked externally) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static int clock = 254000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) module_param(fan_voltage, int, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) module_param(prescaler, int, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) module_param(clock, int, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * MAX 6650/6651 registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define MAX6650_REG_SPEED 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define MAX6650_REG_CONFIG 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define MAX6650_REG_GPIO_DEF 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define MAX6650_REG_DAC 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define MAX6650_REG_ALARM_EN 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define MAX6650_REG_ALARM 0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define MAX6650_REG_TACH0 0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define MAX6650_REG_TACH1 0x0E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define MAX6650_REG_TACH2 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define MAX6650_REG_TACH3 0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define MAX6650_REG_GPIO_STAT 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define MAX6650_REG_COUNT 0x16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * Config register bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define MAX6650_CFG_V12 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define MAX6650_CFG_PRESCALER_MASK 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define MAX6650_CFG_PRESCALER_2 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define MAX6650_CFG_PRESCALER_4 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define MAX6650_CFG_PRESCALER_8 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define MAX6650_CFG_PRESCALER_16 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define MAX6650_CFG_MODE_MASK 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define MAX6650_CFG_MODE_ON 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define MAX6650_CFG_MODE_OFF 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define MAX6650_CFG_MODE_CLOSED_LOOP 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define MAX6650_CFG_MODE_OPEN_LOOP 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define MAX6650_COUNT_MASK 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * Alarm status register bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define MAX6650_ALRM_MAX 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define MAX6650_ALRM_MIN 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define MAX6650_ALRM_TACH 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define MAX6650_ALRM_GPIO1 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define MAX6650_ALRM_GPIO2 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) /* Minimum and maximum values of the FAN-RPM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define FAN_RPM_MIN 240
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define FAN_RPM_MAX 30000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define DIV_FROM_REG(reg) (1 << ((reg) & 7))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define DAC_LIMIT(v12) ((v12) ? 180 : 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * Client data (each client gets its own)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct max6650_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct mutex update_lock; /* protect alarm register updates */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) int nr_fans;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) bool valid; /* false until following fields are valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) unsigned long last_updated; /* in jiffies */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* register values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) u8 speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) u8 config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) u8 tach[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) u8 count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) u8 dac;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) u8 alarm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) u8 alarm_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) unsigned long cooling_dev_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static const u8 tach_reg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) MAX6650_REG_TACH0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) MAX6650_REG_TACH1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) MAX6650_REG_TACH2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) MAX6650_REG_TACH3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static const struct of_device_id __maybe_unused max6650_dt_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .compatible = "maxim,max6650",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .data = (void *)1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .compatible = "maxim,max6651",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .data = (void *)4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) MODULE_DEVICE_TABLE(of, max6650_dt_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static int dac_to_pwm(int dac, bool v12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) * Useful range for dac is 0-180 for 12V fans and 0-76 for 5V fans.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) * Lower DAC values mean higher speeds.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) return clamp_val(255 - (255 * dac) / DAC_LIMIT(v12), 0, 255);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static u8 pwm_to_dac(unsigned int pwm, bool v12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) int limit = DAC_LIMIT(v12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) return limit - (limit * pwm) / 255;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static struct max6650_data *max6650_update_device(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) struct max6650_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) int reg, err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) for (i = 0; i < data->nr_fans; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) reg = i2c_smbus_read_byte_data(client, tach_reg[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if (reg < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) err = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) data->tach[i] = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * Alarms are cleared on read in case the condition that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) * caused the alarm is removed. Keep the value latched here
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) * for providing the register through different alarm files.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) reg = i2c_smbus_read_byte_data(client, MAX6650_REG_ALARM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) if (reg < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) err = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) data->alarm |= reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) data->last_updated = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) data->valid = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) data = ERR_PTR(err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) return data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) * Change the operating mode of the chip (if needed).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) * mode is one of the MAX6650_CFG_MODE_* values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) static int max6650_set_operating_mode(struct max6650_data *data, u8 mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) int result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) u8 config = data->config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) if (mode == (config & MAX6650_CFG_MODE_MASK))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) config = (config & ~MAX6650_CFG_MODE_MASK) | mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) result = i2c_smbus_write_byte_data(data->client, MAX6650_REG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) if (result < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) data->config = config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) * Set the fan speed to the specified RPM (or read back the RPM setting).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) * This works in closed loop mode only. Use pwm1 for open loop speed setting.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) * The MAX6650/1 will automatically control fan speed when in closed loop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) * mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) * Assumptions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) * 1) The MAX6650/1 internal 254kHz clock frequency is set correctly. Use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) * the clock module parameter if you need to fine tune this.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * 2) The prescaler (low three bits of the config register) has already
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * been set to an appropriate value. Use the prescaler module parameter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * if your BIOS doesn't initialize the chip properly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) * The relevant equations are given on pages 21 and 22 of the datasheet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) * From the datasheet, the relevant equation when in regulation is:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) * [fCLK / (128 x (KTACH + 1))] = 2 x FanSpeed / KSCALE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) * where:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) * fCLK is the oscillator frequency (either the 254kHz internal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) * oscillator or the externally applied clock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) * KTACH is the value in the speed register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) * FanSpeed is the speed of the fan in rps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) * KSCALE is the prescaler value (1, 2, 4, 8, or 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) * When reading, we need to solve for FanSpeed. When writing, we need to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) * solve for KTACH.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) * Note: this tachometer is completely separate from the tachometers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) * used to measure the fan speeds. Only one fan's speed (fan1) is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) * controlled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static int max6650_set_target(struct max6650_data *data, unsigned long rpm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) int kscale, ktach;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) if (rpm == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) return max6650_set_operating_mode(data, MAX6650_CFG_MODE_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) rpm = clamp_val(rpm, FAN_RPM_MIN, FAN_RPM_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) * Divide the required speed by 60 to get from rpm to rps, then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) * use the datasheet equation:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) * KTACH = [(fCLK x KSCALE) / (256 x FanSpeed)] - 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) kscale = DIV_FROM_REG(data->config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) ktach = ((clock * kscale) / (256 * rpm / 60)) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) if (ktach < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) ktach = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) if (ktach > 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) ktach = 255;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) data->speed = ktach;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) return i2c_smbus_write_byte_data(data->client, MAX6650_REG_SPEED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) data->speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) * Get gpio alarm status:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) * Possible values:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) * 0 = no alarm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) * 1 = alarm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) static ssize_t alarm_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) struct max6650_data *data = max6650_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) bool alarm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) if (IS_ERR(data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) return PTR_ERR(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) alarm = data->alarm & attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) if (alarm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) data->alarm &= ~attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) data->valid = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) return sprintf(buf, "%d\n", alarm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) static SENSOR_DEVICE_ATTR_RO(gpio1_alarm, alarm, MAX6650_ALRM_GPIO1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) static SENSOR_DEVICE_ATTR_RO(gpio2_alarm, alarm, MAX6650_ALRM_GPIO2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) static umode_t max6650_attrs_visible(struct kobject *kobj, struct attribute *a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) int n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) struct device *dev = container_of(kobj, struct device, kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) struct max6650_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) struct device_attribute *devattr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) * Hide the alarms that have not been enabled by the firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) devattr = container_of(a, struct device_attribute, attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) if (devattr == &sensor_dev_attr_gpio1_alarm.dev_attr ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) devattr == &sensor_dev_attr_gpio2_alarm.dev_attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) if (!(data->alarm_en & to_sensor_dev_attr(devattr)->index))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) return a->mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) static struct attribute *max6650_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) &sensor_dev_attr_gpio1_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) &sensor_dev_attr_gpio2_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) static const struct attribute_group max6650_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) .attrs = max6650_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) .is_visible = max6650_attrs_visible,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) static const struct attribute_group *max6650_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) &max6650_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static int max6650_init_client(struct max6650_data *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) u32 voltage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) u32 prescale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) u32 target_rpm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) if (of_property_read_u32(dev->of_node, "maxim,fan-microvolt",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) &voltage))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) voltage = fan_voltage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) voltage /= 1000000; /* Microvolts to volts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) if (of_property_read_u32(dev->of_node, "maxim,fan-prescale",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) &prescale))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) prescale = prescaler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) reg = i2c_smbus_read_byte_data(client, MAX6650_REG_CONFIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) if (reg < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) dev_err(dev, "Error reading config register, aborting.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) return reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) switch (voltage) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) case 5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) reg &= ~MAX6650_CFG_V12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) case 12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) reg |= MAX6650_CFG_V12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) dev_err(dev, "illegal value for fan_voltage (%d)\n", voltage);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) switch (prescale) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) reg &= ~MAX6650_CFG_PRESCALER_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) reg = (reg & ~MAX6650_CFG_PRESCALER_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) | MAX6650_CFG_PRESCALER_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) reg = (reg & ~MAX6650_CFG_PRESCALER_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) | MAX6650_CFG_PRESCALER_4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) case 8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) reg = (reg & ~MAX6650_CFG_PRESCALER_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) | MAX6650_CFG_PRESCALER_8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) case 16:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) reg = (reg & ~MAX6650_CFG_PRESCALER_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) | MAX6650_CFG_PRESCALER_16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) dev_err(dev, "illegal value for prescaler (%d)\n", prescale);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) dev_info(dev, "Fan voltage: %dV, prescaler: %d.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) (reg & MAX6650_CFG_V12) ? 12 : 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 1 << (reg & MAX6650_CFG_PRESCALER_MASK));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) err = i2c_smbus_write_byte_data(client, MAX6650_REG_CONFIG, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) dev_err(dev, "Config write error, aborting.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) data->config = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) reg = i2c_smbus_read_byte_data(client, MAX6650_REG_SPEED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) if (reg < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) dev_err(dev, "Failed to read speed register, aborting.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) return reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) data->speed = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) reg = i2c_smbus_read_byte_data(client, MAX6650_REG_DAC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) if (reg < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) dev_err(dev, "Failed to read DAC register, aborting.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) return reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) data->dac = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) reg = i2c_smbus_read_byte_data(client, MAX6650_REG_COUNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) if (reg < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) dev_err(dev, "Failed to read count register, aborting.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) return reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) data->count = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) reg = i2c_smbus_read_byte_data(client, MAX6650_REG_ALARM_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) if (reg < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) dev_err(dev, "Failed to read alarm configuration, aborting.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) return reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) data->alarm_en = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) if (!of_property_read_u32(client->dev.of_node, "maxim,fan-target-rpm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) &target_rpm)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) max6650_set_target(data, target_rpm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) max6650_set_operating_mode(data, MAX6650_CFG_MODE_CLOSED_LOOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) static int max6650_get_max_state(struct thermal_cooling_device *cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) unsigned long *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) *state = 255;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) static int max6650_get_cur_state(struct thermal_cooling_device *cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) unsigned long *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) struct max6650_data *data = cdev->devdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) *state = data->cooling_dev_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) static int max6650_set_cur_state(struct thermal_cooling_device *cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) unsigned long state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) struct max6650_data *data = cdev->devdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) state = clamp_val(state, 0, 255);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) data->dac = pwm_to_dac(state, data->config & MAX6650_CFG_V12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) err = i2c_smbus_write_byte_data(client, MAX6650_REG_DAC, data->dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) if (!err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) max6650_set_operating_mode(data, state ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) MAX6650_CFG_MODE_OPEN_LOOP :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) MAX6650_CFG_MODE_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) data->cooling_dev_state = state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) static const struct thermal_cooling_device_ops max6650_cooling_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) .get_max_state = max6650_get_max_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) .get_cur_state = max6650_get_cur_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) .set_cur_state = max6650_set_cur_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) static int max6650_read(struct device *dev, enum hwmon_sensor_types type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) u32 attr, int channel, long *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) struct max6650_data *data = max6650_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) int mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) if (IS_ERR(data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) return PTR_ERR(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) case hwmon_pwm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) switch (attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) case hwmon_pwm_input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) *val = dac_to_pwm(data->dac,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) data->config & MAX6650_CFG_V12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) case hwmon_pwm_enable:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) * Possible values:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) * 0 = Fan always on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) * 1 = Open loop, Voltage is set according to speed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) * not regulated.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) * 2 = Closed loop, RPM for all fans regulated by fan1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) * tachometer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) * 3 = Fan off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) mode = (data->config & MAX6650_CFG_MODE_MASK) >> 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) *val = (4 - mode) & 3; /* {0 1 2 3} -> {0 3 2 1} */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) case hwmon_fan:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) switch (attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) case hwmon_fan_input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) * Calculation details:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) * Each tachometer counts over an interval given by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) * "count" register (0.25, 0.5, 1 or 2 seconds).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) * The driver assumes that the fans produce two pulses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) * per revolution (this seems to be the most common).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) *val = DIV_ROUND_CLOSEST(data->tach[channel] * 120,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) DIV_FROM_REG(data->count));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) case hwmon_fan_div:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) *val = DIV_FROM_REG(data->count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) case hwmon_fan_target:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) * Use the datasheet equation:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) * FanSpeed = KSCALE x fCLK / [256 x (KTACH + 1)]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) * then multiply by 60 to give rpm.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) *val = 60 * DIV_FROM_REG(data->config) * clock /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) (256 * (data->speed + 1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) case hwmon_fan_min_alarm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) *val = !!(data->alarm & MAX6650_ALRM_MIN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) data->alarm &= ~MAX6650_ALRM_MIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) data->valid = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) case hwmon_fan_max_alarm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) *val = !!(data->alarm & MAX6650_ALRM_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) data->alarm &= ~MAX6650_ALRM_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) data->valid = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) case hwmon_fan_fault:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) *val = !!(data->alarm & MAX6650_ALRM_TACH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) data->alarm &= ~MAX6650_ALRM_TACH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) data->valid = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) static const u8 max6650_pwm_modes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) MAX6650_CFG_MODE_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) MAX6650_CFG_MODE_OPEN_LOOP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) MAX6650_CFG_MODE_CLOSED_LOOP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) MAX6650_CFG_MODE_OFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) static int max6650_write(struct device *dev, enum hwmon_sensor_types type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) u32 attr, int channel, long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) struct max6650_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) case hwmon_pwm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) switch (attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) case hwmon_pwm_input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) reg = pwm_to_dac(clamp_val(val, 0, 255),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) data->config & MAX6650_CFG_V12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) ret = i2c_smbus_write_byte_data(data->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) MAX6650_REG_DAC, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) data->dac = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) case hwmon_pwm_enable:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) if (val < 0 || val >= ARRAY_SIZE(max6650_pwm_modes)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) ret = max6650_set_operating_mode(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) max6650_pwm_modes[val]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) ret = -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) case hwmon_fan:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) switch (attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) case hwmon_fan_div:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) switch (val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) reg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) reg = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) reg = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) case 8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) reg = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) ret = i2c_smbus_write_byte_data(data->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) MAX6650_REG_COUNT, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) data->count = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) case hwmon_fan_target:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) if (val < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) ret = max6650_set_target(data, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) ret = -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) ret = -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) static umode_t max6650_is_visible(const void *_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) enum hwmon_sensor_types type, u32 attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) int channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) const struct max6650_data *data = _data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) if (channel && (channel >= data->nr_fans || type != hwmon_fan))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) case hwmon_fan:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) switch (attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) case hwmon_fan_input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) return 0444;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) case hwmon_fan_target:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) case hwmon_fan_div:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) return 0644;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) case hwmon_fan_min_alarm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) if (data->alarm_en & MAX6650_ALRM_MIN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) return 0444;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) case hwmon_fan_max_alarm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) if (data->alarm_en & MAX6650_ALRM_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) return 0444;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) case hwmon_fan_fault:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) if (data->alarm_en & MAX6650_ALRM_TACH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) return 0444;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) case hwmon_pwm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) switch (attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) case hwmon_pwm_input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) case hwmon_pwm_enable:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) return 0644;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) static const struct hwmon_channel_info *max6650_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) HWMON_CHANNEL_INFO(fan, HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_DIV |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) HWMON_F_MIN_ALARM | HWMON_F_MAX_ALARM |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) HWMON_F_FAULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) HWMON_F_INPUT, HWMON_F_INPUT, HWMON_F_INPUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) HWMON_CHANNEL_INFO(pwm, HWMON_PWM_INPUT | HWMON_PWM_ENABLE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) static const struct hwmon_ops max6650_hwmon_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) .read = max6650_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) .write = max6650_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) .is_visible = max6650_is_visible,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) static const struct hwmon_chip_info max6650_chip_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) .ops = &max6650_hwmon_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) .info = max6650_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) static const struct i2c_device_id max6650_id[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) static int max6650_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) struct thermal_cooling_device *cooling_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) const struct of_device_id *of_id =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) of_match_device(of_match_ptr(max6650_dt_match), dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) struct max6650_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) data = devm_kzalloc(dev, sizeof(struct max6650_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) i2c_set_clientdata(client, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) mutex_init(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) data->nr_fans = of_id ? (int)(uintptr_t)of_id->data :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) i2c_match_id(max6650_id, client)->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) * Initialize the max6650 chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) err = max6650_init_client(data, client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) hwmon_dev = devm_hwmon_device_register_with_info(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) client->name, data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) &max6650_chip_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) max6650_groups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) err = PTR_ERR_OR_ZERO(hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) if (IS_ENABLED(CONFIG_THERMAL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) cooling_dev = devm_thermal_of_cooling_device_register(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) dev->of_node, client->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) data, &max6650_cooling_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) if (IS_ERR(cooling_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) dev_warn(dev, "thermal cooling device register failed: %ld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) PTR_ERR(cooling_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) static const struct i2c_device_id max6650_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) { "max6650", 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) { "max6651", 4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) MODULE_DEVICE_TABLE(i2c, max6650_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) static struct i2c_driver max6650_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) .name = "max6650",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) .of_match_table = of_match_ptr(max6650_dt_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) .probe_new = max6650_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) .id_table = max6650_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) module_i2c_driver(max6650_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) MODULE_AUTHOR("Hans J. Koch");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) MODULE_DESCRIPTION("MAX6650 sensor driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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