Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Driver for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *  Maxim MAX16065/MAX16066 12-Channel/8-Channel, Flash-Configurable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *  System Managers with Nonvolatile Fault Registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *  Maxim MAX16067/MAX16068 6-Channel, Flash-Configurable System Managers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *  with Nonvolatile Fault Registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *  Maxim MAX16070/MAX16071 12-Channel/8-Channel, Flash-Configurable System
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *  Monitors with Nonvolatile Fault Registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * Copyright (C) 2011 Ericsson AB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/hwmon-sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) enum chips { max16065, max16066, max16067, max16068, max16070, max16071 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  * Registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define MAX16065_ADC(x)		((x) * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define MAX16065_CURR_SENSE	0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define MAX16065_CSP_ADC	0x19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define MAX16065_FAULT(x)	(0x1b + (x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define MAX16065_SCALE(x)	(0x43 + (x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define MAX16065_CURR_CONTROL	0x47
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define MAX16065_LIMIT(l, x)	(0x48 + (l) + (x) * 3)	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 							 * l: limit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 							 *  0: min/max
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 							 *  1: crit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 							 *  2: lcrit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 							 * x: ADC index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 							 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define MAX16065_SW_ENABLE	0x73
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define MAX16065_WARNING_OV	(1 << 3) /* Set if secondary threshold is OV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 					    warning */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define MAX16065_CURR_ENABLE	(1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define MAX16065_NUM_LIMIT	3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define MAX16065_NUM_ADC	12	/* maximum number of ADC channels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) static const int max16065_num_adc[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	[max16065] = 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	[max16066] = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	[max16067] = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	[max16068] = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	[max16070] = 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	[max16071] = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) static const bool max16065_have_secondary[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	[max16065] = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	[max16066] = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	[max16067] = false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	[max16068] = false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	[max16070] = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	[max16071] = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) static const bool max16065_have_current[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	[max16065] = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	[max16066] = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	[max16067] = false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	[max16068] = false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	[max16070] = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	[max16071] = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) struct max16065_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	enum chips type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	const struct attribute_group *groups[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	struct mutex update_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	bool valid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	unsigned long last_updated; /* in jiffies */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	int num_adc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	bool have_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	int curr_gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	/* limits are in mV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	int limit[MAX16065_NUM_LIMIT][MAX16065_NUM_ADC];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	int range[MAX16065_NUM_ADC + 1];/* voltage range */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	int adc[MAX16065_NUM_ADC + 1];	/* adc values (raw) including csp_adc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	int curr_sense;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	int fault[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) static const int max16065_adc_range[] = { 5560, 2780, 1390, 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static const int max16065_csp_adc_range[] = { 7000, 14000 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* ADC registers have 10 bit resolution. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static inline int ADC_TO_MV(int adc, int range)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	return (adc * range) / 1024;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)  * Limit registers have 8 bit resolution and match upper 8 bits of ADC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)  * registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static inline int LIMIT_TO_MV(int limit, int range)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	return limit * range / 256;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static inline int MV_TO_LIMIT(int mv, int range)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	return clamp_val(DIV_ROUND_CLOSEST(mv * 256, range), 0, 255);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static inline int ADC_TO_CURR(int adc, int gain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	return adc * 1400000 / (gain * 255);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)  * max16065_read_adc()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)  * Read 16 bit value from <reg>, <reg+1>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)  * Upper 8 bits are in <reg>, lower 2 bits are in bits 7:6 of <reg+1>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static int max16065_read_adc(struct i2c_client *client, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	int rv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	rv = i2c_smbus_read_word_swapped(client, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	if (unlikely(rv < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		return rv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	return rv >> 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static struct max16065_data *max16065_update_device(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	struct max16065_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		for (i = 0; i < data->num_adc; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 			data->adc[i]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 			  = max16065_read_adc(client, MAX16065_ADC(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		if (data->have_current) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 			data->adc[MAX16065_NUM_ADC]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 			  = max16065_read_adc(client, MAX16065_CSP_ADC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 			data->curr_sense
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 			  = i2c_smbus_read_byte_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 						     MAX16065_CURR_SENSE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		for (i = 0; i < DIV_ROUND_UP(data->num_adc, 8); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 			data->fault[i]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 			  = i2c_smbus_read_byte_data(client, MAX16065_FAULT(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		data->last_updated = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		data->valid = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	return data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static ssize_t max16065_alarm_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 				   struct device_attribute *da, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	struct sensor_device_attribute_2 *attr2 = to_sensor_dev_attr_2(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	struct max16065_data *data = max16065_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	int val = data->fault[attr2->nr];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	if (val < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	val &= (1 << attr2->index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	if (val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		i2c_smbus_write_byte_data(data->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 					  MAX16065_FAULT(attr2->nr), val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	return snprintf(buf, PAGE_SIZE, "%d\n", !!val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static ssize_t max16065_input_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 				   struct device_attribute *da, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	struct max16065_data *data = max16065_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	int adc = data->adc[attr->index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	if (unlikely(adc < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		return adc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	return snprintf(buf, PAGE_SIZE, "%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 			ADC_TO_MV(adc, data->range[attr->index]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static ssize_t max16065_current_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 				     struct device_attribute *da, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	struct max16065_data *data = max16065_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	if (unlikely(data->curr_sense < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 		return data->curr_sense;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	return snprintf(buf, PAGE_SIZE, "%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 			ADC_TO_CURR(data->curr_sense, data->curr_gain));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) static ssize_t max16065_limit_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 				    struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 				    const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	struct sensor_device_attribute_2 *attr2 = to_sensor_dev_attr_2(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	struct max16065_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	int limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	if (unlikely(err < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	limit = MV_TO_LIMIT(val, data->range[attr2->index]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	data->limit[attr2->nr][attr2->index]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	  = LIMIT_TO_MV(limit, data->range[attr2->index]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	i2c_smbus_write_byte_data(data->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 				  MAX16065_LIMIT(attr2->nr, attr2->index),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 				  limit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static ssize_t max16065_limit_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 				   struct device_attribute *da, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	struct sensor_device_attribute_2 *attr2 = to_sensor_dev_attr_2(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	struct max16065_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	return snprintf(buf, PAGE_SIZE, "%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 			data->limit[attr2->nr][attr2->index]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) /* Construct a sensor_device_attribute structure for each register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) /* Input voltages */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) static SENSOR_DEVICE_ATTR_RO(in0_input, max16065_input, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) static SENSOR_DEVICE_ATTR_RO(in1_input, max16065_input, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) static SENSOR_DEVICE_ATTR_RO(in2_input, max16065_input, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static SENSOR_DEVICE_ATTR_RO(in3_input, max16065_input, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) static SENSOR_DEVICE_ATTR_RO(in4_input, max16065_input, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) static SENSOR_DEVICE_ATTR_RO(in5_input, max16065_input, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static SENSOR_DEVICE_ATTR_RO(in6_input, max16065_input, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) static SENSOR_DEVICE_ATTR_RO(in7_input, max16065_input, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) static SENSOR_DEVICE_ATTR_RO(in8_input, max16065_input, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) static SENSOR_DEVICE_ATTR_RO(in9_input, max16065_input, 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) static SENSOR_DEVICE_ATTR_RO(in10_input, max16065_input, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) static SENSOR_DEVICE_ATTR_RO(in11_input, max16065_input, 11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) static SENSOR_DEVICE_ATTR_RO(in12_input, max16065_input, 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) /* Input voltages lcrit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) static SENSOR_DEVICE_ATTR_2_RW(in0_lcrit, max16065_limit, 2, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) static SENSOR_DEVICE_ATTR_2_RW(in1_lcrit, max16065_limit, 2, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) static SENSOR_DEVICE_ATTR_2_RW(in2_lcrit, max16065_limit, 2, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) static SENSOR_DEVICE_ATTR_2_RW(in3_lcrit, max16065_limit, 2, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) static SENSOR_DEVICE_ATTR_2_RW(in4_lcrit, max16065_limit, 2, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) static SENSOR_DEVICE_ATTR_2_RW(in5_lcrit, max16065_limit, 2, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) static SENSOR_DEVICE_ATTR_2_RW(in6_lcrit, max16065_limit, 2, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) static SENSOR_DEVICE_ATTR_2_RW(in7_lcrit, max16065_limit, 2, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) static SENSOR_DEVICE_ATTR_2_RW(in8_lcrit, max16065_limit, 2, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) static SENSOR_DEVICE_ATTR_2_RW(in9_lcrit, max16065_limit, 2, 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) static SENSOR_DEVICE_ATTR_2_RW(in10_lcrit, max16065_limit, 2, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static SENSOR_DEVICE_ATTR_2_RW(in11_lcrit, max16065_limit, 2, 11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) /* Input voltages crit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static SENSOR_DEVICE_ATTR_2_RW(in0_crit, max16065_limit, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) static SENSOR_DEVICE_ATTR_2_RW(in1_crit, max16065_limit, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) static SENSOR_DEVICE_ATTR_2_RW(in2_crit, max16065_limit, 1, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) static SENSOR_DEVICE_ATTR_2_RW(in3_crit, max16065_limit, 1, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) static SENSOR_DEVICE_ATTR_2_RW(in4_crit, max16065_limit, 1, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) static SENSOR_DEVICE_ATTR_2_RW(in5_crit, max16065_limit, 1, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) static SENSOR_DEVICE_ATTR_2_RW(in6_crit, max16065_limit, 1, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) static SENSOR_DEVICE_ATTR_2_RW(in7_crit, max16065_limit, 1, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) static SENSOR_DEVICE_ATTR_2_RW(in8_crit, max16065_limit, 1, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) static SENSOR_DEVICE_ATTR_2_RW(in9_crit, max16065_limit, 1, 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) static SENSOR_DEVICE_ATTR_2_RW(in10_crit, max16065_limit, 1, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) static SENSOR_DEVICE_ATTR_2_RW(in11_crit, max16065_limit, 1, 11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) /* Input voltages min */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) static SENSOR_DEVICE_ATTR_2_RW(in0_min, max16065_limit, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) static SENSOR_DEVICE_ATTR_2_RW(in1_min, max16065_limit, 0, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) static SENSOR_DEVICE_ATTR_2_RW(in2_min, max16065_limit, 0, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) static SENSOR_DEVICE_ATTR_2_RW(in3_min, max16065_limit, 0, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) static SENSOR_DEVICE_ATTR_2_RW(in4_min, max16065_limit, 0, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) static SENSOR_DEVICE_ATTR_2_RW(in5_min, max16065_limit, 0, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) static SENSOR_DEVICE_ATTR_2_RW(in6_min, max16065_limit, 0, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) static SENSOR_DEVICE_ATTR_2_RW(in7_min, max16065_limit, 0, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) static SENSOR_DEVICE_ATTR_2_RW(in8_min, max16065_limit, 0, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) static SENSOR_DEVICE_ATTR_2_RW(in9_min, max16065_limit, 0, 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) static SENSOR_DEVICE_ATTR_2_RW(in10_min, max16065_limit, 0, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) static SENSOR_DEVICE_ATTR_2_RW(in11_min, max16065_limit, 0, 11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) /* Input voltages max */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) static SENSOR_DEVICE_ATTR_2_RW(in0_max, max16065_limit, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) static SENSOR_DEVICE_ATTR_2_RW(in1_max, max16065_limit, 0, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) static SENSOR_DEVICE_ATTR_2_RW(in2_max, max16065_limit, 0, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) static SENSOR_DEVICE_ATTR_2_RW(in3_max, max16065_limit, 0, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) static SENSOR_DEVICE_ATTR_2_RW(in4_max, max16065_limit, 0, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) static SENSOR_DEVICE_ATTR_2_RW(in5_max, max16065_limit, 0, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) static SENSOR_DEVICE_ATTR_2_RW(in6_max, max16065_limit, 0, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) static SENSOR_DEVICE_ATTR_2_RW(in7_max, max16065_limit, 0, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) static SENSOR_DEVICE_ATTR_2_RW(in8_max, max16065_limit, 0, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) static SENSOR_DEVICE_ATTR_2_RW(in9_max, max16065_limit, 0, 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) static SENSOR_DEVICE_ATTR_2_RW(in10_max, max16065_limit, 0, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) static SENSOR_DEVICE_ATTR_2_RW(in11_max, max16065_limit, 0, 11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) /* alarms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) static SENSOR_DEVICE_ATTR_2_RO(in0_alarm, max16065_alarm, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) static SENSOR_DEVICE_ATTR_2_RO(in1_alarm, max16065_alarm, 0, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) static SENSOR_DEVICE_ATTR_2_RO(in2_alarm, max16065_alarm, 0, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) static SENSOR_DEVICE_ATTR_2_RO(in3_alarm, max16065_alarm, 0, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) static SENSOR_DEVICE_ATTR_2_RO(in4_alarm, max16065_alarm, 0, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) static SENSOR_DEVICE_ATTR_2_RO(in5_alarm, max16065_alarm, 0, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) static SENSOR_DEVICE_ATTR_2_RO(in6_alarm, max16065_alarm, 0, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) static SENSOR_DEVICE_ATTR_2_RO(in7_alarm, max16065_alarm, 0, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) static SENSOR_DEVICE_ATTR_2_RO(in8_alarm, max16065_alarm, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) static SENSOR_DEVICE_ATTR_2_RO(in9_alarm, max16065_alarm, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) static SENSOR_DEVICE_ATTR_2_RO(in10_alarm, max16065_alarm, 1, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) static SENSOR_DEVICE_ATTR_2_RO(in11_alarm, max16065_alarm, 1, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) /* Current and alarm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) static SENSOR_DEVICE_ATTR_RO(curr1_input, max16065_current, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) static SENSOR_DEVICE_ATTR_2_RO(curr1_alarm, max16065_alarm, 1, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)  * Finally, construct an array of pointers to members of the above objects,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)  * as required for sysfs_create_group()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) static struct attribute *max16065_basic_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	&sensor_dev_attr_in0_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	&sensor_dev_attr_in0_lcrit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	&sensor_dev_attr_in0_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	&sensor_dev_attr_in0_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	&sensor_dev_attr_in1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	&sensor_dev_attr_in1_lcrit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	&sensor_dev_attr_in1_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	&sensor_dev_attr_in1_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	&sensor_dev_attr_in2_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	&sensor_dev_attr_in2_lcrit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	&sensor_dev_attr_in2_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	&sensor_dev_attr_in2_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	&sensor_dev_attr_in3_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	&sensor_dev_attr_in3_lcrit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	&sensor_dev_attr_in3_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	&sensor_dev_attr_in3_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	&sensor_dev_attr_in4_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	&sensor_dev_attr_in4_lcrit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	&sensor_dev_attr_in4_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	&sensor_dev_attr_in4_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	&sensor_dev_attr_in5_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	&sensor_dev_attr_in5_lcrit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	&sensor_dev_attr_in5_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	&sensor_dev_attr_in5_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	&sensor_dev_attr_in6_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	&sensor_dev_attr_in6_lcrit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	&sensor_dev_attr_in6_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	&sensor_dev_attr_in6_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	&sensor_dev_attr_in7_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	&sensor_dev_attr_in7_lcrit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	&sensor_dev_attr_in7_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	&sensor_dev_attr_in7_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	&sensor_dev_attr_in8_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	&sensor_dev_attr_in8_lcrit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	&sensor_dev_attr_in8_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	&sensor_dev_attr_in8_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	&sensor_dev_attr_in9_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	&sensor_dev_attr_in9_lcrit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	&sensor_dev_attr_in9_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	&sensor_dev_attr_in9_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	&sensor_dev_attr_in10_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	&sensor_dev_attr_in10_lcrit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	&sensor_dev_attr_in10_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	&sensor_dev_attr_in10_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	&sensor_dev_attr_in11_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	&sensor_dev_attr_in11_lcrit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	&sensor_dev_attr_in11_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	&sensor_dev_attr_in11_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) static struct attribute *max16065_current_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 	&sensor_dev_attr_in12_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 	&sensor_dev_attr_curr1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 	&sensor_dev_attr_curr1_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) static struct attribute *max16065_min_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 	&sensor_dev_attr_in0_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 	&sensor_dev_attr_in1_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 	&sensor_dev_attr_in2_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 	&sensor_dev_attr_in3_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 	&sensor_dev_attr_in4_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 	&sensor_dev_attr_in5_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 	&sensor_dev_attr_in6_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 	&sensor_dev_attr_in7_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	&sensor_dev_attr_in8_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 	&sensor_dev_attr_in9_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 	&sensor_dev_attr_in10_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 	&sensor_dev_attr_in11_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) static struct attribute *max16065_max_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 	&sensor_dev_attr_in0_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 	&sensor_dev_attr_in1_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 	&sensor_dev_attr_in2_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 	&sensor_dev_attr_in3_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 	&sensor_dev_attr_in4_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 	&sensor_dev_attr_in5_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	&sensor_dev_attr_in6_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 	&sensor_dev_attr_in7_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 	&sensor_dev_attr_in8_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 	&sensor_dev_attr_in9_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 	&sensor_dev_attr_in10_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 	&sensor_dev_attr_in11_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) static umode_t max16065_basic_is_visible(struct kobject *kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 					 struct attribute *a, int n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 	struct device *dev = container_of(kobj, struct device, kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 	struct max16065_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 	int index = n / 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 	if (index >= data->num_adc || !data->range[index])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 	return a->mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) static umode_t max16065_secondary_is_visible(struct kobject *kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 					     struct attribute *a, int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 	struct device *dev = container_of(kobj, struct device, kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 	struct max16065_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 	if (index >= data->num_adc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 	return a->mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) static const struct attribute_group max16065_basic_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 	.attrs = max16065_basic_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 	.is_visible = max16065_basic_is_visible,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) static const struct attribute_group max16065_current_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 	.attrs = max16065_current_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) static const struct attribute_group max16065_min_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 	.attrs = max16065_min_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 	.is_visible = max16065_secondary_is_visible,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) static const struct attribute_group max16065_max_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 	.attrs = max16065_max_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 	.is_visible = max16065_secondary_is_visible,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) static const struct i2c_device_id max16065_id[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) static int max16065_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) 	struct i2c_adapter *adapter = client->adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 	struct max16065_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 	struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 	struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 	int i, j, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 	bool have_secondary;		/* true if chip has secondary limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 	bool secondary_is_max = false;	/* secondary limits reflect max */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) 	int groups = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 	const struct i2c_device_id *id = i2c_match_id(max16065_id, client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 				     | I2C_FUNC_SMBUS_READ_WORD_DATA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 	if (unlikely(!data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 	data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 	mutex_init(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 	data->num_adc = max16065_num_adc[id->driver_data];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 	data->have_current = max16065_have_current[id->driver_data];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 	have_secondary = max16065_have_secondary[id->driver_data];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 	if (have_secondary) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 		val = i2c_smbus_read_byte_data(client, MAX16065_SW_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) 		if (unlikely(val < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 			return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 		secondary_is_max = val & MAX16065_WARNING_OV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) 	/* Read scale registers, convert to range */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 	for (i = 0; i < DIV_ROUND_UP(data->num_adc, 4); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 		val = i2c_smbus_read_byte_data(client, MAX16065_SCALE(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) 		if (unlikely(val < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 			return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 		for (j = 0; j < 4 && i * 4 + j < data->num_adc; j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 			data->range[i * 4 + j] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 			  max16065_adc_range[(val >> (j * 2)) & 0x3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) 	/* Read limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) 	for (i = 0; i < MAX16065_NUM_LIMIT; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) 		if (i == 0 && !have_secondary)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) 		for (j = 0; j < data->num_adc; j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) 			val = i2c_smbus_read_byte_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) 						       MAX16065_LIMIT(i, j));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) 			if (unlikely(val < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) 				return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) 			data->limit[i][j] = LIMIT_TO_MV(val, data->range[j]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) 	/* sysfs hooks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) 	data->groups[groups++] = &max16065_basic_group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) 	if (have_secondary)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) 		data->groups[groups++] = secondary_is_max ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) 			&max16065_max_group : &max16065_min_group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) 	if (data->have_current) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) 		val = i2c_smbus_read_byte_data(client, MAX16065_CURR_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) 		if (unlikely(val < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) 			return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) 		if (val & MAX16065_CURR_ENABLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) 			 * Current gain is 6, 12, 24, 48 based on values in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) 			 * bit 2,3.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) 			data->curr_gain = 6 << ((val >> 2) & 0x03);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) 			data->range[MAX16065_NUM_ADC]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) 			  = max16065_csp_adc_range[(val >> 1) & 0x01];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) 			data->groups[groups++] = &max16065_current_group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) 			data->have_current = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) 	hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) 							   data, data->groups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) 	return PTR_ERR_OR_ZERO(hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) static const struct i2c_device_id max16065_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) 	{ "max16065", max16065 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) 	{ "max16066", max16066 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) 	{ "max16067", max16067 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) 	{ "max16068", max16068 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) 	{ "max16070", max16070 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) 	{ "max16071", max16071 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) MODULE_DEVICE_TABLE(i2c, max16065_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) /* This is the driver that will be inserted */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) static struct i2c_driver max16065_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) 		.name = "max16065",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) 	.probe_new = max16065_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) 	.id_table = max16065_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) module_i2c_driver(max16065_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) MODULE_DESCRIPTION("MAX16065 driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) MODULE_LICENSE("GPL");