^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Driver for Linear Technology LTC4261 I2C Negative Voltage Hot Swap Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2010 Ericsson AB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Derived from:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Driver for Linear Technology LTC4245 I2C Multiple Supply Hot Swap Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Copyright (C) 2008 Ira W. Snyder <iws@ovro.caltech.edu>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Datasheet: http://cds.linear.com/docs/Datasheet/42612fb.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/hwmon-sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /* chip registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define LTC4261_STATUS 0x00 /* readonly */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define LTC4261_FAULT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define LTC4261_ALERT 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define LTC4261_CONTROL 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define LTC4261_SENSE_H 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define LTC4261_SENSE_L 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define LTC4261_ADIN2_H 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define LTC4261_ADIN2_L 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define LTC4261_ADIN_H 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define LTC4261_ADIN_L 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * Fault register bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define FAULT_OV (1<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define FAULT_UV (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define FAULT_OC (1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct ltc4261_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct mutex update_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) bool valid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) unsigned long last_updated; /* in jiffies */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /* Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) u8 regs[10];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static struct ltc4261_data *ltc4261_update_device(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct ltc4261_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct ltc4261_data *ret = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) if (time_after(jiffies, data->last_updated + HZ / 4) || !data->valid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /* Read registers -- 0x00 to 0x09 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) for (i = 0; i < ARRAY_SIZE(data->regs); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) val = i2c_smbus_read_byte_data(client, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) if (unlikely(val < 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) dev_dbg(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) "Failed to read ADC value: error %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) ret = ERR_PTR(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) data->valid = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) goto abort;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) data->regs[i] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) data->last_updated = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) data->valid = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) abort:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* Return the voltage from the given register in mV or mA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static int ltc4261_get_value(struct ltc4261_data *data, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) val = (data->regs[reg] << 2) + (data->regs[reg + 1] >> 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) case LTC4261_ADIN_H:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) case LTC4261_ADIN2_H:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) /* 2.5mV resolution. Convert to mV. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) val = val * 25 / 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) case LTC4261_SENSE_H:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * 62.5uV resolution. Convert to current as measured with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * an 1 mOhm sense resistor, in mA. If a different sense
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * resistor is installed, calculate the actual current by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * dividing the reported current by the sense resistor value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * in mOhm.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) val = val * 625 / 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) /* If we get here, the developer messed up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) WARN_ON_ONCE(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static ssize_t ltc4261_value_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) struct device_attribute *da, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) struct ltc4261_data *data = ltc4261_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) int value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) if (IS_ERR(data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) return PTR_ERR(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) value = ltc4261_get_value(data, attr->index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return snprintf(buf, PAGE_SIZE, "%d\n", value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static ssize_t ltc4261_bool_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) struct device_attribute *da, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) struct ltc4261_data *data = ltc4261_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) u8 fault;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) if (IS_ERR(data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) return PTR_ERR(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) fault = data->regs[LTC4261_FAULT] & attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) if (fault) /* Clear reported faults in chip register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) i2c_smbus_write_byte_data(data->client, LTC4261_FAULT, ~fault);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) return snprintf(buf, PAGE_SIZE, "%d\n", fault ? 1 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * Input voltages.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static SENSOR_DEVICE_ATTR_RO(in1_input, ltc4261_value, LTC4261_ADIN_H);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static SENSOR_DEVICE_ATTR_RO(in2_input, ltc4261_value, LTC4261_ADIN2_H);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) * Voltage alarms. The chip has only one set of voltage alarm status bits,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * triggered by input voltage alarms. In many designs, those alarms are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) * associated with the ADIN2 sensor, due to the proximity of the ADIN2 pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) * to the OV pin. ADIN2 is, however, not available on all chip variants.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) * To ensure that the alarm condition is reported to the user, report it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) * with both voltage sensors.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static SENSOR_DEVICE_ATTR_RO(in1_min_alarm, ltc4261_bool, FAULT_UV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static SENSOR_DEVICE_ATTR_RO(in1_max_alarm, ltc4261_bool, FAULT_OV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static SENSOR_DEVICE_ATTR_RO(in2_min_alarm, ltc4261_bool, FAULT_UV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static SENSOR_DEVICE_ATTR_RO(in2_max_alarm, ltc4261_bool, FAULT_OV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) /* Currents (via sense resistor) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static SENSOR_DEVICE_ATTR_RO(curr1_input, ltc4261_value, LTC4261_SENSE_H);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) /* Overcurrent alarm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static SENSOR_DEVICE_ATTR_RO(curr1_max_alarm, ltc4261_bool, FAULT_OC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static struct attribute *ltc4261_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) &sensor_dev_attr_in1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) &sensor_dev_attr_in1_min_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) &sensor_dev_attr_in1_max_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) &sensor_dev_attr_in2_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) &sensor_dev_attr_in2_min_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) &sensor_dev_attr_in2_max_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) &sensor_dev_attr_curr1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) &sensor_dev_attr_curr1_max_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) ATTRIBUTE_GROUPS(ltc4261);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static int ltc4261_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) struct i2c_adapter *adapter = client->adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) struct ltc4261_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) if (i2c_smbus_read_byte_data(client, LTC4261_STATUS) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) dev_err(dev, "Failed to read status register\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) mutex_init(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) /* Clear faults */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) i2c_smbus_write_byte_data(client, LTC4261_FAULT, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) ltc4261_groups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) return PTR_ERR_OR_ZERO(hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static const struct i2c_device_id ltc4261_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {"ltc4261", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) MODULE_DEVICE_TABLE(i2c, ltc4261_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) /* This is the driver that will be inserted */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) static struct i2c_driver ltc4261_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) .name = "ltc4261",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) .probe_new = ltc4261_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) .id_table = ltc4261_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) module_i2c_driver(ltc4261_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) MODULE_DESCRIPTION("LTC4261 driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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