Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Driver for Linear Technology LTC4245 I2C Multiple Supply Hot Swap Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2008 Ira W. Snyder <iws@ovro.caltech.edu>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * This driver is based on the ds1621 and ina209 drivers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * Datasheet:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * http://www.linear.com/pc/downloadDocument.do?navId=H0,C1,C1003,C1006,C1140,P19392,D13517
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/hwmon-sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/platform_data/ltc4245.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) /* Here are names of the chip's registers (a.k.a. commands) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) enum ltc4245_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	LTC4245_STATUS			= 0x00, /* readonly */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	LTC4245_ALERT			= 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	LTC4245_CONTROL			= 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	LTC4245_ON			= 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	LTC4245_FAULT1			= 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	LTC4245_FAULT2			= 0x05,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	LTC4245_GPIO			= 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	LTC4245_ADCADR			= 0x07,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	LTC4245_12VIN			= 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	LTC4245_12VSENSE		= 0x11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	LTC4245_12VOUT			= 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	LTC4245_5VIN			= 0x13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	LTC4245_5VSENSE			= 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	LTC4245_5VOUT			= 0x15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	LTC4245_3VIN			= 0x16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	LTC4245_3VSENSE			= 0x17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	LTC4245_3VOUT			= 0x18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	LTC4245_VEEIN			= 0x19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	LTC4245_VEESENSE		= 0x1a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	LTC4245_VEEOUT			= 0x1b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	LTC4245_GPIOADC			= 0x1c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) struct ltc4245_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	struct mutex update_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	bool valid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	unsigned long last_updated; /* in jiffies */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	/* Control registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	u8 cregs[0x08];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	/* Voltage registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	u8 vregs[0x0d];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	/* GPIO ADC registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	bool use_extra_gpios;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	int gpios[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70)  * Update the readings from the GPIO pins. If the driver has been configured to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71)  * sample all GPIO's as analog voltages, a round-robin sampling method is used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72)  * Otherwise, only the configured GPIO pin is sampled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74)  * LOCKING: must hold data->update_lock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) static void ltc4245_update_gpios(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	struct ltc4245_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	u8 gpio_curr, gpio_next, gpio_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	/* no extra gpio support, we're basically done */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	if (!data->use_extra_gpios) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		data->gpios[0] = data->vregs[LTC4245_GPIOADC - 0x10];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	 * If the last reading was too long ago, then we mark all old GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	 * readings as stale by setting them to -EAGAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	if (time_after(jiffies, data->last_updated + 5 * HZ)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		for (i = 0; i < ARRAY_SIZE(data->gpios); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 			data->gpios[i] = -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	 * Get the current GPIO pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	 * The datasheet calls these GPIO[1-3], but we'll calculate the zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	 * based array index instead, and call them GPIO[0-2]. This is much
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	 * easier to think about.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	gpio_curr = (data->cregs[LTC4245_GPIO] & 0xc0) >> 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	if (gpio_curr > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		gpio_curr -= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	/* Read the GPIO voltage from the GPIOADC register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	data->gpios[gpio_curr] = data->vregs[LTC4245_GPIOADC - 0x10];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	/* Find the next GPIO pin to read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	gpio_next = (gpio_curr + 1) % ARRAY_SIZE(data->gpios);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	 * Calculate the correct setting for the GPIO register so it will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	 * sample the next GPIO pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	gpio_reg = (data->cregs[LTC4245_GPIO] & 0x3f) | ((gpio_next + 1) << 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	/* Update the GPIO register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	i2c_smbus_write_byte_data(client, LTC4245_GPIO, gpio_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	/* Update saved data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	data->cregs[LTC4245_GPIO] = gpio_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static struct ltc4245_data *ltc4245_update_device(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	struct ltc4245_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	s32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		/* Read control registers -- 0x00 to 0x07 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		for (i = 0; i < ARRAY_SIZE(data->cregs); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 			val = i2c_smbus_read_byte_data(client, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 			if (unlikely(val < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 				data->cregs[i] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 			else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 				data->cregs[i] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		/* Read voltage registers -- 0x10 to 0x1c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		for (i = 0; i < ARRAY_SIZE(data->vregs); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 			val = i2c_smbus_read_byte_data(client, i+0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 			if (unlikely(val < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 				data->vregs[i] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 			else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 				data->vregs[i] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		/* Update GPIO readings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		ltc4245_update_gpios(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		data->last_updated = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		data->valid = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	return data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /* Return the voltage from the given register in millivolts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static int ltc4245_get_voltage(struct device *dev, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	struct ltc4245_data *data = ltc4245_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	const u8 regval = data->vregs[reg - 0x10];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	u32 voltage = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	case LTC4245_12VIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	case LTC4245_12VOUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		voltage = regval * 55;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	case LTC4245_5VIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	case LTC4245_5VOUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		voltage = regval * 22;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	case LTC4245_3VIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	case LTC4245_3VOUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		voltage = regval * 15;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	case LTC4245_VEEIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	case LTC4245_VEEOUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		voltage = regval * -55;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	case LTC4245_GPIOADC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		voltage = regval * 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		/* If we get here, the developer messed up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		WARN_ON_ONCE(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	return voltage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) /* Return the current in the given sense register in milliAmperes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static unsigned int ltc4245_get_current(struct device *dev, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	struct ltc4245_data *data = ltc4245_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	const u8 regval = data->vregs[reg - 0x10];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	unsigned int voltage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	unsigned int curr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	 * The strange looking conversions that follow are fixed-point
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	 * math, since we cannot do floating point in the kernel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	 * Step 1: convert sense register to microVolts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	 * Step 2: convert voltage to milliAmperes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	 * If you play around with the V=IR equation, you come up with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	 * the following: X uV / Y mOhm == Z mA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	 * With the resistors that are fractions of a milliOhm, we multiply
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	 * the voltage and resistance by 10, to shift the decimal point.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	 * Now we can use the normal division operator again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	case LTC4245_12VSENSE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		voltage = regval * 250; /* voltage in uV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		curr = voltage / 50; /* sense resistor 50 mOhm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	case LTC4245_5VSENSE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		voltage = regval * 125; /* voltage in uV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		curr = (voltage * 10) / 35; /* sense resistor 3.5 mOhm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	case LTC4245_3VSENSE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		voltage = regval * 125; /* voltage in uV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		curr = (voltage * 10) / 25; /* sense resistor 2.5 mOhm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	case LTC4245_VEESENSE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		voltage = regval * 250; /* voltage in uV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		curr = voltage / 100; /* sense resistor 100 mOhm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 		/* If we get here, the developer messed up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 		WARN_ON_ONCE(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		curr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	return curr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) /* Map from voltage channel index to voltage register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) static const s8 ltc4245_in_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	LTC4245_12VIN, LTC4245_5VIN, LTC4245_3VIN, LTC4245_VEEIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	LTC4245_12VOUT, LTC4245_5VOUT, LTC4245_3VOUT, LTC4245_VEEOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) /* Map from current channel index to current register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) static const s8 ltc4245_curr_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	LTC4245_12VSENSE, LTC4245_5VSENSE, LTC4245_3VSENSE, LTC4245_VEESENSE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) static int ltc4245_read_curr(struct device *dev, u32 attr, int channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 			     long *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	struct ltc4245_data *data = ltc4245_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	switch (attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	case hwmon_curr_input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 		*val = ltc4245_get_current(dev, ltc4245_curr_regs[channel]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	case hwmon_curr_max_alarm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		*val = !!(data->cregs[LTC4245_FAULT1] & BIT(channel + 4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static int ltc4245_read_in(struct device *dev, u32 attr, int channel, long *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	struct ltc4245_data *data = ltc4245_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	switch (attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	case hwmon_in_input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 		if (channel < 8) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 			*val = ltc4245_get_voltage(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 						ltc4245_in_regs[channel]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 			int regval = data->gpios[channel - 8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 			if (regval < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 				return regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 			*val = regval * 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	case hwmon_in_min_alarm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 		if (channel < 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 			*val = !!(data->cregs[LTC4245_FAULT1] & BIT(channel));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 			*val = !!(data->cregs[LTC4245_FAULT2] &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 				  BIT(channel - 4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 		return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static int ltc4245_read_power(struct device *dev, u32 attr, int channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 			      long *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	unsigned long curr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	long voltage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	switch (attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	case hwmon_power_input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 		(void)ltc4245_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 		curr = ltc4245_get_current(dev, ltc4245_curr_regs[channel]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 		voltage = ltc4245_get_voltage(dev, ltc4245_in_regs[channel]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 		*val = abs(curr * voltage);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 		return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) static int ltc4245_read(struct device *dev, enum hwmon_sensor_types type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 			u32 attr, int channel, long *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	case hwmon_curr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 		return ltc4245_read_curr(dev, attr, channel, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	case hwmon_power:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 		return ltc4245_read_power(dev, attr, channel, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	case hwmon_in:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 		return ltc4245_read_in(dev, attr, channel - 1, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 		return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) static umode_t ltc4245_is_visible(const void *_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 				  enum hwmon_sensor_types type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 				  u32 attr, int channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	const struct ltc4245_data *data = _data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	case hwmon_in:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 		if (channel == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 		switch (attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 		case hwmon_in_input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 			if (channel > 9 && !data->use_extra_gpios)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 				return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 			return 0444;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 		case hwmon_in_min_alarm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 			if (channel > 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 				return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 			return 0444;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	case hwmon_curr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 		switch (attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 		case hwmon_curr_input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 		case hwmon_curr_max_alarm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 			return 0444;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	case hwmon_power:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 		switch (attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 		case hwmon_power_input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 			return 0444;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) static const struct hwmon_channel_info *ltc4245_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	HWMON_CHANNEL_INFO(in,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 			   HWMON_I_INPUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 			   HWMON_I_INPUT | HWMON_I_MIN_ALARM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 			   HWMON_I_INPUT | HWMON_I_MIN_ALARM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 			   HWMON_I_INPUT | HWMON_I_MIN_ALARM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 			   HWMON_I_INPUT | HWMON_I_MIN_ALARM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 			   HWMON_I_INPUT | HWMON_I_MIN_ALARM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 			   HWMON_I_INPUT | HWMON_I_MIN_ALARM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 			   HWMON_I_INPUT | HWMON_I_MIN_ALARM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 			   HWMON_I_INPUT | HWMON_I_MIN_ALARM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 			   HWMON_I_INPUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 			   HWMON_I_INPUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 			   HWMON_I_INPUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	HWMON_CHANNEL_INFO(curr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 			   HWMON_C_INPUT | HWMON_C_MAX_ALARM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 			   HWMON_C_INPUT | HWMON_C_MAX_ALARM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 			   HWMON_C_INPUT | HWMON_C_MAX_ALARM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 			   HWMON_C_INPUT | HWMON_C_MAX_ALARM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	HWMON_CHANNEL_INFO(power,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 			   HWMON_P_INPUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 			   HWMON_P_INPUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 			   HWMON_P_INPUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 			   HWMON_P_INPUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) static const struct hwmon_ops ltc4245_hwmon_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 	.is_visible = ltc4245_is_visible,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 	.read = ltc4245_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) static const struct hwmon_chip_info ltc4245_chip_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 	.ops = &ltc4245_hwmon_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 	.info = ltc4245_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) static bool ltc4245_use_extra_gpios(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 	struct ltc4245_platform_data *pdata = dev_get_platdata(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 	struct device_node *np = client->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 	/* prefer platform data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 	if (pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 		return pdata->use_extra_gpios;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 	/* fallback on OF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 	if (of_find_property(np, "ltc4245,use-extra-gpios", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 		return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 	return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) static int ltc4245_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	struct i2c_adapter *adapter = client->adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 	struct ltc4245_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 	struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 	data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 	if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 	data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 	mutex_init(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 	data->use_extra_gpios = ltc4245_use_extra_gpios(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 	/* Initialize the LTC4245 chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 	i2c_smbus_write_byte_data(client, LTC4245_FAULT1, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 	i2c_smbus_write_byte_data(client, LTC4245_FAULT2, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 	hwmon_dev = devm_hwmon_device_register_with_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 							 client->name, data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 							 &ltc4245_chip_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 							 NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 	return PTR_ERR_OR_ZERO(hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) static const struct i2c_device_id ltc4245_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 	{ "ltc4245", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) MODULE_DEVICE_TABLE(i2c, ltc4245_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) /* This is the driver that will be inserted */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) static struct i2c_driver ltc4245_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 		.name	= "ltc4245",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 	.probe_new	= ltc4245_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 	.id_table	= ltc4245_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) module_i2c_driver(ltc4245_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) MODULE_DESCRIPTION("LTC4245 driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) MODULE_LICENSE("GPL");