Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Driver for Linear Technology LTC4222 Dual Hot Swap controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (c) 2014 Guenter Roeck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/hwmon-sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) /* chip registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define LTC4222_CONTROL1	0xd0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define LTC4222_ALERT1		0xd1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define LTC4222_STATUS1		0xd2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define LTC4222_FAULT1		0xd3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define LTC4222_CONTROL2	0xd4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define LTC4222_ALERT2		0xd5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define LTC4222_STATUS2		0xd6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define LTC4222_FAULT2		0xd7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define LTC4222_SOURCE1		0xd8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define LTC4222_SOURCE2		0xda
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define LTC4222_ADIN1		0xdc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define LTC4222_ADIN2		0xde
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define LTC4222_SENSE1		0xe0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define LTC4222_SENSE2		0xe2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define LTC4222_ADC_CONTROL	0xe4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  * Fault register bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define FAULT_OV	BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define FAULT_UV	BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define FAULT_OC	BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define FAULT_POWER_BAD	BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define FAULT_FET_BAD	BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) /* Return the voltage from the given register in mV or mA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) static int ltc4222_get_value(struct device *dev, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	struct regmap *regmap = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	u8 buf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	ret = regmap_bulk_read(regmap, reg, buf, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	val = ((buf[0] << 8) + buf[1]) >> 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	case LTC4222_ADIN1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	case LTC4222_ADIN2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		/* 1.25 mV resolution. Convert to mV. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		val = DIV_ROUND_CLOSEST(val * 5, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	case LTC4222_SOURCE1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	case LTC4222_SOURCE2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		/* 31.25 mV resolution. Convert to mV. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		val = DIV_ROUND_CLOSEST(val * 125, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	case LTC4222_SENSE1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	case LTC4222_SENSE2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		 * 62.5 uV resolution. Convert to current as measured with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		 * an 1 mOhm sense resistor, in mA. If a different sense
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		 * resistor is installed, calculate the actual current by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		 * dividing the reported current by the sense resistor value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		 * in mOhm.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		val = DIV_ROUND_CLOSEST(val * 125, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) static ssize_t ltc4222_value_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 				  struct device_attribute *da, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	int value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	value = ltc4222_get_value(dev, attr->index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	if (value < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		return value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	return snprintf(buf, PAGE_SIZE, "%d\n", value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static ssize_t ltc4222_bool_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 				 struct device_attribute *da, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	struct regmap *regmap = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	unsigned int fault;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	ret = regmap_read(regmap, attr->nr, &fault);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	fault &= attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	if (fault)		/* Clear reported faults in chip register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		regmap_update_bits(regmap, attr->nr, attr->index, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	return snprintf(buf, PAGE_SIZE, "%d\n", !!fault);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /* Voltages */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static SENSOR_DEVICE_ATTR_RO(in1_input, ltc4222_value, LTC4222_SOURCE1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static SENSOR_DEVICE_ATTR_RO(in2_input, ltc4222_value, LTC4222_ADIN1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static SENSOR_DEVICE_ATTR_RO(in3_input, ltc4222_value, LTC4222_SOURCE2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static SENSOR_DEVICE_ATTR_RO(in4_input, ltc4222_value, LTC4222_ADIN2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)  * Voltage alarms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)  * UV/OV faults are associated with the input voltage, and power bad and fet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)  * faults are associated with the output voltage.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static SENSOR_DEVICE_ATTR_2_RO(in1_min_alarm, ltc4222_bool, LTC4222_FAULT1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 			       FAULT_UV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static SENSOR_DEVICE_ATTR_2_RO(in1_max_alarm, ltc4222_bool, LTC4222_FAULT1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 			       FAULT_OV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static SENSOR_DEVICE_ATTR_2_RO(in2_alarm, ltc4222_bool, LTC4222_FAULT1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 			       FAULT_POWER_BAD | FAULT_FET_BAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static SENSOR_DEVICE_ATTR_2_RO(in3_min_alarm, ltc4222_bool, LTC4222_FAULT2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 			       FAULT_UV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static SENSOR_DEVICE_ATTR_2_RO(in3_max_alarm, ltc4222_bool, LTC4222_FAULT2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 			       FAULT_OV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static SENSOR_DEVICE_ATTR_2_RO(in4_alarm, ltc4222_bool, LTC4222_FAULT2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 			       FAULT_POWER_BAD | FAULT_FET_BAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) /* Current (via sense resistor) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static SENSOR_DEVICE_ATTR_RO(curr1_input, ltc4222_value, LTC4222_SENSE1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static SENSOR_DEVICE_ATTR_RO(curr2_input, ltc4222_value, LTC4222_SENSE2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /* Overcurrent alarm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static SENSOR_DEVICE_ATTR_2_RO(curr1_max_alarm, ltc4222_bool, LTC4222_FAULT1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 			       FAULT_OC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static SENSOR_DEVICE_ATTR_2_RO(curr2_max_alarm, ltc4222_bool, LTC4222_FAULT2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 			       FAULT_OC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static struct attribute *ltc4222_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	&sensor_dev_attr_in1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	&sensor_dev_attr_in1_min_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	&sensor_dev_attr_in1_max_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	&sensor_dev_attr_in2_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	&sensor_dev_attr_in2_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	&sensor_dev_attr_in3_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	&sensor_dev_attr_in3_min_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	&sensor_dev_attr_in3_max_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	&sensor_dev_attr_in4_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	&sensor_dev_attr_in4_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	&sensor_dev_attr_curr1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	&sensor_dev_attr_curr1_max_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	&sensor_dev_attr_curr2_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	&sensor_dev_attr_curr2_max_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) ATTRIBUTE_GROUPS(ltc4222);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static const struct regmap_config ltc4222_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	.reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	.val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	.max_register = LTC4222_ADC_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static int ltc4222_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	regmap = devm_regmap_init_i2c(client, &ltc4222_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	if (IS_ERR(regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		dev_err(dev, "failed to allocate register map\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		return PTR_ERR(regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	/* Clear faults */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	regmap_write(regmap, LTC4222_FAULT1, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	regmap_write(regmap, LTC4222_FAULT2, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 							   regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 							   ltc4222_groups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	return PTR_ERR_OR_ZERO(hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) static const struct i2c_device_id ltc4222_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	{"ltc4222", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) MODULE_DEVICE_TABLE(i2c, ltc4222_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static struct i2c_driver ltc4222_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		   .name = "ltc4222",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		   },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	.probe_new = ltc4222_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	.id_table = ltc4222_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) module_i2c_driver(ltc4222_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) MODULE_DESCRIPTION("LTC4222 driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) MODULE_LICENSE("GPL");