^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * lm93.c - Part of lm_sensors, Linux kernel modules for hardware monitoring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author/Maintainer: Mark M. Hoffman <mhoffman@lightlink.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (c) 2004 Utilitek Systems, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * derived in part from lm78.c:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (c) 1998, 1999 Frodo Looijaard <frodol@dds.nl>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * derived in part from lm85.c:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Copyright (c) 2002, 2003 Philip Pokorny <ppokorny@penguincomputing.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Copyright (c) 2003 Margit Schubert-While <margitsw@t-online.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * derived in part from w83l785ts.c:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * Copyright (c) 2003-2004 Jean Delvare <jdelvare@suse.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * Ported to Linux 2.6 by Eric J. Bowersox <ericb@aspsys.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * Copyright (c) 2005 Aspen Systems, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * Adapted to 2.6.20 by Carsten Emde <cbe@osadl.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * Copyright (c) 2006 Carsten Emde, Open Source Automation Development Lab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * Modified for mainline integration by Hans J. Koch <hjk@hansjkoch.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * Copyright (c) 2007 Hans J. Koch, Linutronix GmbH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/hwmon-sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/hwmon-vid.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /* LM93 REGISTER ADDRESSES */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* miscellaneous */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define LM93_REG_MFR_ID 0x3e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define LM93_REG_VER 0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define LM93_REG_STATUS_CONTROL 0xe2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define LM93_REG_CONFIG 0xe3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define LM93_REG_SLEEP_CONTROL 0xe4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /* alarm values start here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define LM93_REG_HOST_ERROR_1 0x48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /* voltage inputs: in1-in16 (nr => 0-15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define LM93_REG_IN(nr) (0x56 + (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define LM93_REG_IN_MIN(nr) (0x90 + (nr) * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define LM93_REG_IN_MAX(nr) (0x91 + (nr) * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /* temperature inputs: temp1-temp4 (nr => 0-3) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define LM93_REG_TEMP(nr) (0x50 + (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define LM93_REG_TEMP_MIN(nr) (0x78 + (nr) * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define LM93_REG_TEMP_MAX(nr) (0x79 + (nr) * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* temp[1-4]_auto_boost (nr => 0-3) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define LM93_REG_BOOST(nr) (0x80 + (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* #PROCHOT inputs: prochot1-prochot2 (nr => 0-1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define LM93_REG_PROCHOT_CUR(nr) (0x67 + (nr) * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define LM93_REG_PROCHOT_AVG(nr) (0x68 + (nr) * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define LM93_REG_PROCHOT_MAX(nr) (0xb0 + (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /* fan tach inputs: fan1-fan4 (nr => 0-3) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define LM93_REG_FAN(nr) (0x6e + (nr) * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define LM93_REG_FAN_MIN(nr) (0xb4 + (nr) * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* pwm outputs: pwm1-pwm2 (nr => 0-1, reg => 0-3) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define LM93_REG_PWM_CTL(nr, reg) (0xc8 + (reg) + (nr) * 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define LM93_PWM_CTL1 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define LM93_PWM_CTL2 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define LM93_PWM_CTL3 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define LM93_PWM_CTL4 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* GPIO input state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define LM93_REG_GPI 0x6b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* vid inputs: vid1-vid2 (nr => 0-1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define LM93_REG_VID(nr) (0x6c + (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /* vccp1 & vccp2: VID relative inputs (nr => 0-1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define LM93_REG_VCCP_LIMIT_OFF(nr) (0xb2 + (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* temp[1-4]_auto_boost_hyst */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define LM93_REG_BOOST_HYST_12 0xc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define LM93_REG_BOOST_HYST_34 0xc1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define LM93_REG_BOOST_HYST(nr) (0xc0 + (nr)/2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /* temp[1-4]_auto_pwm_[min|hyst] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define LM93_REG_PWM_MIN_HYST_12 0xc3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define LM93_REG_PWM_MIN_HYST_34 0xc4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define LM93_REG_PWM_MIN_HYST(nr) (0xc3 + (nr)/2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) /* prochot_override & prochot_interval */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define LM93_REG_PROCHOT_OVERRIDE 0xc6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define LM93_REG_PROCHOT_INTERVAL 0xc7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /* temp[1-4]_auto_base (nr => 0-3) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define LM93_REG_TEMP_BASE(nr) (0xd0 + (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /* temp[1-4]_auto_offsets (step => 0-11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define LM93_REG_TEMP_OFFSET(step) (0xd4 + (step))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* #PROCHOT & #VRDHOT PWM ramp control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define LM93_REG_PWM_RAMP_CTL 0xbf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /* miscellaneous */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define LM93_REG_SFC1 0xbc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define LM93_REG_SFC2 0xbd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define LM93_REG_GPI_VID_CTL 0xbe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define LM93_REG_SF_TACH_TO_PWM 0xe0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /* error masks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define LM93_REG_GPI_ERR_MASK 0xec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define LM93_REG_MISC_ERR_MASK 0xed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) /* LM93 REGISTER VALUES */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define LM93_MFR_ID 0x73
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define LM93_MFR_ID_PROTOTYPE 0x72
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) /* LM94 REGISTER VALUES */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define LM94_MFR_ID_2 0x7a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define LM94_MFR_ID 0x79
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define LM94_MFR_ID_PROTOTYPE 0x78
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) /* SMBus capabilities */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define LM93_SMBUS_FUNC_FULL (I2C_FUNC_SMBUS_BYTE_DATA | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_BLOCK_DATA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define LM93_SMBUS_FUNC_MIN (I2C_FUNC_SMBUS_BYTE_DATA | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) I2C_FUNC_SMBUS_WORD_DATA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) /* Addresses to scan */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, I2C_CLIENT_END };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) /* Insmod parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static bool disable_block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) module_param(disable_block, bool, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) MODULE_PARM_DESC(disable_block,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) "Set to non-zero to disable SMBus block data transactions.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static bool init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) module_param(init, bool, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) MODULE_PARM_DESC(init, "Set to non-zero to force chip initialization.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static int vccp_limit_type[2] = {0, 0};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) module_param_array(vccp_limit_type, int, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) MODULE_PARM_DESC(vccp_limit_type, "Configures in7 and in8 limit modes.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static int vid_agtl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) module_param(vid_agtl, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) MODULE_PARM_DESC(vid_agtl, "Configures VID pin input thresholds.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) /* Driver data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static struct i2c_driver lm93_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /* LM93 BLOCK READ COMMANDS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static const struct { u8 cmd; u8 len; } lm93_block_read_cmds[12] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) { 0xf2, 8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) { 0xf3, 8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) { 0xf4, 6 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) { 0xf5, 16 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) { 0xf6, 4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) { 0xf7, 8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) { 0xf8, 12 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) { 0xf9, 32 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) { 0xfa, 8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) { 0xfb, 8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) { 0xfc, 16 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) { 0xfd, 9 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) * ALARMS: SYSCTL format described further below
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) * REG: 64 bits in 8 registers, as immediately below
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) struct block1_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) u8 host_status_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) u8 host_status_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) u8 host_status_3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) u8 host_status_4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) u8 p1_prochot_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) u8 p2_prochot_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) u8 gpi_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) u8 fan_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) * Client-specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) struct lm93_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) struct mutex update_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) unsigned long last_updated; /* In jiffies */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /* client update function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) void (*update)(struct lm93_data *, struct i2c_client *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) char valid; /* !=0 if following fields are valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) /* register values, arranged by block read groups */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) struct block1_t block1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) * temp1 - temp4: unfiltered readings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * temp1 - temp2: filtered readings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) u8 block2[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /* vin1 - vin16: readings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) u8 block3[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) /* prochot1 - prochot2: readings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) u8 cur;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) u8 avg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) } block4[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) /* fan counts 1-4 => 14-bits, LE, *left* justified */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) u16 block5[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) /* block6 has a lot of data we don't need */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) u8 min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) u8 max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) } temp_lim[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) /* vin1 - vin16: low and high limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) u8 min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) u8 max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) } block7[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) /* fan count limits 1-4 => same format as block5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) u16 block8[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) /* pwm control registers (2 pwms, 4 regs) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) u8 block9[2][4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) /* auto/pwm base temp and offset temp registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) u8 base[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) u8 offset[12];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) } block10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) /* master config register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) u8 config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) /* VID1 & VID2 => register format, 6-bits, right justified */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) u8 vid[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) /* prochot1 - prochot2: limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) u8 prochot_max[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) /* vccp1 & vccp2 (in7 & in8): VID relative limits (register format) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) u8 vccp_limits[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) /* GPIO input state (register format, i.e. inverted) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) u8 gpi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) /* #PROCHOT override (register format) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) u8 prochot_override;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) /* #PROCHOT intervals (register format) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) u8 prochot_interval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) /* Fan Boost Temperatures (register format) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) u8 boost[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) /* Fan Boost Hysteresis (register format) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) u8 boost_hyst[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) /* Temperature Zone Min. PWM & Hysteresis (register format) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) u8 auto_pwm_min_hyst[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) /* #PROCHOT & #VRDHOT PWM Ramp Control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) u8 pwm_ramp_ctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) /* miscellaneous setup regs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) u8 sfc1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) u8 sfc2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) u8 sf_tach_to_pwm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) * The two PWM CTL2 registers can read something other than what was
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) * last written for the OVR_DC field (duty cycle override). So, we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) * save the user-commanded value here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) u8 pwm_override[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) * VID: mV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) * REG: 6-bits, right justified, *always* using Intel VRM/VRD 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) static int LM93_VID_FROM_REG(u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) return vid_from_reg((reg & 0x3f), 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) /* min, max, and nominal register values, per channel (u8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) static const u8 lm93_vin_reg_min[16] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xae,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) static const u8 lm93_vin_reg_max[16] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 0xff, 0xfa, 0xff, 0xff, 0xff, 0xff, 0xff, 0xd1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) * Values from the datasheet. They're here for documentation only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) * static const u8 lm93_vin_reg_nom[16] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) * 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0xc0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) * 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0x40, 0xc0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) * };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) /* min, max, and nominal voltage readings, per channel (mV)*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) static const unsigned long lm93_vin_val_min[16] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 0, 0, 0, 0, 0, 0, 0, 3000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) static const unsigned long lm93_vin_val_max[16] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 1236, 1236, 1236, 1600, 2000, 2000, 1600, 1600,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 4400, 6500, 3333, 2625, 1312, 1312, 1236, 3600,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) * Values from the datasheet. They're here for documentation only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) * static const unsigned long lm93_vin_val_nom[16] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) * 927, 927, 927, 1200, 1500, 1500, 1200, 1200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) * 3300, 5000, 2500, 1969, 984, 984, 309, 3300,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) * };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) static unsigned LM93_IN_FROM_REG(int nr, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) const long uv_max = lm93_vin_val_max[nr] * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) const long uv_min = lm93_vin_val_min[nr] * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) const long slope = (uv_max - uv_min) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) (lm93_vin_reg_max[nr] - lm93_vin_reg_min[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) const long intercept = uv_min - slope * lm93_vin_reg_min[nr];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) return (slope * reg + intercept + 500) / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) * IN: mV, limits determined by channel nr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) * REG: scaling determined by channel nr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static u8 LM93_IN_TO_REG(int nr, unsigned val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) /* range limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) const long mv = clamp_val(val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) lm93_vin_val_min[nr], lm93_vin_val_max[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) /* try not to lose too much precision here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) const long uv = mv * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) const long uv_max = lm93_vin_val_max[nr] * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) const long uv_min = lm93_vin_val_min[nr] * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) /* convert */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) const long slope = (uv_max - uv_min) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) (lm93_vin_reg_max[nr] - lm93_vin_reg_min[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) const long intercept = uv_min - slope * lm93_vin_reg_min[nr];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) u8 result = ((uv - intercept + (slope/2)) / slope);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) result = clamp_val(result,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) lm93_vin_reg_min[nr], lm93_vin_reg_max[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) /* vid in mV, upper == 0 indicates low limit, otherwise upper limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) static unsigned LM93_IN_REL_FROM_REG(u8 reg, int upper, int vid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) const long uv_offset = upper ? (((reg >> 4 & 0x0f) + 1) * 12500) :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) (((reg >> 0 & 0x0f) + 1) * -25000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) const long uv_vid = vid * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) return (uv_vid + uv_offset + 5000) / 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) #define LM93_IN_MIN_FROM_REG(reg, vid) LM93_IN_REL_FROM_REG((reg), 0, (vid))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) #define LM93_IN_MAX_FROM_REG(reg, vid) LM93_IN_REL_FROM_REG((reg), 1, (vid))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) * vid in mV , upper == 0 indicates low limit, otherwise upper limit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) * upper also determines which nibble of the register is returned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) * (the other nibble will be 0x0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) static u8 LM93_IN_REL_TO_REG(unsigned val, int upper, int vid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) long uv_offset = vid * 1000 - val * 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) if (upper) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) uv_offset = clamp_val(uv_offset, 12500, 200000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) return (u8)((uv_offset / 12500 - 1) << 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) uv_offset = clamp_val(uv_offset, -400000, -25000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) return (u8)((uv_offset / -25000 - 1) << 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) * TEMP: 1/1000 degrees C (-128C to +127C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) * REG: 1C/bit, two's complement
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) static int LM93_TEMP_FROM_REG(u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) return (s8)reg * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) #define LM93_TEMP_MIN (-128000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) #define LM93_TEMP_MAX (127000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) * TEMP: 1/1000 degrees C (-128C to +127C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) * REG: 1C/bit, two's complement
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) static u8 LM93_TEMP_TO_REG(long temp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) int ntemp = clamp_val(temp, LM93_TEMP_MIN, LM93_TEMP_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) ntemp += (ntemp < 0 ? -500 : 500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) return (u8)(ntemp / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) /* Determine 4-bit temperature offset resolution */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) static int LM93_TEMP_OFFSET_MODE_FROM_REG(u8 sfc2, int nr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) /* mode: 0 => 1C/bit, nonzero => 0.5C/bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) return sfc2 & (nr < 2 ? 0x10 : 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) * This function is common to all 4-bit temperature offsets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) * reg is 4 bits right justified
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) * mode 0 => 1C/bit, mode !0 => 0.5C/bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) static int LM93_TEMP_OFFSET_FROM_REG(u8 reg, int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) return (reg & 0x0f) * (mode ? 5 : 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) #define LM93_TEMP_OFFSET_MIN (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) #define LM93_TEMP_OFFSET_MAX0 (150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) #define LM93_TEMP_OFFSET_MAX1 (75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) * This function is common to all 4-bit temperature offsets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) * returns 4 bits right justified
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) * mode 0 => 1C/bit, mode !0 => 0.5C/bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) static u8 LM93_TEMP_OFFSET_TO_REG(int off, int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) int factor = mode ? 5 : 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) off = clamp_val(off, LM93_TEMP_OFFSET_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) mode ? LM93_TEMP_OFFSET_MAX1 : LM93_TEMP_OFFSET_MAX0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) return (u8)((off + factor/2) / factor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) /* 0 <= nr <= 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) static int LM93_TEMP_AUTO_OFFSET_FROM_REG(u8 reg, int nr, int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) /* temp1-temp2 (nr=0,1) use lower nibble */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) if (nr < 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) return LM93_TEMP_OFFSET_FROM_REG(reg & 0x0f, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) /* temp3-temp4 (nr=2,3) use upper nibble */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) return LM93_TEMP_OFFSET_FROM_REG(reg >> 4 & 0x0f, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) * TEMP: 1/10 degrees C (0C to +15C (mode 0) or +7.5C (mode non-zero))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) * REG: 1.0C/bit (mode 0) or 0.5C/bit (mode non-zero)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) * 0 <= nr <= 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) static u8 LM93_TEMP_AUTO_OFFSET_TO_REG(u8 old, int off, int nr, int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) u8 new = LM93_TEMP_OFFSET_TO_REG(off, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) /* temp1-temp2 (nr=0,1) use lower nibble */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) if (nr < 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) return (old & 0xf0) | (new & 0x0f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) /* temp3-temp4 (nr=2,3) use upper nibble */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) return (new << 4 & 0xf0) | (old & 0x0f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) static int LM93_AUTO_BOOST_HYST_FROM_REGS(struct lm93_data *data, int nr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) switch (nr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) reg = data->boost_hyst[0] & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) reg = data->boost_hyst[0] >> 4 & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) reg = data->boost_hyst[1] & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) reg = data->boost_hyst[1] >> 4 & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) return LM93_TEMP_FROM_REG(data->boost[nr]) -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) LM93_TEMP_OFFSET_FROM_REG(reg, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) static u8 LM93_AUTO_BOOST_HYST_TO_REG(struct lm93_data *data, long hyst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) int nr, int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) u8 reg = LM93_TEMP_OFFSET_TO_REG(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) (LM93_TEMP_FROM_REG(data->boost[nr]) - hyst), mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) switch (nr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) reg = (data->boost_hyst[0] & 0xf0) | (reg & 0x0f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) reg = (reg << 4 & 0xf0) | (data->boost_hyst[0] & 0x0f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) reg = (data->boost_hyst[1] & 0xf0) | (reg & 0x0f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) reg = (reg << 4 & 0xf0) | (data->boost_hyst[1] & 0x0f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) return reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) * PWM: 0-255 per sensors documentation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) * REG: 0-13 as mapped below... right justified
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) enum pwm_freq { LM93_PWM_MAP_HI_FREQ, LM93_PWM_MAP_LO_FREQ };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) static int lm93_pwm_map[2][16] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) 0x00, /* 0.00% */ 0x40, /* 25.00% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) 0x50, /* 31.25% */ 0x60, /* 37.50% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) 0x70, /* 43.75% */ 0x80, /* 50.00% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) 0x90, /* 56.25% */ 0xa0, /* 62.50% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) 0xb0, /* 68.75% */ 0xc0, /* 75.00% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) 0xd0, /* 81.25% */ 0xe0, /* 87.50% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) 0xf0, /* 93.75% */ 0xff, /* 100.00% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 0xff, 0xff, /* 14, 15 are reserved and should never occur */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) 0x00, /* 0.00% */ 0x40, /* 25.00% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) 0x49, /* 28.57% */ 0x52, /* 32.14% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) 0x5b, /* 35.71% */ 0x64, /* 39.29% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) 0x6d, /* 42.86% */ 0x76, /* 46.43% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) 0x80, /* 50.00% */ 0x89, /* 53.57% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) 0x92, /* 57.14% */ 0xb6, /* 71.43% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) 0xdb, /* 85.71% */ 0xff, /* 100.00% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) 0xff, 0xff, /* 14, 15 are reserved and should never occur */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) static int LM93_PWM_FROM_REG(u8 reg, enum pwm_freq freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) return lm93_pwm_map[freq][reg & 0x0f];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) /* round up to nearest match */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) static u8 LM93_PWM_TO_REG(int pwm, enum pwm_freq freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) for (i = 0; i < 13; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) if (pwm <= lm93_pwm_map[freq][i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) /* can fall through with i==13 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) return (u8)i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) static int LM93_FAN_FROM_REG(u16 regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) const u16 count = le16_to_cpu(regs) >> 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) return count == 0 ? -1 : count == 0x3fff ? 0 : 1350000 / count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) * RPM: (82.5 to 1350000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) * REG: 14-bits, LE, *left* justified
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) static u16 LM93_FAN_TO_REG(long rpm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) u16 count, regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) if (rpm == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) count = 0x3fff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) rpm = clamp_val(rpm, 1, 1000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) count = clamp_val((1350000 + rpm) / rpm, 1, 0x3ffe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) regs = count << 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) return cpu_to_le16(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) * PWM FREQ: HZ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) * REG: 0-7 as mapped below
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) static int lm93_pwm_freq_map[8] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) 22500, 96, 84, 72, 60, 48, 36, 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) static int LM93_PWM_FREQ_FROM_REG(u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) return lm93_pwm_freq_map[reg & 0x07];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) /* round up to nearest match */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) static u8 LM93_PWM_FREQ_TO_REG(int freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) for (i = 7; i > 0; i--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) if (freq <= lm93_pwm_freq_map[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) /* can fall through with i==0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) return (u8)i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) * TIME: 1/100 seconds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) * REG: 0-7 as mapped below
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) static int lm93_spinup_time_map[8] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) 0, 10, 25, 40, 70, 100, 200, 400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) static int LM93_SPINUP_TIME_FROM_REG(u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) return lm93_spinup_time_map[reg >> 5 & 0x07];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) /* round up to nearest match */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) static u8 LM93_SPINUP_TIME_TO_REG(int time)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) for (i = 0; i < 7; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) if (time <= lm93_spinup_time_map[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) /* can fall through with i==8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) return (u8)i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) #define LM93_RAMP_MIN 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) #define LM93_RAMP_MAX 75
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) static int LM93_RAMP_FROM_REG(u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) return (reg & 0x0f) * 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) * RAMP: 1/100 seconds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) * REG: 50mS/bit 4-bits right justified
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) static u8 LM93_RAMP_TO_REG(int ramp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) ramp = clamp_val(ramp, LM93_RAMP_MIN, LM93_RAMP_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) return (u8)((ramp + 2) / 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) * PROCHOT: 0-255, 0 => 0%, 255 => > 96.6%
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) * REG: (same)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) static u8 LM93_PROCHOT_TO_REG(long prochot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) prochot = clamp_val(prochot, 0, 255);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) return (u8)prochot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) * PROCHOT-INTERVAL: 73 - 37200 (1/100 seconds)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) * REG: 0-9 as mapped below
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) static int lm93_interval_map[10] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) 73, 146, 290, 580, 1170, 2330, 4660, 9320, 18600, 37200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) static int LM93_INTERVAL_FROM_REG(u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) return lm93_interval_map[reg & 0x0f];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) /* round up to nearest match */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) static u8 LM93_INTERVAL_TO_REG(long interval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) for (i = 0; i < 9; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) if (interval <= lm93_interval_map[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) /* can fall through with i==9 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) return (u8)i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) * GPIO: 0-255, GPIO0 is LSB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) * REG: inverted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) static unsigned LM93_GPI_FROM_REG(u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) return ~reg & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) * alarm bitmask definitions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) * The LM93 has nearly 64 bits of error status... I've pared that down to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) * what I think is a useful subset in order to fit it into 32 bits.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) * Especially note that the #VRD_HOT alarms are missing because we provide
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) * that information as values in another sysfs file.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) * If libsensors is extended to support 64 bit values, this could be revisited.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) #define LM93_ALARM_IN1 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) #define LM93_ALARM_IN2 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) #define LM93_ALARM_IN3 0x00000004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) #define LM93_ALARM_IN4 0x00000008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) #define LM93_ALARM_IN5 0x00000010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) #define LM93_ALARM_IN6 0x00000020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) #define LM93_ALARM_IN7 0x00000040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) #define LM93_ALARM_IN8 0x00000080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) #define LM93_ALARM_IN9 0x00000100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) #define LM93_ALARM_IN10 0x00000200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) #define LM93_ALARM_IN11 0x00000400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) #define LM93_ALARM_IN12 0x00000800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) #define LM93_ALARM_IN13 0x00001000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) #define LM93_ALARM_IN14 0x00002000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) #define LM93_ALARM_IN15 0x00004000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) #define LM93_ALARM_IN16 0x00008000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) #define LM93_ALARM_FAN1 0x00010000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) #define LM93_ALARM_FAN2 0x00020000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) #define LM93_ALARM_FAN3 0x00040000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) #define LM93_ALARM_FAN4 0x00080000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) #define LM93_ALARM_PH1_ERR 0x00100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) #define LM93_ALARM_PH2_ERR 0x00200000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) #define LM93_ALARM_SCSI1_ERR 0x00400000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) #define LM93_ALARM_SCSI2_ERR 0x00800000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) #define LM93_ALARM_DVDDP1_ERR 0x01000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) #define LM93_ALARM_DVDDP2_ERR 0x02000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) #define LM93_ALARM_D1_ERR 0x04000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) #define LM93_ALARM_D2_ERR 0x08000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) #define LM93_ALARM_TEMP1 0x10000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) #define LM93_ALARM_TEMP2 0x20000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) #define LM93_ALARM_TEMP3 0x40000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) static unsigned LM93_ALARMS_FROM_REG(struct block1_t b1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) unsigned result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) result = b1.host_status_2 & 0x3f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) if (vccp_limit_type[0])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) result |= (b1.host_status_4 & 0x10) << 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) result |= b1.host_status_2 & 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) if (vccp_limit_type[1])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) result |= (b1.host_status_4 & 0x20) << 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) result |= b1.host_status_2 & 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) result |= b1.host_status_3 << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) result |= (b1.fan_status & 0x0f) << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) result |= (b1.p1_prochot_status & 0x80) << 13;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) result |= (b1.p2_prochot_status & 0x80) << 14;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) result |= (b1.host_status_4 & 0xfc) << 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) result |= (b1.host_status_1 & 0x07) << 28;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) #define MAX_RETRIES 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) static u8 lm93_read_byte(struct i2c_client *client, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) int value, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) /* retry in case of read errors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) for (i = 1; i <= MAX_RETRIES; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) value = i2c_smbus_read_byte_data(client, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) if (value >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) return value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) dev_warn(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) "lm93: read byte data failed, address 0x%02x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) mdelay(i + 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) /* <TODO> what to return in case of error? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) dev_err(&client->dev, "lm93: All read byte retries failed!!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) static int lm93_write_byte(struct i2c_client *client, u8 reg, u8 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) int result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) /* <TODO> how to handle write errors? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) result = i2c_smbus_write_byte_data(client, reg, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) if (result < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) dev_warn(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) "lm93: write byte data failed, 0x%02x at address 0x%02x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) value, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) static u16 lm93_read_word(struct i2c_client *client, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) int value, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) /* retry in case of read errors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) for (i = 1; i <= MAX_RETRIES; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) value = i2c_smbus_read_word_data(client, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) if (value >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) return value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) dev_warn(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) "lm93: read word data failed, address 0x%02x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) mdelay(i + 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) /* <TODO> what to return in case of error? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) dev_err(&client->dev, "lm93: All read word retries failed!!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) static int lm93_write_word(struct i2c_client *client, u8 reg, u16 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) int result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) /* <TODO> how to handle write errors? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) result = i2c_smbus_write_word_data(client, reg, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) if (result < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) dev_warn(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) "lm93: write word data failed, 0x%04x at address 0x%02x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) value, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) static u8 lm93_block_buffer[I2C_SMBUS_BLOCK_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) * read block data into values, retry if not expected length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) * fbn => index to lm93_block_read_cmds table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) * (Fixed Block Number - section 14.5.2 of LM93 datasheet)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) static void lm93_read_block(struct i2c_client *client, u8 fbn, u8 *values)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) int i, result = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) for (i = 1; i <= MAX_RETRIES; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) result = i2c_smbus_read_block_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) lm93_block_read_cmds[fbn].cmd, lm93_block_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) if (result == lm93_block_read_cmds[fbn].len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) dev_warn(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) "lm93: block read data failed, command 0x%02x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) lm93_block_read_cmds[fbn].cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) mdelay(i + 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) if (result == lm93_block_read_cmds[fbn].len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) memcpy(values, lm93_block_buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) lm93_block_read_cmds[fbn].len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) /* <TODO> what to do in case of error? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) static struct lm93_data *lm93_update_device(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) const unsigned long interval = HZ + (HZ / 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) if (time_after(jiffies, data->last_updated + interval) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) !data->valid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) data->update(data, client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) data->last_updated = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) data->valid = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) return data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) /* update routine for data that has no corresponding SMBus block command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) static void lm93_update_client_common(struct lm93_data *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) u8 *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) /* temp1 - temp4: limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) for (i = 0; i < 4; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) data->temp_lim[i].min =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) lm93_read_byte(client, LM93_REG_TEMP_MIN(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) data->temp_lim[i].max =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) lm93_read_byte(client, LM93_REG_TEMP_MAX(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) /* config register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) data->config = lm93_read_byte(client, LM93_REG_CONFIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) /* vid1 - vid2: values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) for (i = 0; i < 2; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) data->vid[i] = lm93_read_byte(client, LM93_REG_VID(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) /* prochot1 - prochot2: limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) for (i = 0; i < 2; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) data->prochot_max[i] = lm93_read_byte(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) LM93_REG_PROCHOT_MAX(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) /* vccp1 - vccp2: VID relative limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) for (i = 0; i < 2; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) data->vccp_limits[i] = lm93_read_byte(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) LM93_REG_VCCP_LIMIT_OFF(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) /* GPIO input state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) data->gpi = lm93_read_byte(client, LM93_REG_GPI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) /* #PROCHOT override state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) data->prochot_override = lm93_read_byte(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) LM93_REG_PROCHOT_OVERRIDE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) /* #PROCHOT intervals */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) data->prochot_interval = lm93_read_byte(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) LM93_REG_PROCHOT_INTERVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) /* Fan Boost Temperature registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) for (i = 0; i < 4; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) data->boost[i] = lm93_read_byte(client, LM93_REG_BOOST(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) /* Fan Boost Temperature Hyst. registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) data->boost_hyst[0] = lm93_read_byte(client, LM93_REG_BOOST_HYST_12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) data->boost_hyst[1] = lm93_read_byte(client, LM93_REG_BOOST_HYST_34);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) /* Temperature Zone Min. PWM & Hysteresis registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) data->auto_pwm_min_hyst[0] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) lm93_read_byte(client, LM93_REG_PWM_MIN_HYST_12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) data->auto_pwm_min_hyst[1] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) lm93_read_byte(client, LM93_REG_PWM_MIN_HYST_34);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) /* #PROCHOT & #VRDHOT PWM Ramp Control register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) data->pwm_ramp_ctl = lm93_read_byte(client, LM93_REG_PWM_RAMP_CTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) /* misc setup registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) data->sfc1 = lm93_read_byte(client, LM93_REG_SFC1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) data->sfc2 = lm93_read_byte(client, LM93_REG_SFC2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) data->sf_tach_to_pwm = lm93_read_byte(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) LM93_REG_SF_TACH_TO_PWM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) /* write back alarm values to clear */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) for (i = 0, ptr = (u8 *)(&data->block1); i < 8; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) lm93_write_byte(client, LM93_REG_HOST_ERROR_1 + i, *(ptr + i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) /* update routine which uses SMBus block data commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) static void lm93_update_client_full(struct lm93_data *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) dev_dbg(&client->dev, "starting device update (block data enabled)\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) /* in1 - in16: values & limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) lm93_read_block(client, 3, (u8 *)(data->block3));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) lm93_read_block(client, 7, (u8 *)(data->block7));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) /* temp1 - temp4: values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) lm93_read_block(client, 2, (u8 *)(data->block2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) /* prochot1 - prochot2: values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) lm93_read_block(client, 4, (u8 *)(data->block4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) /* fan1 - fan4: values & limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) lm93_read_block(client, 5, (u8 *)(data->block5));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) lm93_read_block(client, 8, (u8 *)(data->block8));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) /* pmw control registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) lm93_read_block(client, 9, (u8 *)(data->block9));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) /* alarm values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) lm93_read_block(client, 1, (u8 *)(&data->block1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) /* auto/pwm registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) lm93_read_block(client, 10, (u8 *)(&data->block10));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) lm93_update_client_common(data, client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) /* update routine which uses SMBus byte/word data commands only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) static void lm93_update_client_min(struct lm93_data *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) int i, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) u8 *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) dev_dbg(&client->dev, "starting device update (block data disabled)\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) /* in1 - in16: values & limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) for (i = 0; i < 16; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) data->block3[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) lm93_read_byte(client, LM93_REG_IN(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) data->block7[i].min =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) lm93_read_byte(client, LM93_REG_IN_MIN(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) data->block7[i].max =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) lm93_read_byte(client, LM93_REG_IN_MAX(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) /* temp1 - temp4: values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) for (i = 0; i < 4; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) data->block2[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) lm93_read_byte(client, LM93_REG_TEMP(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) /* prochot1 - prochot2: values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) for (i = 0; i < 2; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) data->block4[i].cur =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) lm93_read_byte(client, LM93_REG_PROCHOT_CUR(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) data->block4[i].avg =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) lm93_read_byte(client, LM93_REG_PROCHOT_AVG(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) /* fan1 - fan4: values & limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) for (i = 0; i < 4; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) data->block5[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) lm93_read_word(client, LM93_REG_FAN(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) data->block8[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) lm93_read_word(client, LM93_REG_FAN_MIN(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) /* pwm control registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) for (i = 0; i < 2; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) for (j = 0; j < 4; j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) data->block9[i][j] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) lm93_read_byte(client, LM93_REG_PWM_CTL(i, j));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) /* alarm values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) for (i = 0, ptr = (u8 *)(&data->block1); i < 8; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) *(ptr + i) =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) lm93_read_byte(client, LM93_REG_HOST_ERROR_1 + i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) /* auto/pwm (base temp) registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) for (i = 0; i < 4; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) data->block10.base[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) lm93_read_byte(client, LM93_REG_TEMP_BASE(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) /* auto/pwm (offset temp) registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) for (i = 0; i < 12; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) data->block10.offset[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) lm93_read_byte(client, LM93_REG_TEMP_OFFSET(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) lm93_update_client_common(data, client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) /* following are the sysfs callback functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) static ssize_t in_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) return sprintf(buf, "%d\n", LM93_IN_FROM_REG(nr, data->block3[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) static SENSOR_DEVICE_ATTR_RO(in1_input, in, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) static SENSOR_DEVICE_ATTR_RO(in2_input, in, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) static SENSOR_DEVICE_ATTR_RO(in3_input, in, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) static SENSOR_DEVICE_ATTR_RO(in4_input, in, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) static SENSOR_DEVICE_ATTR_RO(in5_input, in, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) static SENSOR_DEVICE_ATTR_RO(in6_input, in, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) static SENSOR_DEVICE_ATTR_RO(in7_input, in, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) static SENSOR_DEVICE_ATTR_RO(in8_input, in, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) static SENSOR_DEVICE_ATTR_RO(in9_input, in, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) static SENSOR_DEVICE_ATTR_RO(in10_input, in, 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) static SENSOR_DEVICE_ATTR_RO(in11_input, in, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) static SENSOR_DEVICE_ATTR_RO(in12_input, in, 11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) static SENSOR_DEVICE_ATTR_RO(in13_input, in, 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) static SENSOR_DEVICE_ATTR_RO(in14_input, in, 13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) static SENSOR_DEVICE_ATTR_RO(in15_input, in, 14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) static SENSOR_DEVICE_ATTR_RO(in16_input, in, 15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) static ssize_t in_min_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) int vccp = nr - 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) long rc, vid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) if ((nr == 6 || nr == 7) && vccp_limit_type[vccp]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) vid = LM93_VID_FROM_REG(data->vid[vccp]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) rc = LM93_IN_MIN_FROM_REG(data->vccp_limits[vccp], vid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) rc = LM93_IN_FROM_REG(nr, data->block7[nr].min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) return sprintf(buf, "%ld\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) static ssize_t in_min_store(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) int vccp = nr - 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) long vid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) if ((nr == 6 || nr == 7) && vccp_limit_type[vccp]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) vid = LM93_VID_FROM_REG(data->vid[vccp]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) data->vccp_limits[vccp] = (data->vccp_limits[vccp] & 0xf0) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) LM93_IN_REL_TO_REG(val, 0, vid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) lm93_write_byte(client, LM93_REG_VCCP_LIMIT_OFF(vccp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) data->vccp_limits[vccp]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) data->block7[nr].min = LM93_IN_TO_REG(nr, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) lm93_write_byte(client, LM93_REG_IN_MIN(nr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) data->block7[nr].min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) static SENSOR_DEVICE_ATTR_RW(in1_min, in_min, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) static SENSOR_DEVICE_ATTR_RW(in2_min, in_min, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) static SENSOR_DEVICE_ATTR_RW(in3_min, in_min, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) static SENSOR_DEVICE_ATTR_RW(in4_min, in_min, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) static SENSOR_DEVICE_ATTR_RW(in5_min, in_min, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) static SENSOR_DEVICE_ATTR_RW(in6_min, in_min, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) static SENSOR_DEVICE_ATTR_RW(in7_min, in_min, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) static SENSOR_DEVICE_ATTR_RW(in8_min, in_min, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) static SENSOR_DEVICE_ATTR_RW(in9_min, in_min, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) static SENSOR_DEVICE_ATTR_RW(in10_min, in_min, 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) static SENSOR_DEVICE_ATTR_RW(in11_min, in_min, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) static SENSOR_DEVICE_ATTR_RW(in12_min, in_min, 11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) static SENSOR_DEVICE_ATTR_RW(in13_min, in_min, 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) static SENSOR_DEVICE_ATTR_RW(in14_min, in_min, 13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) static SENSOR_DEVICE_ATTR_RW(in15_min, in_min, 14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) static SENSOR_DEVICE_ATTR_RW(in16_min, in_min, 15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) static ssize_t in_max_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) int vccp = nr - 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) long rc, vid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) if ((nr == 6 || nr == 7) && vccp_limit_type[vccp]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) vid = LM93_VID_FROM_REG(data->vid[vccp]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) rc = LM93_IN_MAX_FROM_REG(data->vccp_limits[vccp], vid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) rc = LM93_IN_FROM_REG(nr, data->block7[nr].max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) return sprintf(buf, "%ld\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) static ssize_t in_max_store(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) int vccp = nr - 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) long vid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) if ((nr == 6 || nr == 7) && vccp_limit_type[vccp]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) vid = LM93_VID_FROM_REG(data->vid[vccp]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) data->vccp_limits[vccp] = (data->vccp_limits[vccp] & 0x0f) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) LM93_IN_REL_TO_REG(val, 1, vid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) lm93_write_byte(client, LM93_REG_VCCP_LIMIT_OFF(vccp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) data->vccp_limits[vccp]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) data->block7[nr].max = LM93_IN_TO_REG(nr, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) lm93_write_byte(client, LM93_REG_IN_MAX(nr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) data->block7[nr].max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) static SENSOR_DEVICE_ATTR_RW(in1_max, in_max, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) static SENSOR_DEVICE_ATTR_RW(in2_max, in_max, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) static SENSOR_DEVICE_ATTR_RW(in3_max, in_max, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) static SENSOR_DEVICE_ATTR_RW(in4_max, in_max, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) static SENSOR_DEVICE_ATTR_RW(in5_max, in_max, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) static SENSOR_DEVICE_ATTR_RW(in6_max, in_max, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) static SENSOR_DEVICE_ATTR_RW(in7_max, in_max, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) static SENSOR_DEVICE_ATTR_RW(in8_max, in_max, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) static SENSOR_DEVICE_ATTR_RW(in9_max, in_max, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) static SENSOR_DEVICE_ATTR_RW(in10_max, in_max, 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) static SENSOR_DEVICE_ATTR_RW(in11_max, in_max, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) static SENSOR_DEVICE_ATTR_RW(in12_max, in_max, 11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) static SENSOR_DEVICE_ATTR_RW(in13_max, in_max, 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) static SENSOR_DEVICE_ATTR_RW(in14_max, in_max, 13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) static SENSOR_DEVICE_ATTR_RW(in15_max, in_max, 14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) static SENSOR_DEVICE_ATTR_RW(in16_max, in_max, 15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) static ssize_t temp_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) return sprintf(buf, "%d\n", LM93_TEMP_FROM_REG(data->block2[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) static SENSOR_DEVICE_ATTR_RO(temp2_input, temp, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) static SENSOR_DEVICE_ATTR_RO(temp3_input, temp, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) static ssize_t temp_min_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) return sprintf(buf, "%d\n", LM93_TEMP_FROM_REG(data->temp_lim[nr].min));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) static ssize_t temp_min_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) struct device_attribute *attr, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) data->temp_lim[nr].min = LM93_TEMP_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) lm93_write_byte(client, LM93_REG_TEMP_MIN(nr), data->temp_lim[nr].min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) static SENSOR_DEVICE_ATTR_RW(temp1_min, temp_min, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) static SENSOR_DEVICE_ATTR_RW(temp2_min, temp_min, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) static SENSOR_DEVICE_ATTR_RW(temp3_min, temp_min, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) static ssize_t temp_max_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) return sprintf(buf, "%d\n", LM93_TEMP_FROM_REG(data->temp_lim[nr].max));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) static ssize_t temp_max_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) struct device_attribute *attr, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) data->temp_lim[nr].max = LM93_TEMP_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) lm93_write_byte(client, LM93_REG_TEMP_MAX(nr), data->temp_lim[nr].max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) static SENSOR_DEVICE_ATTR_RW(temp1_max, temp_max, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) static SENSOR_DEVICE_ATTR_RW(temp2_max, temp_max, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) static SENSOR_DEVICE_ATTR_RW(temp3_max, temp_max, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) static ssize_t temp_auto_base_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) return sprintf(buf, "%d\n", LM93_TEMP_FROM_REG(data->block10.base[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) static ssize_t temp_auto_base_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) data->block10.base[nr] = LM93_TEMP_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) lm93_write_byte(client, LM93_REG_TEMP_BASE(nr), data->block10.base[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) static SENSOR_DEVICE_ATTR_RW(temp1_auto_base, temp_auto_base, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) static SENSOR_DEVICE_ATTR_RW(temp2_auto_base, temp_auto_base, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) static SENSOR_DEVICE_ATTR_RW(temp3_auto_base, temp_auto_base, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) static ssize_t temp_auto_boost_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) return sprintf(buf, "%d\n", LM93_TEMP_FROM_REG(data->boost[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) static ssize_t temp_auto_boost_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) data->boost[nr] = LM93_TEMP_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) lm93_write_byte(client, LM93_REG_BOOST(nr), data->boost[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) static SENSOR_DEVICE_ATTR_RW(temp1_auto_boost, temp_auto_boost, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) static SENSOR_DEVICE_ATTR_RW(temp2_auto_boost, temp_auto_boost, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) static SENSOR_DEVICE_ATTR_RW(temp3_auto_boost, temp_auto_boost, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) static ssize_t temp_auto_boost_hyst_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) int mode = LM93_TEMP_OFFSET_MODE_FROM_REG(data->sfc2, nr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) return sprintf(buf, "%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) LM93_AUTO_BOOST_HYST_FROM_REGS(data, nr, mode));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) static ssize_t temp_auto_boost_hyst_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) /* force 0.5C/bit mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) data->sfc2 = lm93_read_byte(client, LM93_REG_SFC2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) data->sfc2 |= ((nr < 2) ? 0x10 : 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) lm93_write_byte(client, LM93_REG_SFC2, data->sfc2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) data->boost_hyst[nr/2] = LM93_AUTO_BOOST_HYST_TO_REG(data, val, nr, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) lm93_write_byte(client, LM93_REG_BOOST_HYST(nr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) data->boost_hyst[nr/2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) static SENSOR_DEVICE_ATTR_RW(temp1_auto_boost_hyst, temp_auto_boost_hyst, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) static SENSOR_DEVICE_ATTR_RW(temp2_auto_boost_hyst, temp_auto_boost_hyst, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) static SENSOR_DEVICE_ATTR_RW(temp3_auto_boost_hyst, temp_auto_boost_hyst, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) static ssize_t temp_auto_offset_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) struct sensor_device_attribute_2 *s_attr = to_sensor_dev_attr_2(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) int nr = s_attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) int ofs = s_attr->nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) int mode = LM93_TEMP_OFFSET_MODE_FROM_REG(data->sfc2, nr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) return sprintf(buf, "%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) LM93_TEMP_AUTO_OFFSET_FROM_REG(data->block10.offset[ofs],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) nr, mode));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) static ssize_t temp_auto_offset_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) struct sensor_device_attribute_2 *s_attr = to_sensor_dev_attr_2(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) int nr = s_attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) int ofs = s_attr->nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) /* force 0.5C/bit mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) data->sfc2 = lm93_read_byte(client, LM93_REG_SFC2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) data->sfc2 |= ((nr < 2) ? 0x10 : 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) lm93_write_byte(client, LM93_REG_SFC2, data->sfc2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) data->block10.offset[ofs] = LM93_TEMP_AUTO_OFFSET_TO_REG(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) data->block10.offset[ofs], val, nr, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) lm93_write_byte(client, LM93_REG_TEMP_OFFSET(ofs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) data->block10.offset[ofs]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_offset1, temp_auto_offset, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_offset2, temp_auto_offset, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_offset3, temp_auto_offset, 2, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_offset4, temp_auto_offset, 3, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_offset5, temp_auto_offset, 4, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_offset6, temp_auto_offset, 5, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_offset7, temp_auto_offset, 6, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_offset8, temp_auto_offset, 7, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_offset9, temp_auto_offset, 8, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_offset10, temp_auto_offset, 9, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_offset11, temp_auto_offset, 10, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_offset12, temp_auto_offset, 11, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_offset1, temp_auto_offset, 0, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_offset2, temp_auto_offset, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_offset3, temp_auto_offset, 2, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_offset4, temp_auto_offset, 3, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_offset5, temp_auto_offset, 4, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_offset6, temp_auto_offset, 5, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_offset7, temp_auto_offset, 6, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_offset8, temp_auto_offset, 7, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_offset9, temp_auto_offset, 8, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_offset10, temp_auto_offset, 9, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_offset11, temp_auto_offset, 10, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_offset12, temp_auto_offset, 11, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_offset1, temp_auto_offset, 0, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_offset2, temp_auto_offset, 1, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_offset3, temp_auto_offset, 2, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_offset4, temp_auto_offset, 3, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_offset5, temp_auto_offset, 4, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_offset6, temp_auto_offset, 5, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_offset7, temp_auto_offset, 6, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_offset8, temp_auto_offset, 7, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_offset9, temp_auto_offset, 8, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_offset10, temp_auto_offset, 9, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_offset11, temp_auto_offset, 10, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_offset12, temp_auto_offset, 11, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) static ssize_t temp_auto_pwm_min_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) u8 reg, ctl4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) reg = data->auto_pwm_min_hyst[nr/2] >> 4 & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) ctl4 = data->block9[nr][LM93_PWM_CTL4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) return sprintf(buf, "%d\n", LM93_PWM_FROM_REG(reg, (ctl4 & 0x07) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) LM93_PWM_MAP_LO_FREQ : LM93_PWM_MAP_HI_FREQ));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) static ssize_t temp_auto_pwm_min_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) u8 reg, ctl4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) reg = lm93_read_byte(client, LM93_REG_PWM_MIN_HYST(nr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) ctl4 = lm93_read_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) reg = (reg & 0x0f) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) LM93_PWM_TO_REG(val, (ctl4 & 0x07) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) LM93_PWM_MAP_LO_FREQ :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) LM93_PWM_MAP_HI_FREQ) << 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) data->auto_pwm_min_hyst[nr/2] = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) lm93_write_byte(client, LM93_REG_PWM_MIN_HYST(nr), reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) static SENSOR_DEVICE_ATTR_RW(temp1_auto_pwm_min, temp_auto_pwm_min, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) static SENSOR_DEVICE_ATTR_RW(temp2_auto_pwm_min, temp_auto_pwm_min, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) static SENSOR_DEVICE_ATTR_RW(temp3_auto_pwm_min, temp_auto_pwm_min, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) static ssize_t temp_auto_offset_hyst_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) int mode = LM93_TEMP_OFFSET_MODE_FROM_REG(data->sfc2, nr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) return sprintf(buf, "%d\n", LM93_TEMP_OFFSET_FROM_REG(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) data->auto_pwm_min_hyst[nr / 2], mode));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) static ssize_t temp_auto_offset_hyst_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) /* force 0.5C/bit mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) data->sfc2 = lm93_read_byte(client, LM93_REG_SFC2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) data->sfc2 |= ((nr < 2) ? 0x10 : 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) lm93_write_byte(client, LM93_REG_SFC2, data->sfc2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) reg = data->auto_pwm_min_hyst[nr/2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) reg = (reg & 0xf0) | (LM93_TEMP_OFFSET_TO_REG(val, 1) & 0x0f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) data->auto_pwm_min_hyst[nr/2] = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) lm93_write_byte(client, LM93_REG_PWM_MIN_HYST(nr), reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) static SENSOR_DEVICE_ATTR_RW(temp1_auto_offset_hyst, temp_auto_offset_hyst, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) static SENSOR_DEVICE_ATTR_RW(temp2_auto_offset_hyst, temp_auto_offset_hyst, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) static SENSOR_DEVICE_ATTR_RW(temp3_auto_offset_hyst, temp_auto_offset_hyst, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) static ssize_t fan_input_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) struct sensor_device_attribute *s_attr = to_sensor_dev_attr(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) int nr = s_attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) return sprintf(buf, "%d\n", LM93_FAN_FROM_REG(data->block5[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) static SENSOR_DEVICE_ATTR_RO(fan1_input, fan_input, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) static SENSOR_DEVICE_ATTR_RO(fan2_input, fan_input, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) static SENSOR_DEVICE_ATTR_RO(fan3_input, fan_input, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) static SENSOR_DEVICE_ATTR_RO(fan4_input, fan_input, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) static ssize_t fan_min_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) return sprintf(buf, "%d\n", LM93_FAN_FROM_REG(data->block8[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) static ssize_t fan_min_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) struct device_attribute *attr, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) data->block8[nr] = LM93_FAN_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) lm93_write_word(client, LM93_REG_FAN_MIN(nr), data->block8[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) static SENSOR_DEVICE_ATTR_RW(fan1_min, fan_min, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) static SENSOR_DEVICE_ATTR_RW(fan2_min, fan_min, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) static SENSOR_DEVICE_ATTR_RW(fan3_min, fan_min, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) static SENSOR_DEVICE_ATTR_RW(fan4_min, fan_min, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) * some tedious bit-twiddling here to deal with the register format:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) * data->sf_tach_to_pwm: (tach to pwm mapping bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) * bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) * T4:P2 T4:P1 T3:P2 T3:P1 T2:P2 T2:P1 T1:P2 T1:P1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) * data->sfc2: (enable bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) * bit | 3 | 2 | 1 | 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) * T4 T3 T2 T1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) static ssize_t fan_smart_tach_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) long rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) int mapping;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) /* extract the relevant mapping */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) mapping = (data->sf_tach_to_pwm >> (nr * 2)) & 0x03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) /* if there's a mapping and it's enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) if (mapping && ((data->sfc2 >> nr) & 0x01))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) rc = mapping;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) return sprintf(buf, "%ld\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) * helper function - must grab data->update_lock before calling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) * fan is 0-3, indicating fan1-fan4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) static void lm93_write_fan_smart_tach(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) struct lm93_data *data, int fan, long value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) /* insert the new mapping and write it out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) data->sf_tach_to_pwm = lm93_read_byte(client, LM93_REG_SF_TACH_TO_PWM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) data->sf_tach_to_pwm &= ~(0x3 << fan * 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) data->sf_tach_to_pwm |= value << fan * 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) lm93_write_byte(client, LM93_REG_SF_TACH_TO_PWM, data->sf_tach_to_pwm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) /* insert the enable bit and write it out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) data->sfc2 = lm93_read_byte(client, LM93_REG_SFC2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) if (value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) data->sfc2 |= 1 << fan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) data->sfc2 &= ~(1 << fan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) lm93_write_byte(client, LM93_REG_SFC2, data->sfc2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) static ssize_t fan_smart_tach_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) /* sanity test, ignore the write otherwise */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) if (val <= 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) /* can't enable if pwm freq is 22.5KHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) if (val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) u8 ctl4 = lm93_read_byte(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) LM93_REG_PWM_CTL(val - 1, LM93_PWM_CTL4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) if ((ctl4 & 0x07) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) lm93_write_fan_smart_tach(client, data, nr, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) static SENSOR_DEVICE_ATTR_RW(fan1_smart_tach, fan_smart_tach, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) static SENSOR_DEVICE_ATTR_RW(fan2_smart_tach, fan_smart_tach, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) static SENSOR_DEVICE_ATTR_RW(fan3_smart_tach, fan_smart_tach, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) static SENSOR_DEVICE_ATTR_RW(fan4_smart_tach, fan_smart_tach, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) static ssize_t pwm_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) u8 ctl2, ctl4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) long rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) ctl2 = data->block9[nr][LM93_PWM_CTL2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) ctl4 = data->block9[nr][LM93_PWM_CTL4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) if (ctl2 & 0x01) /* show user commanded value if enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) rc = data->pwm_override[nr];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) else /* show present h/w value if manual pwm disabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) rc = LM93_PWM_FROM_REG(ctl2 >> 4, (ctl4 & 0x07) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) LM93_PWM_MAP_LO_FREQ : LM93_PWM_MAP_HI_FREQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) return sprintf(buf, "%ld\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) static ssize_t pwm_store(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) u8 ctl2, ctl4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) ctl2 = lm93_read_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) ctl4 = lm93_read_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) ctl2 = (ctl2 & 0x0f) | LM93_PWM_TO_REG(val, (ctl4 & 0x07) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) LM93_PWM_MAP_LO_FREQ : LM93_PWM_MAP_HI_FREQ) << 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) /* save user commanded value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) data->pwm_override[nr] = LM93_PWM_FROM_REG(ctl2 >> 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) (ctl4 & 0x07) ? LM93_PWM_MAP_LO_FREQ :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) LM93_PWM_MAP_HI_FREQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) lm93_write_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL2), ctl2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) static SENSOR_DEVICE_ATTR_RW(pwm1, pwm, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) static SENSOR_DEVICE_ATTR_RW(pwm2, pwm, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) static ssize_t pwm_enable_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) u8 ctl2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) long rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) ctl2 = data->block9[nr][LM93_PWM_CTL2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805) if (ctl2 & 0x01) /* manual override enabled ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) rc = ((ctl2 & 0xF0) == 0xF0) ? 0 : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) rc = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) return sprintf(buf, "%ld\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) static ssize_t pwm_enable_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) u8 ctl2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) ctl2 = lm93_read_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) switch (val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) ctl2 |= 0xF1; /* enable manual override, set PWM to max */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) ctl2 |= 0x01; /* enable manual override */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) ctl2 &= ~0x01; /* disable manual override */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845) lm93_write_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL2), ctl2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) static SENSOR_DEVICE_ATTR_RW(pwm1_enable, pwm_enable, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) static SENSOR_DEVICE_ATTR_RW(pwm2_enable, pwm_enable, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) static ssize_t pwm_freq_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) u8 ctl4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) ctl4 = data->block9[nr][LM93_PWM_CTL4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) return sprintf(buf, "%d\n", LM93_PWM_FREQ_FROM_REG(ctl4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) * helper function - must grab data->update_lock before calling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) * pwm is 0-1, indicating pwm1-pwm2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) * this disables smart tach for all tach channels bound to the given pwm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) static void lm93_disable_fan_smart_tach(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870) struct lm93_data *data, int pwm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) int mapping = lm93_read_byte(client, LM93_REG_SF_TACH_TO_PWM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) int mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) /* collapse the mapping into a mask of enable bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) mapping = (mapping >> pwm) & 0x55;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) mask = mapping & 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) mask |= (mapping & 0x04) >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) mask |= (mapping & 0x10) >> 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) mask |= (mapping & 0x40) >> 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) /* disable smart tach according to the mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) data->sfc2 = lm93_read_byte(client, LM93_REG_SFC2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) data->sfc2 &= ~mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) lm93_write_byte(client, LM93_REG_SFC2, data->sfc2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) static ssize_t pwm_freq_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) struct device_attribute *attr, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) u8 ctl4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) ctl4 = lm93_read_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) ctl4 = (ctl4 & 0xf8) | LM93_PWM_FREQ_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) data->block9[nr][LM93_PWM_CTL4] = ctl4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) /* ctl4 == 0 -> 22.5KHz -> disable smart tach */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) if (!ctl4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) lm93_disable_fan_smart_tach(client, data, nr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910) lm93_write_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL4), ctl4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) static SENSOR_DEVICE_ATTR_RW(pwm1_freq, pwm_freq, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) static SENSOR_DEVICE_ATTR_RW(pwm2_freq, pwm_freq, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) static ssize_t pwm_auto_channels_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) return sprintf(buf, "%d\n", data->block9[nr][LM93_PWM_CTL1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) static ssize_t pwm_auto_channels_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) data->block9[nr][LM93_PWM_CTL1] = clamp_val(val, 0, 255);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943) lm93_write_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) data->block9[nr][LM93_PWM_CTL1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) static SENSOR_DEVICE_ATTR_RW(pwm1_auto_channels, pwm_auto_channels, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) static SENSOR_DEVICE_ATTR_RW(pwm2_auto_channels, pwm_auto_channels, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) static ssize_t pwm_auto_spinup_min_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) u8 ctl3, ctl4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) ctl3 = data->block9[nr][LM93_PWM_CTL3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) ctl4 = data->block9[nr][LM93_PWM_CTL4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) return sprintf(buf, "%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) LM93_PWM_FROM_REG(ctl3 & 0x0f, (ctl4 & 0x07) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) LM93_PWM_MAP_LO_FREQ : LM93_PWM_MAP_HI_FREQ));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) static ssize_t pwm_auto_spinup_min_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) u8 ctl3, ctl4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) ctl3 = lm93_read_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL3));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) ctl4 = lm93_read_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) ctl3 = (ctl3 & 0xf0) | LM93_PWM_TO_REG(val, (ctl4 & 0x07) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986) LM93_PWM_MAP_LO_FREQ :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) LM93_PWM_MAP_HI_FREQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988) data->block9[nr][LM93_PWM_CTL3] = ctl3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) lm93_write_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL3), ctl3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) static SENSOR_DEVICE_ATTR_RW(pwm1_auto_spinup_min, pwm_auto_spinup_min, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) static SENSOR_DEVICE_ATTR_RW(pwm2_auto_spinup_min, pwm_auto_spinup_min, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) static ssize_t pwm_auto_spinup_time_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) return sprintf(buf, "%d\n", LM93_SPINUP_TIME_FROM_REG(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) data->block9[nr][LM93_PWM_CTL3]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) static ssize_t pwm_auto_spinup_time_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) u8 ctl3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) ctl3 = lm93_read_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL3));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) ctl3 = (ctl3 & 0x1f) | (LM93_SPINUP_TIME_TO_REG(val) << 5 & 0xe0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025) data->block9[nr][LM93_PWM_CTL3] = ctl3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) lm93_write_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL3), ctl3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031) static SENSOR_DEVICE_ATTR_RW(pwm1_auto_spinup_time, pwm_auto_spinup_time, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) static SENSOR_DEVICE_ATTR_RW(pwm2_auto_spinup_time, pwm_auto_spinup_time, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034) static ssize_t pwm_auto_prochot_ramp_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) return sprintf(buf, "%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) LM93_RAMP_FROM_REG(data->pwm_ramp_ctl >> 4 & 0x0f));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042) static ssize_t pwm_auto_prochot_ramp_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) u8 ramp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) ramp = lm93_read_byte(client, LM93_REG_PWM_RAMP_CTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058) ramp = (ramp & 0x0f) | (LM93_RAMP_TO_REG(val) << 4 & 0xf0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059) lm93_write_byte(client, LM93_REG_PWM_RAMP_CTL, ramp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) static DEVICE_ATTR_RW(pwm_auto_prochot_ramp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) static ssize_t pwm_auto_vrdhot_ramp_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) return sprintf(buf, "%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) LM93_RAMP_FROM_REG(data->pwm_ramp_ctl & 0x0f));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) static ssize_t pwm_auto_vrdhot_ramp_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080) u8 ramp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089) ramp = lm93_read_byte(client, LM93_REG_PWM_RAMP_CTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090) ramp = (ramp & 0xf0) | (LM93_RAMP_TO_REG(val) & 0x0f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091) lm93_write_byte(client, LM93_REG_PWM_RAMP_CTL, ramp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096) static DEVICE_ATTR_RW(pwm_auto_vrdhot_ramp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) static ssize_t vid_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103) return sprintf(buf, "%d\n", LM93_VID_FROM_REG(data->vid[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106) static SENSOR_DEVICE_ATTR_RO(cpu0_vid, vid, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107) static SENSOR_DEVICE_ATTR_RO(cpu1_vid, vid, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109) static ssize_t prochot_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114) return sprintf(buf, "%d\n", data->block4[nr].cur);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) static SENSOR_DEVICE_ATTR_RO(prochot1, prochot, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118) static SENSOR_DEVICE_ATTR_RO(prochot2, prochot, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120) static ssize_t prochot_avg_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125) return sprintf(buf, "%d\n", data->block4[nr].avg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128) static SENSOR_DEVICE_ATTR_RO(prochot1_avg, prochot_avg, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129) static SENSOR_DEVICE_ATTR_RO(prochot2_avg, prochot_avg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131) static ssize_t prochot_max_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136) return sprintf(buf, "%d\n", data->prochot_max[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139) static ssize_t prochot_max_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154) data->prochot_max[nr] = LM93_PROCHOT_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155) lm93_write_byte(client, LM93_REG_PROCHOT_MAX(nr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) data->prochot_max[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161) static SENSOR_DEVICE_ATTR_RW(prochot1_max, prochot_max, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162) static SENSOR_DEVICE_ATTR_RW(prochot2_max, prochot_max, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164) static const u8 prochot_override_mask[] = { 0x80, 0x40 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166) static ssize_t prochot_override_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171) return sprintf(buf, "%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172) (data->prochot_override & prochot_override_mask[nr]) ? 1 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175) static ssize_t prochot_override_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190) if (val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191) data->prochot_override |= prochot_override_mask[nr];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193) data->prochot_override &= (~prochot_override_mask[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194) lm93_write_byte(client, LM93_REG_PROCHOT_OVERRIDE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195) data->prochot_override);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200) static SENSOR_DEVICE_ATTR_RW(prochot1_override, prochot_override, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201) static SENSOR_DEVICE_ATTR_RW(prochot2_override, prochot_override, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203) static ssize_t prochot_interval_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208) u8 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209) if (nr == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210) tmp = (data->prochot_interval & 0xf0) >> 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212) tmp = data->prochot_interval & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213) return sprintf(buf, "%d\n", LM93_INTERVAL_FROM_REG(tmp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216) static ssize_t prochot_interval_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223) u8 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232) tmp = lm93_read_byte(client, LM93_REG_PROCHOT_INTERVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233) if (nr == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234) tmp = (tmp & 0x0f) | (LM93_INTERVAL_TO_REG(val) << 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236) tmp = (tmp & 0xf0) | LM93_INTERVAL_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237) data->prochot_interval = tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238) lm93_write_byte(client, LM93_REG_PROCHOT_INTERVAL, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243) static SENSOR_DEVICE_ATTR_RW(prochot1_interval, prochot_interval, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244) static SENSOR_DEVICE_ATTR_RW(prochot2_interval, prochot_interval, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246) static ssize_t prochot_override_duty_cycle_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251) return sprintf(buf, "%d\n", data->prochot_override & 0x0f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254) static ssize_t prochot_override_duty_cycle_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268) data->prochot_override = (data->prochot_override & 0xf0) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269) clamp_val(val, 0, 15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270) lm93_write_byte(client, LM93_REG_PROCHOT_OVERRIDE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271) data->prochot_override);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276) static DEVICE_ATTR_RW(prochot_override_duty_cycle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278) static ssize_t prochot_short_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282) return sprintf(buf, "%d\n", (data->config & 0x10) ? 1 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285) static ssize_t prochot_short_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289) struct lm93_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299) if (val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300) data->config |= 0x10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302) data->config &= ~0x10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303) lm93_write_byte(client, LM93_REG_CONFIG, data->config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2304) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2305) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2308) static DEVICE_ATTR_RW(prochot_short);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2310) static ssize_t vrdhot_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2311) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2312) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2313) int nr = (to_sensor_dev_attr(attr))->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2314) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2315) return sprintf(buf, "%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2316) data->block1.host_status_1 & (1 << (nr + 4)) ? 1 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2319) static SENSOR_DEVICE_ATTR_RO(vrdhot1, vrdhot, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2320) static SENSOR_DEVICE_ATTR_RO(vrdhot2, vrdhot, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2322) static ssize_t gpio_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2323) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2324) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2325) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2326) return sprintf(buf, "%d\n", LM93_GPI_FROM_REG(data->gpi));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2327) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2329) static DEVICE_ATTR_RO(gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2331) static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2332) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2333) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2334) struct lm93_data *data = lm93_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2335) return sprintf(buf, "%d\n", LM93_ALARMS_FROM_REG(data->block1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2338) static DEVICE_ATTR_RO(alarms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2340) static struct attribute *lm93_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2341) &sensor_dev_attr_in1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2342) &sensor_dev_attr_in2_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2343) &sensor_dev_attr_in3_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2344) &sensor_dev_attr_in4_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2345) &sensor_dev_attr_in5_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2346) &sensor_dev_attr_in6_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2347) &sensor_dev_attr_in7_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2348) &sensor_dev_attr_in8_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2349) &sensor_dev_attr_in9_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2350) &sensor_dev_attr_in10_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2351) &sensor_dev_attr_in11_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2352) &sensor_dev_attr_in12_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2353) &sensor_dev_attr_in13_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2354) &sensor_dev_attr_in14_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2355) &sensor_dev_attr_in15_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2356) &sensor_dev_attr_in16_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2357) &sensor_dev_attr_in1_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2358) &sensor_dev_attr_in2_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2359) &sensor_dev_attr_in3_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2360) &sensor_dev_attr_in4_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2361) &sensor_dev_attr_in5_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2362) &sensor_dev_attr_in6_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2363) &sensor_dev_attr_in7_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2364) &sensor_dev_attr_in8_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2365) &sensor_dev_attr_in9_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2366) &sensor_dev_attr_in10_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2367) &sensor_dev_attr_in11_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2368) &sensor_dev_attr_in12_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2369) &sensor_dev_attr_in13_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2370) &sensor_dev_attr_in14_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2371) &sensor_dev_attr_in15_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2372) &sensor_dev_attr_in16_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2373) &sensor_dev_attr_in1_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2374) &sensor_dev_attr_in2_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2375) &sensor_dev_attr_in3_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2376) &sensor_dev_attr_in4_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2377) &sensor_dev_attr_in5_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2378) &sensor_dev_attr_in6_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2379) &sensor_dev_attr_in7_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2380) &sensor_dev_attr_in8_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2381) &sensor_dev_attr_in9_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2382) &sensor_dev_attr_in10_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2383) &sensor_dev_attr_in11_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2384) &sensor_dev_attr_in12_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2385) &sensor_dev_attr_in13_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2386) &sensor_dev_attr_in14_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2387) &sensor_dev_attr_in15_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2388) &sensor_dev_attr_in16_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2389) &sensor_dev_attr_temp1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2390) &sensor_dev_attr_temp2_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2391) &sensor_dev_attr_temp3_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2392) &sensor_dev_attr_temp1_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2393) &sensor_dev_attr_temp2_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2394) &sensor_dev_attr_temp3_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2395) &sensor_dev_attr_temp1_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2396) &sensor_dev_attr_temp2_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2397) &sensor_dev_attr_temp3_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2398) &sensor_dev_attr_temp1_auto_base.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2399) &sensor_dev_attr_temp2_auto_base.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2400) &sensor_dev_attr_temp3_auto_base.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2401) &sensor_dev_attr_temp1_auto_boost.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2402) &sensor_dev_attr_temp2_auto_boost.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2403) &sensor_dev_attr_temp3_auto_boost.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2404) &sensor_dev_attr_temp1_auto_boost_hyst.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2405) &sensor_dev_attr_temp2_auto_boost_hyst.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2406) &sensor_dev_attr_temp3_auto_boost_hyst.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2407) &sensor_dev_attr_temp1_auto_offset1.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2408) &sensor_dev_attr_temp1_auto_offset2.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2409) &sensor_dev_attr_temp1_auto_offset3.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2410) &sensor_dev_attr_temp1_auto_offset4.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2411) &sensor_dev_attr_temp1_auto_offset5.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2412) &sensor_dev_attr_temp1_auto_offset6.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2413) &sensor_dev_attr_temp1_auto_offset7.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2414) &sensor_dev_attr_temp1_auto_offset8.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2415) &sensor_dev_attr_temp1_auto_offset9.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2416) &sensor_dev_attr_temp1_auto_offset10.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2417) &sensor_dev_attr_temp1_auto_offset11.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2418) &sensor_dev_attr_temp1_auto_offset12.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2419) &sensor_dev_attr_temp2_auto_offset1.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2420) &sensor_dev_attr_temp2_auto_offset2.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2421) &sensor_dev_attr_temp2_auto_offset3.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2422) &sensor_dev_attr_temp2_auto_offset4.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2423) &sensor_dev_attr_temp2_auto_offset5.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2424) &sensor_dev_attr_temp2_auto_offset6.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2425) &sensor_dev_attr_temp2_auto_offset7.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2426) &sensor_dev_attr_temp2_auto_offset8.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2427) &sensor_dev_attr_temp2_auto_offset9.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2428) &sensor_dev_attr_temp2_auto_offset10.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2429) &sensor_dev_attr_temp2_auto_offset11.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2430) &sensor_dev_attr_temp2_auto_offset12.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2431) &sensor_dev_attr_temp3_auto_offset1.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2432) &sensor_dev_attr_temp3_auto_offset2.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2433) &sensor_dev_attr_temp3_auto_offset3.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2434) &sensor_dev_attr_temp3_auto_offset4.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2435) &sensor_dev_attr_temp3_auto_offset5.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2436) &sensor_dev_attr_temp3_auto_offset6.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2437) &sensor_dev_attr_temp3_auto_offset7.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2438) &sensor_dev_attr_temp3_auto_offset8.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2439) &sensor_dev_attr_temp3_auto_offset9.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2440) &sensor_dev_attr_temp3_auto_offset10.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2441) &sensor_dev_attr_temp3_auto_offset11.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2442) &sensor_dev_attr_temp3_auto_offset12.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2443) &sensor_dev_attr_temp1_auto_pwm_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2444) &sensor_dev_attr_temp2_auto_pwm_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2445) &sensor_dev_attr_temp3_auto_pwm_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2446) &sensor_dev_attr_temp1_auto_offset_hyst.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2447) &sensor_dev_attr_temp2_auto_offset_hyst.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2448) &sensor_dev_attr_temp3_auto_offset_hyst.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2449) &sensor_dev_attr_fan1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2450) &sensor_dev_attr_fan2_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2451) &sensor_dev_attr_fan3_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2452) &sensor_dev_attr_fan4_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2453) &sensor_dev_attr_fan1_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2454) &sensor_dev_attr_fan2_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2455) &sensor_dev_attr_fan3_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2456) &sensor_dev_attr_fan4_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2457) &sensor_dev_attr_fan1_smart_tach.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2458) &sensor_dev_attr_fan2_smart_tach.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2459) &sensor_dev_attr_fan3_smart_tach.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2460) &sensor_dev_attr_fan4_smart_tach.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2461) &sensor_dev_attr_pwm1.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2462) &sensor_dev_attr_pwm2.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2463) &sensor_dev_attr_pwm1_enable.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2464) &sensor_dev_attr_pwm2_enable.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2465) &sensor_dev_attr_pwm1_freq.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2466) &sensor_dev_attr_pwm2_freq.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2467) &sensor_dev_attr_pwm1_auto_channels.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2468) &sensor_dev_attr_pwm2_auto_channels.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2469) &sensor_dev_attr_pwm1_auto_spinup_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2470) &sensor_dev_attr_pwm2_auto_spinup_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2471) &sensor_dev_attr_pwm1_auto_spinup_time.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2472) &sensor_dev_attr_pwm2_auto_spinup_time.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2473) &dev_attr_pwm_auto_prochot_ramp.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2474) &dev_attr_pwm_auto_vrdhot_ramp.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2475) &sensor_dev_attr_cpu0_vid.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2476) &sensor_dev_attr_cpu1_vid.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2477) &sensor_dev_attr_prochot1.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2478) &sensor_dev_attr_prochot2.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2479) &sensor_dev_attr_prochot1_avg.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2480) &sensor_dev_attr_prochot2_avg.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2481) &sensor_dev_attr_prochot1_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2482) &sensor_dev_attr_prochot2_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2483) &sensor_dev_attr_prochot1_override.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2484) &sensor_dev_attr_prochot2_override.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2485) &sensor_dev_attr_prochot1_interval.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2486) &sensor_dev_attr_prochot2_interval.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2487) &dev_attr_prochot_override_duty_cycle.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2488) &dev_attr_prochot_short.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2489) &sensor_dev_attr_vrdhot1.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2490) &sensor_dev_attr_vrdhot2.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2491) &dev_attr_gpio.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2492) &dev_attr_alarms.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2493) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2494) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2496) ATTRIBUTE_GROUPS(lm93);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2498) static void lm93_init_client(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2499) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2500) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2501) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2503) /* configure VID pin input thresholds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2504) reg = lm93_read_byte(client, LM93_REG_GPI_VID_CTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2505) lm93_write_byte(client, LM93_REG_GPI_VID_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2506) reg | (vid_agtl ? 0x03 : 0x00));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2508) if (init) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2509) /* enable #ALERT pin */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2510) reg = lm93_read_byte(client, LM93_REG_CONFIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2511) lm93_write_byte(client, LM93_REG_CONFIG, reg | 0x08);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2513) /* enable ASF mode for BMC status registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2514) reg = lm93_read_byte(client, LM93_REG_STATUS_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2515) lm93_write_byte(client, LM93_REG_STATUS_CONTROL, reg | 0x02);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2517) /* set sleep state to S0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2518) lm93_write_byte(client, LM93_REG_SLEEP_CONTROL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2520) /* unmask #VRDHOT and dynamic VCCP (if nec) error events */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2521) reg = lm93_read_byte(client, LM93_REG_MISC_ERR_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2522) reg &= ~0x03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2523) reg &= ~(vccp_limit_type[0] ? 0x10 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2524) reg &= ~(vccp_limit_type[1] ? 0x20 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2525) lm93_write_byte(client, LM93_REG_MISC_ERR_MASK, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2526) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2528) /* start monitoring */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2529) reg = lm93_read_byte(client, LM93_REG_CONFIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2530) lm93_write_byte(client, LM93_REG_CONFIG, reg | 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2532) /* spin until ready */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2533) for (i = 0; i < 20; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2534) msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2535) if ((lm93_read_byte(client, LM93_REG_CONFIG) & 0x80) == 0x80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2536) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2537) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2539) dev_warn(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2540) "timed out waiting for sensor chip to signal ready!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2541) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2543) /* Return 0 if detection is successful, -ENODEV otherwise */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2544) static int lm93_detect(struct i2c_client *client, struct i2c_board_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2545) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2546) struct i2c_adapter *adapter = client->adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2547) int mfr, ver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2548) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2550) if (!i2c_check_functionality(adapter, LM93_SMBUS_FUNC_MIN))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2551) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2553) /* detection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2554) mfr = lm93_read_byte(client, LM93_REG_MFR_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2555) if (mfr != 0x01) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2556) dev_dbg(&adapter->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2557) "detect failed, bad manufacturer id 0x%02x!\n", mfr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2558) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2559) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2561) ver = lm93_read_byte(client, LM93_REG_VER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2562) switch (ver) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2563) case LM93_MFR_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2564) case LM93_MFR_ID_PROTOTYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2565) name = "lm93";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2566) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2567) case LM94_MFR_ID_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2568) case LM94_MFR_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2569) case LM94_MFR_ID_PROTOTYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2570) name = "lm94";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2571) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2572) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2573) dev_dbg(&adapter->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2574) "detect failed, bad version id 0x%02x!\n", ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2575) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2576) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2578) strlcpy(info->type, name, I2C_NAME_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2579) dev_dbg(&adapter->dev, "loading %s at %d, 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2580) client->name, i2c_adapter_id(client->adapter),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2581) client->addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2583) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2584) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2586) static int lm93_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2587) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2588) struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2589) struct lm93_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2590) struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2591) int func;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2592) void (*update)(struct lm93_data *, struct i2c_client *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2594) /* choose update routine based on bus capabilities */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2595) func = i2c_get_functionality(client->adapter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2596) if (((LM93_SMBUS_FUNC_FULL & func) == LM93_SMBUS_FUNC_FULL) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2597) (!disable_block)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2598) dev_dbg(dev, "using SMBus block data transactions\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2599) update = lm93_update_client_full;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2600) } else if ((LM93_SMBUS_FUNC_MIN & func) == LM93_SMBUS_FUNC_MIN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2601) dev_dbg(dev, "disabled SMBus block data transactions\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2602) update = lm93_update_client_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2603) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2604) dev_dbg(dev, "detect failed, smbus byte and/or word data not supported!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2605) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2606) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2608) data = devm_kzalloc(dev, sizeof(struct lm93_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2609) if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2610) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2612) /* housekeeping */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2613) data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2614) data->update = update;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2615) mutex_init(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2617) /* initialize the chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2618) lm93_init_client(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2620) hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2621) data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2622) lm93_groups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2623) return PTR_ERR_OR_ZERO(hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2624) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2626) static const struct i2c_device_id lm93_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2627) { "lm93", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2628) { "lm94", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2629) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2630) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2631) MODULE_DEVICE_TABLE(i2c, lm93_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2633) static struct i2c_driver lm93_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2634) .class = I2C_CLASS_HWMON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2635) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2636) .name = "lm93",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2637) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2638) .probe_new = lm93_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2639) .id_table = lm93_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2640) .detect = lm93_detect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2641) .address_list = normal_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2642) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2644) module_i2c_driver(lm93_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2646) MODULE_AUTHOR("Mark M. Hoffman <mhoffman@lightlink.com>, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2647) "Hans J. Koch <hjk@hansjkoch.de>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2648) MODULE_DESCRIPTION("LM93 driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2649) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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