^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * lm78.c - Part of lm_sensors, Linux kernel modules for hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * monitoring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 1998, 1999 Frodo Looijaard <frodol@dds.nl>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (c) 2007, 2011 Jean Delvare <jdelvare@suse.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/hwmon-vid.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/hwmon-sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #ifdef CONFIG_ISA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /* Addresses to scan */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 0x2e, 0x2f, I2C_CLIENT_END };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) enum chips { lm78, lm79 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /* Many LM78 constants specified below */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /* Length of ISA address segment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define LM78_EXTENT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* Where are the ISA address/data registers relative to the base address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define LM78_ADDR_REG_OFFSET 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define LM78_DATA_REG_OFFSET 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* The LM78 registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define LM78_REG_IN_MAX(nr) (0x2b + (nr) * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define LM78_REG_IN_MIN(nr) (0x2c + (nr) * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define LM78_REG_IN(nr) (0x20 + (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define LM78_REG_FAN_MIN(nr) (0x3b + (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define LM78_REG_FAN(nr) (0x28 + (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define LM78_REG_TEMP 0x27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define LM78_REG_TEMP_OVER 0x39
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define LM78_REG_TEMP_HYST 0x3a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define LM78_REG_ALARM1 0x41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define LM78_REG_ALARM2 0x42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define LM78_REG_VID_FANDIV 0x47
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define LM78_REG_CONFIG 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define LM78_REG_CHIPID 0x49
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define LM78_REG_I2C_ADDR 0x48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * Conversions. Rounding and limit checking is only done on the TO_REG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * variants.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * IN: mV (0V to 4.08V)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * REG: 16mV/bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static inline u8 IN_TO_REG(unsigned long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) unsigned long nval = clamp_val(val, 0, 4080);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return (nval + 8) / 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define IN_FROM_REG(val) ((val) * 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static inline u8 FAN_TO_REG(long rpm, int div)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) if (rpm <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return 255;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) if (rpm > 1350000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static inline int FAN_FROM_REG(u8 val, int div)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return val == 0 ? -1 : val == 255 ? 0 : 1350000 / (val * div);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * TEMP: mC (-128C to +127C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * REG: 1C/bit, two's complement
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static inline s8 TEMP_TO_REG(long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) int nval = clamp_val(val, -128000, 127000) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return nval < 0 ? (nval - 500) / 1000 : (nval + 500) / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static inline int TEMP_FROM_REG(s8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return val * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define DIV_FROM_REG(val) (1 << (val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct lm78_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) enum chips type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /* For ISA device only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) int isa_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) struct mutex update_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) char valid; /* !=0 if following fields are valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) unsigned long last_updated; /* In jiffies */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) u8 in[7]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) u8 in_max[7]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) u8 in_min[7]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) u8 fan[3]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) u8 fan_min[3]; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) s8 temp; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) s8 temp_over; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) s8 temp_hyst; /* Register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) u8 fan_div[3]; /* Register encoding, shifted right */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) u8 vid; /* Register encoding, combined */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) u16 alarms; /* Register encoding, combined */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static int lm78_read_value(struct lm78_data *data, u8 reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static int lm78_write_value(struct lm78_data *data, u8 reg, u8 value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static struct lm78_data *lm78_update_device(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static void lm78_init_device(struct lm78_data *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /* 7 Voltages */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static ssize_t in_show(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) struct lm78_data *data = lm78_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) return sprintf(buf, "%d\n", IN_FROM_REG(data->in[attr->index]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static ssize_t in_min_show(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) struct lm78_data *data = lm78_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) return sprintf(buf, "%d\n", IN_FROM_REG(data->in_min[attr->index]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) static ssize_t in_max_show(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) struct lm78_data *data = lm78_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return sprintf(buf, "%d\n", IN_FROM_REG(data->in_max[attr->index]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static ssize_t in_min_store(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) struct lm78_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) data->in_min[nr] = IN_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) lm78_write_value(data, LM78_REG_IN_MIN(nr), data->in_min[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static ssize_t in_max_store(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) struct lm78_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) data->in_max[nr] = IN_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) lm78_write_value(data, LM78_REG_IN_MAX(nr), data->in_max[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static SENSOR_DEVICE_ATTR_RO(in0_input, in, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static SENSOR_DEVICE_ATTR_RW(in0_min, in_min, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static SENSOR_DEVICE_ATTR_RW(in0_max, in_max, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static SENSOR_DEVICE_ATTR_RO(in1_input, in, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static SENSOR_DEVICE_ATTR_RW(in1_min, in_min, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) static SENSOR_DEVICE_ATTR_RW(in1_max, in_max, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) static SENSOR_DEVICE_ATTR_RO(in2_input, in, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) static SENSOR_DEVICE_ATTR_RW(in2_min, in_min, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static SENSOR_DEVICE_ATTR_RW(in2_max, in_max, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static SENSOR_DEVICE_ATTR_RO(in3_input, in, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) static SENSOR_DEVICE_ATTR_RW(in3_min, in_min, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static SENSOR_DEVICE_ATTR_RW(in3_max, in_max, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) static SENSOR_DEVICE_ATTR_RO(in4_input, in, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) static SENSOR_DEVICE_ATTR_RW(in4_min, in_min, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static SENSOR_DEVICE_ATTR_RW(in4_max, in_max, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) static SENSOR_DEVICE_ATTR_RO(in5_input, in, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static SENSOR_DEVICE_ATTR_RW(in5_min, in_min, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static SENSOR_DEVICE_ATTR_RW(in5_max, in_max, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static SENSOR_DEVICE_ATTR_RO(in6_input, in, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static SENSOR_DEVICE_ATTR_RW(in6_min, in_min, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) static SENSOR_DEVICE_ATTR_RW(in6_max, in_max, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) /* Temperature */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) static ssize_t temp1_input_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) struct device_attribute *da, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) struct lm78_data *data = lm78_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static ssize_t temp1_max_show(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) struct lm78_data *data = lm78_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_over));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static ssize_t temp1_max_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) struct device_attribute *da, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) struct lm78_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) data->temp_over = TEMP_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) lm78_write_value(data, LM78_REG_TEMP_OVER, data->temp_over);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static ssize_t temp1_max_hyst_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) struct device_attribute *da, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) struct lm78_data *data = lm78_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_hyst));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) static ssize_t temp1_max_hyst_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) struct lm78_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) data->temp_hyst = TEMP_TO_REG(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) lm78_write_value(data, LM78_REG_TEMP_HYST, data->temp_hyst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static DEVICE_ATTR_RO(temp1_input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) static DEVICE_ATTR_RW(temp1_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) static DEVICE_ATTR_RW(temp1_max_hyst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) /* 3 Fans */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) static ssize_t fan_show(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) struct lm78_data *data = lm78_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[nr],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) DIV_FROM_REG(data->fan_div[nr])));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) static ssize_t fan_min_show(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) struct lm78_data *data = lm78_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan_min[nr],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) DIV_FROM_REG(data->fan_div[nr])));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) static ssize_t fan_min_store(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) struct lm78_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) lm78_write_value(data, LM78_REG_FAN_MIN(nr), data->fan_min[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) static ssize_t fan_div_show(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) struct lm78_data *data = lm78_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[attr->index]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) * Note: we save and restore the fan minimum here, because its value is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) * determined in part by the fan divisor. This follows the principle of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) * least surprise; the user doesn't expect the fan minimum to change just
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) * because the divisor changed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) static ssize_t fan_div_store(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) struct lm78_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) unsigned long min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) min = FAN_FROM_REG(data->fan_min[nr],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) DIV_FROM_REG(data->fan_div[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) switch (val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) data->fan_div[nr] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) data->fan_div[nr] = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) data->fan_div[nr] = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) case 8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) data->fan_div[nr] = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) "fan_div value %ld not supported. Choose one of 1, 2, 4 or 8!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) reg = lm78_read_value(data, LM78_REG_VID_FANDIV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) switch (nr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) reg = (reg & 0xcf) | (data->fan_div[nr] << 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) reg = (reg & 0x3f) | (data->fan_div[nr] << 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) lm78_write_value(data, LM78_REG_VID_FANDIV, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) data->fan_min[nr] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) lm78_write_value(data, LM78_REG_FAN_MIN(nr), data->fan_min[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) static SENSOR_DEVICE_ATTR_RO(fan1_input, fan, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) static SENSOR_DEVICE_ATTR_RW(fan1_min, fan_min, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) static SENSOR_DEVICE_ATTR_RO(fan2_input, fan, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) static SENSOR_DEVICE_ATTR_RW(fan2_min, fan_min, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) static SENSOR_DEVICE_ATTR_RO(fan3_input, fan, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) static SENSOR_DEVICE_ATTR_RW(fan3_min, fan_min, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) /* Fan 3 divisor is locked in H/W */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) static SENSOR_DEVICE_ATTR_RW(fan1_div, fan_div, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) static SENSOR_DEVICE_ATTR_RW(fan2_div, fan_div, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) static SENSOR_DEVICE_ATTR_RO(fan3_div, fan_div, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) /* VID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) static ssize_t cpu0_vid_show(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) struct lm78_data *data = lm78_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) return sprintf(buf, "%d\n", vid_from_reg(data->vid, 82));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) static DEVICE_ATTR_RO(cpu0_vid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) /* Alarms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) static ssize_t alarms_show(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) struct lm78_data *data = lm78_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) return sprintf(buf, "%u\n", data->alarms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) static DEVICE_ATTR_RO(alarms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) static ssize_t alarm_show(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) struct lm78_data *data = lm78_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) int nr = to_sensor_dev_attr(da)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) return sprintf(buf, "%u\n", (data->alarms >> nr) & 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) static SENSOR_DEVICE_ATTR_RO(in0_alarm, alarm, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) static SENSOR_DEVICE_ATTR_RO(in1_alarm, alarm, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) static SENSOR_DEVICE_ATTR_RO(in2_alarm, alarm, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) static SENSOR_DEVICE_ATTR_RO(in3_alarm, alarm, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) static SENSOR_DEVICE_ATTR_RO(in4_alarm, alarm, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) static SENSOR_DEVICE_ATTR_RO(in5_alarm, alarm, 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) static SENSOR_DEVICE_ATTR_RO(in6_alarm, alarm, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) static SENSOR_DEVICE_ATTR_RO(fan1_alarm, alarm, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) static SENSOR_DEVICE_ATTR_RO(fan2_alarm, alarm, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) static SENSOR_DEVICE_ATTR_RO(fan3_alarm, alarm, 11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) static SENSOR_DEVICE_ATTR_RO(temp1_alarm, alarm, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) static struct attribute *lm78_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) &sensor_dev_attr_in0_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) &sensor_dev_attr_in0_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) &sensor_dev_attr_in0_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) &sensor_dev_attr_in0_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) &sensor_dev_attr_in1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) &sensor_dev_attr_in1_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) &sensor_dev_attr_in1_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) &sensor_dev_attr_in1_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) &sensor_dev_attr_in2_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) &sensor_dev_attr_in2_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) &sensor_dev_attr_in2_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) &sensor_dev_attr_in2_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) &sensor_dev_attr_in3_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) &sensor_dev_attr_in3_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) &sensor_dev_attr_in3_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) &sensor_dev_attr_in3_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) &sensor_dev_attr_in4_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) &sensor_dev_attr_in4_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) &sensor_dev_attr_in4_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) &sensor_dev_attr_in4_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) &sensor_dev_attr_in5_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) &sensor_dev_attr_in5_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) &sensor_dev_attr_in5_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) &sensor_dev_attr_in5_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) &sensor_dev_attr_in6_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) &sensor_dev_attr_in6_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) &sensor_dev_attr_in6_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) &sensor_dev_attr_in6_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) &dev_attr_temp1_input.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) &dev_attr_temp1_max.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) &dev_attr_temp1_max_hyst.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) &sensor_dev_attr_temp1_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) &sensor_dev_attr_fan1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) &sensor_dev_attr_fan1_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) &sensor_dev_attr_fan1_div.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) &sensor_dev_attr_fan1_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) &sensor_dev_attr_fan2_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) &sensor_dev_attr_fan2_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) &sensor_dev_attr_fan2_div.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) &sensor_dev_attr_fan2_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) &sensor_dev_attr_fan3_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) &sensor_dev_attr_fan3_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) &sensor_dev_attr_fan3_div.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) &sensor_dev_attr_fan3_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) &dev_attr_alarms.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) &dev_attr_cpu0_vid.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) ATTRIBUTE_GROUPS(lm78);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) * ISA related code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) #ifdef CONFIG_ISA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) /* ISA device, if found */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) static struct platform_device *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) static unsigned short isa_address = 0x290;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) static struct lm78_data *lm78_data_if_isa(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) return pdev ? platform_get_drvdata(pdev) : NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) /* Returns 1 if the I2C chip appears to be an alias of the ISA chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) static int lm78_alias_detect(struct i2c_client *client, u8 chipid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) struct lm78_data *isa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) if (!pdev) /* No ISA chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) isa = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) if (lm78_read_value(isa, LM78_REG_I2C_ADDR) != client->addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) return 0; /* Address doesn't match */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) if ((lm78_read_value(isa, LM78_REG_CHIPID) & 0xfe) != (chipid & 0xfe))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) return 0; /* Chip type doesn't match */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) * We compare all the limit registers, the config register and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) * interrupt mask registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) for (i = 0x2b; i <= 0x3d; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) if (lm78_read_value(isa, i) !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) i2c_smbus_read_byte_data(client, i))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) if (lm78_read_value(isa, LM78_REG_CONFIG) !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) i2c_smbus_read_byte_data(client, LM78_REG_CONFIG))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) for (i = 0x43; i <= 0x46; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) if (lm78_read_value(isa, i) !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) i2c_smbus_read_byte_data(client, i))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) #else /* !CONFIG_ISA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) static int lm78_alias_detect(struct i2c_client *client, u8 chipid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) static struct lm78_data *lm78_data_if_isa(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) #endif /* CONFIG_ISA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) static int lm78_i2c_detect(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) struct i2c_board_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) struct lm78_data *isa = lm78_data_if_isa();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) const char *client_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) struct i2c_adapter *adapter = client->adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) int address = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) * We block updates of the ISA device to minimize the risk of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) * concurrent access to the same LM78 chip through different
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) * interfaces.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) if (isa)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) mutex_lock(&isa->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) if ((i2c_smbus_read_byte_data(client, LM78_REG_CONFIG) & 0x80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) || i2c_smbus_read_byte_data(client, LM78_REG_I2C_ADDR) != address)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) goto err_nodev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) /* Explicitly prevent the misdetection of Winbond chips */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) i = i2c_smbus_read_byte_data(client, 0x4f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) if (i == 0xa3 || i == 0x5c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) goto err_nodev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) /* Determine the chip type. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) i = i2c_smbus_read_byte_data(client, LM78_REG_CHIPID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) if (i == 0x00 || i == 0x20 /* LM78 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) || i == 0x40) /* LM78-J */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) client_name = "lm78";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) else if ((i & 0xfe) == 0xc0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) client_name = "lm79";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) goto err_nodev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) if (lm78_alias_detect(client, i)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) dev_dbg(&adapter->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) "Device at 0x%02x appears to be the same as ISA device\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) goto err_nodev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) if (isa)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) mutex_unlock(&isa->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) strlcpy(info->type, client_name, I2C_NAME_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) err_nodev:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) if (isa)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) mutex_unlock(&isa->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) static const struct i2c_device_id lm78_i2c_id[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) static int lm78_i2c_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) struct lm78_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) data = devm_kzalloc(dev, sizeof(struct lm78_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) data->type = i2c_match_id(lm78_i2c_id, client)->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) /* Initialize the LM78 chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) lm78_init_device(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) data, lm78_groups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) return PTR_ERR_OR_ZERO(hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) static const struct i2c_device_id lm78_i2c_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) { "lm78", lm78 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) { "lm79", lm79 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) MODULE_DEVICE_TABLE(i2c, lm78_i2c_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) static struct i2c_driver lm78_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) .class = I2C_CLASS_HWMON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) .name = "lm78",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) .probe_new = lm78_i2c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) .id_table = lm78_i2c_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) .detect = lm78_i2c_detect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) .address_list = normal_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) * The SMBus locks itself, but ISA access must be locked explicitly!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) * We don't want to lock the whole ISA bus, so we lock each client
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) * separately.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) * We ignore the LM78 BUSY flag at this moment - it could lead to deadlocks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) * would slow down the LM78 access and should not be necessary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) static int lm78_read_value(struct lm78_data *data, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) #ifdef CONFIG_ISA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) if (!client) { /* ISA device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) int res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) outb_p(reg, data->isa_addr + LM78_ADDR_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) res = inb_p(data->isa_addr + LM78_DATA_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) return i2c_smbus_read_byte_data(client, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) static int lm78_write_value(struct lm78_data *data, u8 reg, u8 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) #ifdef CONFIG_ISA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) if (!client) { /* ISA device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) outb_p(reg, data->isa_addr + LM78_ADDR_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) outb_p(value, data->isa_addr + LM78_DATA_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) return i2c_smbus_write_byte_data(client, reg, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) static void lm78_init_device(struct lm78_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) u8 config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) /* Start monitoring */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) config = lm78_read_value(data, LM78_REG_CONFIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) if ((config & 0x09) != 0x01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) lm78_write_value(data, LM78_REG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) (config & 0xf7) | 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) /* A few vars need to be filled upon startup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) for (i = 0; i < 3; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) data->fan_min[i] = lm78_read_value(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) LM78_REG_FAN_MIN(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) mutex_init(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) static struct lm78_data *lm78_update_device(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) struct lm78_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) || !data->valid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) dev_dbg(dev, "Starting lm78 update\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) for (i = 0; i <= 6; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) data->in[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) lm78_read_value(data, LM78_REG_IN(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) data->in_min[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) lm78_read_value(data, LM78_REG_IN_MIN(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) data->in_max[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) lm78_read_value(data, LM78_REG_IN_MAX(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) for (i = 0; i < 3; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) data->fan[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) lm78_read_value(data, LM78_REG_FAN(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) data->fan_min[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) lm78_read_value(data, LM78_REG_FAN_MIN(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) data->temp = lm78_read_value(data, LM78_REG_TEMP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) data->temp_over =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) lm78_read_value(data, LM78_REG_TEMP_OVER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) data->temp_hyst =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) lm78_read_value(data, LM78_REG_TEMP_HYST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) i = lm78_read_value(data, LM78_REG_VID_FANDIV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) data->vid = i & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) if (data->type == lm79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) data->vid |=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) (lm78_read_value(data, LM78_REG_CHIPID) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) 0x01) << 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) data->vid |= 0x10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) data->fan_div[0] = (i >> 4) & 0x03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) data->fan_div[1] = i >> 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) data->alarms = lm78_read_value(data, LM78_REG_ALARM1) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) (lm78_read_value(data, LM78_REG_ALARM2) << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) data->last_updated = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) data->valid = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) data->fan_div[2] = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) return data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) #ifdef CONFIG_ISA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) static int lm78_isa_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) struct lm78_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) /* Reserve the ISA region */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) res = platform_get_resource(pdev, IORESOURCE_IO, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) if (!devm_request_region(dev, res->start + LM78_ADDR_REG_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) 2, "lm78"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) data = devm_kzalloc(dev, sizeof(struct lm78_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) mutex_init(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) data->isa_addr = res->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) platform_set_drvdata(pdev, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) if (lm78_read_value(data, LM78_REG_CHIPID) & 0x80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) data->type = lm79;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) data->name = "lm79";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) data->type = lm78;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) data->name = "lm78";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) /* Initialize the LM78 chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) lm78_init_device(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) data, lm78_groups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) return PTR_ERR_OR_ZERO(hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) static struct platform_driver lm78_isa_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) .name = "lm78",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) .probe = lm78_isa_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) /* return 1 if a supported chip is found, 0 otherwise */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) static int __init lm78_isa_found(unsigned short address)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) int val, save, found = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) int port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) * Some boards declare base+0 to base+7 as a PNP device, some base+4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) * to base+7 and some base+5 to base+6. So we better request each port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) * individually for the probing phase.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) for (port = address; port < address + LM78_EXTENT; port++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) if (!request_region(port, 1, "lm78")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) pr_debug("Failed to request port 0x%x\n", port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) goto release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) #define REALLY_SLOW_IO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) * We need the timeouts for at least some LM78-like
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) * chips. But only if we read 'undefined' registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) val = inb_p(address + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) if (inb_p(address + 2) != val
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) || inb_p(address + 3) != val
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) || inb_p(address + 7) != val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) goto release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) #undef REALLY_SLOW_IO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) * We should be able to change the 7 LSB of the address port. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) * MSB (busy flag) should be clear initially, set after the write.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) save = inb_p(address + LM78_ADDR_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) if (save & 0x80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) goto release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) val = ~save & 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) outb_p(val, address + LM78_ADDR_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) if (inb_p(address + LM78_ADDR_REG_OFFSET) != (val | 0x80)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) outb_p(save, address + LM78_ADDR_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) goto release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) /* We found a device, now see if it could be an LM78 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) outb_p(LM78_REG_CONFIG, address + LM78_ADDR_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) val = inb_p(address + LM78_DATA_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) if (val & 0x80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) goto release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) outb_p(LM78_REG_I2C_ADDR, address + LM78_ADDR_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) val = inb_p(address + LM78_DATA_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) if (val < 0x03 || val > 0x77) /* Not a valid I2C address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) goto release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) /* The busy flag should be clear again */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) if (inb_p(address + LM78_ADDR_REG_OFFSET) & 0x80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) goto release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) /* Explicitly prevent the misdetection of Winbond chips */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) outb_p(0x4f, address + LM78_ADDR_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) val = inb_p(address + LM78_DATA_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) if (val == 0xa3 || val == 0x5c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) goto release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) /* Explicitly prevent the misdetection of ITE chips */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) outb_p(0x58, address + LM78_ADDR_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) val = inb_p(address + LM78_DATA_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) if (val == 0x90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) goto release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) /* Determine the chip type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) outb_p(LM78_REG_CHIPID, address + LM78_ADDR_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) val = inb_p(address + LM78_DATA_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) if (val == 0x00 || val == 0x20 /* LM78 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) || val == 0x40 /* LM78-J */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) || (val & 0xfe) == 0xc0) /* LM79 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) found = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) if (found)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) pr_info("Found an %s chip at %#x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) val & 0x80 ? "LM79" : "LM78", (int)address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) release:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) for (port--; port >= address; port--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) release_region(port, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) return found;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) static int __init lm78_isa_device_add(unsigned short address)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) struct resource res = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) .start = address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) .end = address + LM78_EXTENT - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) .name = "lm78",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) .flags = IORESOURCE_IO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) pdev = platform_device_alloc("lm78", address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) if (!pdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) err = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) pr_err("Device allocation failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) err = platform_device_add_resources(pdev, &res, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) pr_err("Device resource addition failed (%d)\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) goto exit_device_put;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) err = platform_device_add(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) pr_err("Device addition failed (%d)\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) goto exit_device_put;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) exit_device_put:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) platform_device_put(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) pdev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) static int __init lm78_isa_register(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) int res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) if (lm78_isa_found(isa_address)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) res = platform_driver_register(&lm78_isa_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) if (res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) /* Sets global pdev as a side effect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) res = lm78_isa_device_add(isa_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) if (res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) goto exit_unreg_isa_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) exit_unreg_isa_driver:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) platform_driver_unregister(&lm78_isa_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) static void lm78_isa_unregister(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) if (pdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) platform_device_unregister(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) platform_driver_unregister(&lm78_isa_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) #else /* !CONFIG_ISA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) static int __init lm78_isa_register(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) static void lm78_isa_unregister(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) #endif /* CONFIG_ISA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) static int __init sm_lm78_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) int res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) * We register the ISA device first, so that we can skip the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) * registration of an I2C interface to the same device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) res = lm78_isa_register();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) if (res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) res = i2c_add_driver(&lm78_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) if (res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) goto exit_unreg_isa_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) exit_unreg_isa_device:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) lm78_isa_unregister();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) static void __exit sm_lm78_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) lm78_isa_unregister();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) i2c_del_driver(&lm78_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) MODULE_AUTHOR("Frodo Looijaard, Jean Delvare <jdelvare@suse.de>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) MODULE_DESCRIPTION("LM78/LM79 driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) module_init(sm_lm78_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) module_exit(sm_lm78_exit);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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