^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Driver for Texas Instruments INA219, INA226 power monitor chips
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * INA219:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Zero Drift Bi-Directional Current/Power Monitor with I2C Interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Datasheet: https://www.ti.com/product/ina219
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * INA220:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Bi-Directional Current/Power Monitor with I2C Interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Datasheet: https://www.ti.com/product/ina220
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * INA226:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * Bi-Directional Current/Power Monitor with I2C Interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * Datasheet: https://www.ti.com/product/ina226
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * INA230:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * Bi-directional Current/Power Monitor with I2C Interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * Datasheet: https://www.ti.com/product/ina230
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * Copyright (C) 2012 Lothar Felten <lothar.felten@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * Thanks to Jan Volkering
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/hwmon-sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/util_macros.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <linux/platform_data/ina2xx.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* common register definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define INA2XX_CONFIG 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define INA2XX_SHUNT_VOLTAGE 0x01 /* readonly */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define INA2XX_BUS_VOLTAGE 0x02 /* readonly */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define INA2XX_POWER 0x03 /* readonly */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define INA2XX_CURRENT 0x04 /* readonly */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define INA2XX_CALIBRATION 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /* INA226 register definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define INA226_MASK_ENABLE 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define INA226_ALERT_LIMIT 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define INA226_DIE_ID 0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* register count */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define INA219_REGISTERS 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define INA226_REGISTERS 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define INA2XX_MAX_REGISTERS 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* settings - depend on use case */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define INA219_CONFIG_DEFAULT 0x399F /* PGA=8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define INA226_CONFIG_DEFAULT 0x4527 /* averages=16 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /* worst case is 68.10 ms (~14.6Hz, ina219) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define INA2XX_CONVERSION_RATE 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define INA2XX_MAX_DELAY 69 /* worst case delay in ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define INA2XX_RSHUNT_DEFAULT 10000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* bit mask for reading the averaging setting in the configuration register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define INA226_AVG_RD_MASK 0x0E00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define INA226_READ_AVG(reg) (((reg) & INA226_AVG_RD_MASK) >> 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define INA226_SHIFT_AVG(val) ((val) << 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /* bit number of alert functions in Mask/Enable Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define INA226_SHUNT_OVER_VOLTAGE_BIT 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define INA226_SHUNT_UNDER_VOLTAGE_BIT 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define INA226_BUS_OVER_VOLTAGE_BIT 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define INA226_BUS_UNDER_VOLTAGE_BIT 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define INA226_POWER_OVER_LIMIT_BIT 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /* bit mask for alert config bits of Mask/Enable Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define INA226_ALERT_CONFIG_MASK 0xFC00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define INA226_ALERT_FUNCTION_FLAG BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) /* common attrs, ina226 attrs and NULL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define INA2XX_MAX_ATTRIBUTE_GROUPS 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * Both bus voltage and shunt voltage conversion times for ina226 are set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * to 0b0100 on POR, which translates to 2200 microseconds in total.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define INA226_TOTAL_CONV_TIME_DEFAULT 2200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static struct regmap_config ina2xx_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .val_bits = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) enum ina2xx_ids { ina219, ina226 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct ina2xx_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) u16 config_default;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) int calibration_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) int registers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) int shunt_div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) int bus_voltage_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) int bus_voltage_lsb; /* uV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) int power_lsb_factor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct ina2xx_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) const struct ina2xx_config *config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) long rshunt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) long current_lsb_uA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) long power_lsb_uW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct mutex config_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) const struct attribute_group *groups[INA2XX_MAX_ATTRIBUTE_GROUPS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static const struct ina2xx_config ina2xx_config[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) [ina219] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .config_default = INA219_CONFIG_DEFAULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .calibration_value = 4096,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .registers = INA219_REGISTERS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .shunt_div = 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .bus_voltage_shift = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .bus_voltage_lsb = 4000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .power_lsb_factor = 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) [ina226] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .config_default = INA226_CONFIG_DEFAULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .calibration_value = 2048,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .registers = INA226_REGISTERS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .shunt_div = 400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .bus_voltage_shift = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .bus_voltage_lsb = 1250,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .power_lsb_factor = 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) * Available averaging rates for ina226. The indices correspond with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) * the bit values expected by the chip (according to the ina226 datasheet,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) * table 3 AVG bit settings, found at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) * https://www.ti.com/lit/ds/symlink/ina226.pdf.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static const int ina226_avg_tab[] = { 1, 4, 16, 64, 128, 256, 512, 1024 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static int ina226_reg_to_interval(u16 config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) int avg = ina226_avg_tab[INA226_READ_AVG(config)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) * Multiply the total conversion time by the number of averages.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * Return the result in milliseconds.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return DIV_ROUND_CLOSEST(avg * INA226_TOTAL_CONV_TIME_DEFAULT, 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) * Return the new, shifted AVG field value of CONFIG register,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) * to use with regmap_update_bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static u16 ina226_interval_to_reg(int interval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) int avg, avg_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) avg = DIV_ROUND_CLOSEST(interval * 1000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) INA226_TOTAL_CONV_TIME_DEFAULT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) avg_bits = find_closest(avg, ina226_avg_tab,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) ARRAY_SIZE(ina226_avg_tab));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) return INA226_SHIFT_AVG(avg_bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * Calibration register is set to the best value, which eliminates
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) * truncation errors on calculating current register in hardware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * According to datasheet (eq. 3) the best values are 2048 for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) * ina226 and 4096 for ina219. They are hardcoded as calibration_value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static int ina2xx_calibrate(struct ina2xx_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) return regmap_write(data->regmap, INA2XX_CALIBRATION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) data->config->calibration_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) * Initialize the configuration and calibration registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static int ina2xx_init(struct ina2xx_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) int ret = regmap_write(data->regmap, INA2XX_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) data->config->config_default);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) return ina2xx_calibrate(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static int ina2xx_read_reg(struct device *dev, int reg, unsigned int *regval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) struct ina2xx_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) int ret, retry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) dev_dbg(dev, "Starting register %d read\n", reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) for (retry = 5; retry; retry--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) ret = regmap_read(data->regmap, reg, regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) dev_dbg(dev, "read %d, val = 0x%04x\n", reg, *regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) * If the current value in the calibration register is 0, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) * power and current registers will also remain at 0. In case
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) * the chip has been reset let's check the calibration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) * register and reinitialize if needed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) * We do that extra read of the calibration register if there
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) * is some hint of a chip reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) if (*regval == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) unsigned int cal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) ret = regmap_read(data->regmap, INA2XX_CALIBRATION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) &cal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) if (cal == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) dev_warn(dev, "chip not calibrated, reinitializing\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) ret = ina2xx_init(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) * Let's make sure the power and current
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) * registers have been updated before trying
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) * again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) msleep(INA2XX_MAX_DELAY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) * If we're here then although all write operations succeeded, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) * chip still returns 0 in the calibration register. Nothing more we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) * can do here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) dev_err(dev, "unable to reinitialize the chip\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static int ina2xx_get_value(struct ina2xx_data *data, u8 reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) unsigned int regval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) case INA2XX_SHUNT_VOLTAGE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) /* signed register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) val = DIV_ROUND_CLOSEST((s16)regval, data->config->shunt_div);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) case INA2XX_BUS_VOLTAGE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) val = (regval >> data->config->bus_voltage_shift)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) * data->config->bus_voltage_lsb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) val = DIV_ROUND_CLOSEST(val, 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) case INA2XX_POWER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) val = regval * data->power_lsb_uW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) case INA2XX_CURRENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) /* signed register, result in mA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) val = (s16)regval * data->current_lsb_uA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) val = DIV_ROUND_CLOSEST(val, 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) case INA2XX_CALIBRATION:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) val = regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) /* programmer goofed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) WARN_ON_ONCE(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) static ssize_t ina2xx_value_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) struct device_attribute *da, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) struct ina2xx_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) unsigned int regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) int err = ina2xx_read_reg(dev, attr->index, ®val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) return snprintf(buf, PAGE_SIZE, "%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) ina2xx_get_value(data, attr->index, regval));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) static int ina226_reg_to_alert(struct ina2xx_data *data, u8 bit, u16 regval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) switch (bit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) case INA226_SHUNT_OVER_VOLTAGE_BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) case INA226_SHUNT_UNDER_VOLTAGE_BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) reg = INA2XX_SHUNT_VOLTAGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) case INA226_BUS_OVER_VOLTAGE_BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) case INA226_BUS_UNDER_VOLTAGE_BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) reg = INA2XX_BUS_VOLTAGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) case INA226_POWER_OVER_LIMIT_BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) reg = INA2XX_POWER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) /* programmer goofed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) WARN_ON_ONCE(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) return ina2xx_get_value(data, reg, regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) * Turns alert limit values into register values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) * Opposite of the formula in ina2xx_get_value().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) static s16 ina226_alert_to_reg(struct ina2xx_data *data, u8 bit, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) switch (bit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) case INA226_SHUNT_OVER_VOLTAGE_BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) case INA226_SHUNT_UNDER_VOLTAGE_BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) val *= data->config->shunt_div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) return clamp_val(val, SHRT_MIN, SHRT_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) case INA226_BUS_OVER_VOLTAGE_BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) case INA226_BUS_UNDER_VOLTAGE_BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) val = (val * 1000) << data->config->bus_voltage_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) val = DIV_ROUND_CLOSEST(val, data->config->bus_voltage_lsb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) return clamp_val(val, 0, SHRT_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) case INA226_POWER_OVER_LIMIT_BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) val = DIV_ROUND_CLOSEST(val, data->power_lsb_uW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) return clamp_val(val, 0, USHRT_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) /* programmer goofed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) WARN_ON_ONCE(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) static ssize_t ina226_alert_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) struct device_attribute *da, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) struct ina2xx_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) int regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) int val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) mutex_lock(&data->config_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) ret = regmap_read(data->regmap, INA226_MASK_ENABLE, ®val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) goto abort;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) if (regval & BIT(attr->index)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) ret = regmap_read(data->regmap, INA226_ALERT_LIMIT, ®val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) goto abort;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) val = ina226_reg_to_alert(data, attr->index, regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) ret = snprintf(buf, PAGE_SIZE, "%d\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) abort:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) mutex_unlock(&data->config_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) static ssize_t ina226_alert_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) struct ina2xx_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) ret = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) * Clear all alerts first to avoid accidentally triggering ALERT pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) * due to register write sequence. Then, only enable the alert
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) * if the value is non-zero.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) mutex_lock(&data->config_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) ret = regmap_update_bits(data->regmap, INA226_MASK_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) INA226_ALERT_CONFIG_MASK, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) goto abort;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) ret = regmap_write(data->regmap, INA226_ALERT_LIMIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) ina226_alert_to_reg(data, attr->index, val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) goto abort;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) if (val != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) ret = regmap_update_bits(data->regmap, INA226_MASK_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) INA226_ALERT_CONFIG_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) BIT(attr->index));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) goto abort;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) ret = count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) abort:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) mutex_unlock(&data->config_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) static ssize_t ina226_alarm_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) struct device_attribute *da, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) struct ina2xx_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) int regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) int alarm = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) ret = regmap_read(data->regmap, INA226_MASK_ENABLE, ®val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) alarm = (regval & BIT(attr->index)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) (regval & INA226_ALERT_FUNCTION_FLAG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) return snprintf(buf, PAGE_SIZE, "%d\n", alarm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) * In order to keep calibration register value fixed, the product
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) * of current_lsb and shunt_resistor should also be fixed and equal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) * to shunt_voltage_lsb = 1 / shunt_div multiplied by 10^9 in order
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) * to keep the scale.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) static int ina2xx_set_shunt(struct ina2xx_data *data, long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) unsigned int dividend = DIV_ROUND_CLOSEST(1000000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) data->config->shunt_div);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) if (val <= 0 || val > dividend)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) mutex_lock(&data->config_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) data->rshunt = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) data->current_lsb_uA = DIV_ROUND_CLOSEST(dividend, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) data->power_lsb_uW = data->config->power_lsb_factor *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) data->current_lsb_uA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) mutex_unlock(&data->config_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) static ssize_t ina2xx_shunt_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) struct device_attribute *da, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) struct ina2xx_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) return snprintf(buf, PAGE_SIZE, "%li\n", data->rshunt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) static ssize_t ina2xx_shunt_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) struct ina2xx_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) status = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) status = ina2xx_set_shunt(data, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) static ssize_t ina226_interval_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) struct ina2xx_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) status = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) if (val > INT_MAX || val == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) status = regmap_update_bits(data->regmap, INA2XX_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) INA226_AVG_RD_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) ina226_interval_to_reg(val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) static ssize_t ina226_interval_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) struct device_attribute *da, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) struct ina2xx_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) unsigned int regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) status = regmap_read(data->regmap, INA2XX_CONFIG, ®val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) return snprintf(buf, PAGE_SIZE, "%d\n", ina226_reg_to_interval(regval));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) /* shunt voltage */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) static SENSOR_DEVICE_ATTR_RO(in0_input, ina2xx_value, INA2XX_SHUNT_VOLTAGE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) /* shunt voltage over/under voltage alert setting and alarm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) static SENSOR_DEVICE_ATTR_RW(in0_crit, ina226_alert,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) INA226_SHUNT_OVER_VOLTAGE_BIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) static SENSOR_DEVICE_ATTR_RW(in0_lcrit, ina226_alert,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) INA226_SHUNT_UNDER_VOLTAGE_BIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) static SENSOR_DEVICE_ATTR_RO(in0_crit_alarm, ina226_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) INA226_SHUNT_OVER_VOLTAGE_BIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) static SENSOR_DEVICE_ATTR_RO(in0_lcrit_alarm, ina226_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) INA226_SHUNT_UNDER_VOLTAGE_BIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) /* bus voltage */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) static SENSOR_DEVICE_ATTR_RO(in1_input, ina2xx_value, INA2XX_BUS_VOLTAGE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) /* bus voltage over/under voltage alert setting and alarm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) static SENSOR_DEVICE_ATTR_RW(in1_crit, ina226_alert,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) INA226_BUS_OVER_VOLTAGE_BIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) static SENSOR_DEVICE_ATTR_RW(in1_lcrit, ina226_alert,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) INA226_BUS_UNDER_VOLTAGE_BIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) static SENSOR_DEVICE_ATTR_RO(in1_crit_alarm, ina226_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) INA226_BUS_OVER_VOLTAGE_BIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) static SENSOR_DEVICE_ATTR_RO(in1_lcrit_alarm, ina226_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) INA226_BUS_UNDER_VOLTAGE_BIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) /* calculated current */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) static SENSOR_DEVICE_ATTR_RO(curr1_input, ina2xx_value, INA2XX_CURRENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) /* calculated power */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) static SENSOR_DEVICE_ATTR_RO(power1_input, ina2xx_value, INA2XX_POWER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) /* over-limit power alert setting and alarm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) static SENSOR_DEVICE_ATTR_RW(power1_crit, ina226_alert,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) INA226_POWER_OVER_LIMIT_BIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) static SENSOR_DEVICE_ATTR_RO(power1_crit_alarm, ina226_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) INA226_POWER_OVER_LIMIT_BIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) /* shunt resistance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) static SENSOR_DEVICE_ATTR_RW(shunt_resistor, ina2xx_shunt, INA2XX_CALIBRATION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) /* update interval (ina226 only) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) static SENSOR_DEVICE_ATTR_RW(update_interval, ina226_interval, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) /* pointers to created device attributes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) static struct attribute *ina2xx_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) &sensor_dev_attr_in0_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) &sensor_dev_attr_in1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) &sensor_dev_attr_curr1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) &sensor_dev_attr_power1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) &sensor_dev_attr_shunt_resistor.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) static const struct attribute_group ina2xx_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) .attrs = ina2xx_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) static struct attribute *ina226_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) &sensor_dev_attr_in0_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) &sensor_dev_attr_in0_lcrit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) &sensor_dev_attr_in0_crit_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) &sensor_dev_attr_in0_lcrit_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) &sensor_dev_attr_in1_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) &sensor_dev_attr_in1_lcrit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) &sensor_dev_attr_in1_crit_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) &sensor_dev_attr_in1_lcrit_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) &sensor_dev_attr_power1_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) &sensor_dev_attr_power1_crit_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) &sensor_dev_attr_update_interval.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) static const struct attribute_group ina226_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) .attrs = ina226_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) static const struct i2c_device_id ina2xx_id[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) static int ina2xx_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) struct ina2xx_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) int ret, group = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) enum ina2xx_ids chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) if (client->dev.of_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) chip = (enum ina2xx_ids)of_device_get_match_data(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) chip = i2c_match_id(ina2xx_id, client)->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) /* set the device type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) data->config = &ina2xx_config[chip];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) mutex_init(&data->config_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) if (of_property_read_u32(dev->of_node, "shunt-resistor", &val) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) struct ina2xx_platform_data *pdata = dev_get_platdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) if (pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) val = pdata->shunt_uohms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) val = INA2XX_RSHUNT_DEFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) ina2xx_set_shunt(data, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) ina2xx_regmap_config.max_register = data->config->registers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) data->regmap = devm_regmap_init_i2c(client, &ina2xx_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) if (IS_ERR(data->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) dev_err(dev, "failed to allocate register map\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) return PTR_ERR(data->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) ret = ina2xx_init(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) dev_err(dev, "error configuring the device: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) data->groups[group++] = &ina2xx_group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) if (chip == ina226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) data->groups[group++] = &ina226_group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) data, data->groups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) if (IS_ERR(hwmon_dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) return PTR_ERR(hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) dev_info(dev, "power monitor %s (Rshunt = %li uOhm)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) client->name, data->rshunt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) static const struct i2c_device_id ina2xx_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) { "ina219", ina219 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) { "ina220", ina219 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) { "ina226", ina226 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) { "ina230", ina226 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) { "ina231", ina226 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) MODULE_DEVICE_TABLE(i2c, ina2xx_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) static const struct of_device_id __maybe_unused ina2xx_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) .compatible = "ti,ina219",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) .data = (void *)ina219
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) .compatible = "ti,ina220",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) .data = (void *)ina219
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) .compatible = "ti,ina226",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) .data = (void *)ina226
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) .compatible = "ti,ina230",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) .data = (void *)ina226
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) .compatible = "ti,ina231",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) .data = (void *)ina226
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) MODULE_DEVICE_TABLE(of, ina2xx_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) static struct i2c_driver ina2xx_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) .name = "ina2xx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) .of_match_table = of_match_ptr(ina2xx_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) .probe_new = ina2xx_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) .id_table = ina2xx_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) module_i2c_driver(ina2xx_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) MODULE_AUTHOR("Lothar Felten <l-felten@ti.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) MODULE_DESCRIPTION("ina2xx driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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