^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * i5500_temp - Driver for Intel 5500/5520/X58 chipset thermal sensor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2012, 2014 Jean Delvare <jdelvare@suse.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/hwmon-sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /* Register definitions from datasheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define REG_TSTHRCATA 0xE2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define REG_TSCTRL 0xE8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define REG_TSTHRRPEX 0xEB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define REG_TSTHRLO 0xEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define REG_TSTHRHI 0xEE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define REG_CTHINT 0xF0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define REG_TSFSC 0xF3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define REG_CTSTS 0xF4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define REG_TSTHRRQPI 0xF5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define REG_CTCTRL 0xF7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define REG_TSTIMER 0xF8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * Sysfs stuff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* Sensor resolution : 0.5 degree C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static ssize_t temp1_input_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct pci_dev *pdev = to_pci_dev(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) long temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) u16 tsthrhi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) s8 tsfsc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) pci_read_config_word(pdev, REG_TSTHRHI, &tsthrhi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) pci_read_config_byte(pdev, REG_TSFSC, &tsfsc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) temp = ((long)tsthrhi - tsfsc) * 500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) return sprintf(buf, "%ld\n", temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static ssize_t thresh_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct pci_dev *pdev = to_pci_dev(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) int reg = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) long temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) u16 tsthr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) pci_read_config_word(pdev, reg, &tsthr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) temp = tsthr * 500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return sprintf(buf, "%ld\n", temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static ssize_t alarm_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct pci_dev *pdev = to_pci_dev(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) int nr = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) u8 ctsts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) pci_read_config_byte(pdev, REG_CTSTS, &ctsts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return sprintf(buf, "%u\n", (unsigned int)ctsts & (1 << nr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) static DEVICE_ATTR_RO(temp1_input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static SENSOR_DEVICE_ATTR_RO(temp1_crit, thresh, 0xE2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static SENSOR_DEVICE_ATTR_RO(temp1_max_hyst, thresh, 0xEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static SENSOR_DEVICE_ATTR_RO(temp1_max, thresh, 0xEE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static SENSOR_DEVICE_ATTR_RO(temp1_crit_alarm, alarm, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static SENSOR_DEVICE_ATTR_RO(temp1_max_alarm, alarm, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static struct attribute *i5500_temp_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) &dev_attr_temp1_input.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) &sensor_dev_attr_temp1_crit.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) &sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) &sensor_dev_attr_temp1_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) ATTRIBUTE_GROUPS(i5500_temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static const struct pci_device_id i5500_temp_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x3438) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) { 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) MODULE_DEVICE_TABLE(pci, i5500_temp_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static int i5500_temp_probe(struct pci_dev *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) const struct pci_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) u32 tstimer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) s8 tsfsc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) err = pci_enable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) dev_err(&pdev->dev, "Failed to enable device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) pci_read_config_byte(pdev, REG_TSFSC, &tsfsc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) pci_read_config_dword(pdev, REG_TSTIMER, &tstimer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) if (tsfsc == 0x7F && tstimer == 0x07D30D40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) dev_notice(&pdev->dev, "Sensor seems to be disabled\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) hwmon_dev = devm_hwmon_device_register_with_groups(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) "intel5500", NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) i5500_temp_groups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return PTR_ERR_OR_ZERO(hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static struct pci_driver i5500_temp_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .name = "i5500_temp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .id_table = i5500_temp_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .probe = i5500_temp_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) module_pci_driver(i5500_temp_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) MODULE_DESCRIPTION("Intel 5500/5520/X58 chipset thermal sensor driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) MODULE_LICENSE("GPL");