^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * f71805f.c - driver for the Fintek F71805F/FG and F71872F/FG Super-I/O
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * chips integrated hardware monitoring features
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2005-2006 Jean Delvare <jdelvare@suse.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * complete hardware monitoring features: voltage, fan and temperature
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * sensors, and manual and automatic fan speed control.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * The F71872F/FG is almost the same, with two more voltages monitored,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * and 6 VID inputs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * The F71806F/FG is essentially the same as the F71872F/FG. It even has
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * the same chip ID, so the driver can't differentiate between.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/hwmon-sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static unsigned short force_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) module_param(force_id, ushort, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) MODULE_PARM_DESC(force_id, "Override the detected device ID");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static struct platform_device *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define DRVNAME "f71805f"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) enum kinds { f71805f, f71872f };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * Super-I/O constants and functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define F71805F_LD_HWM 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define SIO_REG_LDSEL 0x07 /* Logical device select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define SIO_REG_DEVREV 0x22 /* Device revision */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define SIO_REG_FNSEL1 0x29 /* Multi Function Select 1 (F71872F) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define SIO_REG_ENABLE 0x30 /* Logical device enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define SIO_FINTEK_ID 0x1934
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define SIO_F71805F_ID 0x0406
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define SIO_F71872F_ID 0x0341
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) superio_inb(int base, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) outb(reg, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return inb(base + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) superio_inw(int base, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) outb(reg++, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) val = inb(base + 1) << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) outb(reg, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) val |= inb(base + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) superio_select(int base, int ld)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) outb(SIO_REG_LDSEL, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) outb(ld, base + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) superio_enter(int base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (!request_muxed_region(base, 2, DRVNAME))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) outb(0x87, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) outb(0x87, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) superio_exit(int base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) outb(0xaa, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) release_region(base, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * ISA constants
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define REGION_LENGTH 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define ADDR_REG_OFFSET 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define DATA_REG_OFFSET 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * Registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* in nr from 0 to 10 (8-bit values) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define F71805F_REG_IN(nr) (0x10 + (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define F71805F_REG_IN_HIGH(nr) ((nr) < 10 ? 0x40 + 2 * (nr) : 0x2E)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define F71805F_REG_IN_LOW(nr) ((nr) < 10 ? 0x41 + 2 * (nr) : 0x2F)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /* fan nr from 0 to 2 (12-bit values, two registers) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define F71805F_REG_FAN(nr) (0x20 + 2 * (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define F71805F_REG_FAN_LOW(nr) (0x28 + 2 * (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define F71805F_REG_FAN_TARGET(nr) (0x69 + 16 * (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define F71805F_REG_FAN_CTRL(nr) (0x60 + 16 * (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define F71805F_REG_PWM_FREQ(nr) (0x63 + 16 * (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define F71805F_REG_PWM_DUTY(nr) (0x6B + 16 * (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /* temp nr from 0 to 2 (8-bit values) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define F71805F_REG_TEMP(nr) (0x1B + (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define F71805F_REG_TEMP_MODE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /* pwm/fan pwmnr from 0 to 2, auto point apnr from 0 to 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /* map Fintek numbers to our numbers as follows: 9->0, 5->1, 1->2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) (0xA0 + 0x10 * (pwmnr) + (2 - (apnr)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) (0xA4 + 0x10 * (pwmnr) + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 2 * (2 - (apnr)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #define F71805F_REG_START 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /* status nr from 0 to 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define F71805F_REG_STATUS(nr) (0x36 + (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /* individual register bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define FAN_CTRL_DC_MODE 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define FAN_CTRL_LATCH_FULL 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define FAN_CTRL_MODE_MASK 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define FAN_CTRL_MODE_SPEED 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define FAN_CTRL_MODE_TEMPERATURE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define FAN_CTRL_MODE_MANUAL 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * Data structures and manipulation thereof
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) struct f71805f_auto_point {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) u8 temp[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) u16 fan[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) struct f71805f_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) unsigned short addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) struct mutex update_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) char valid; /* !=0 if following fields are valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) unsigned long last_updated; /* In jiffies */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) unsigned long last_limits; /* In jiffies */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) /* Register values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) u8 in[11];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) u8 in_high[11];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) u8 in_low[11];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) u16 has_in;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) u16 fan[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) u16 fan_low[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) u16 fan_target[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) u8 fan_ctrl[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) u8 pwm[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) u8 pwm_freq[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) u8 temp[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) u8 temp_high[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) u8 temp_hyst[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) u8 temp_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) unsigned long alarms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) struct f71805f_auto_point auto_points[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) struct f71805f_sio_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) enum kinds kind;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) u8 fnsel1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static inline long in_from_reg(u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) return reg * 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) /* The 2 least significant bits are not used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) static inline u8 in_to_reg(long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) if (val <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) if (val >= 2016)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) return 0xfc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) return ((val + 16) / 32) << 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) /* in0 is downscaled by a factor 2 internally */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) static inline long in0_from_reg(u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) return reg * 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static inline u8 in0_to_reg(long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) if (val <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) if (val >= 4032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) return 0xfc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) return ((val + 32) / 64) << 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) /* The 4 most significant bits are not used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) static inline long fan_from_reg(u16 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) reg &= 0xfff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) if (!reg || reg == 0xfff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) return 1500000 / reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) static inline u16 fan_to_reg(long rpm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) * If the low limit is set below what the chip can measure,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) * store the largest possible 12-bit value in the registers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) * so that no alarm will ever trigger.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) if (rpm < 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) return 0xfff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) return 1500000 / rpm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) static inline unsigned long pwm_freq_from_reg(u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) unsigned long clock = (reg & 0x80) ? 48000000UL : 1000000UL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) reg &= 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (reg == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) reg++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) return clock / (reg << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) static inline u8 pwm_freq_to_reg(unsigned long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) if (val >= 187500) /* The highest we can do */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) return 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) if (val >= 1475) /* Use 48 MHz clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) return 0x80 | (48000000UL / (val << 8));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) if (val < 31) /* The lowest we can do */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) return 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) else /* Use 1 MHz clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) return 1000000UL / (val << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) static inline int pwm_mode_from_reg(u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) return !(reg & FAN_CTRL_DC_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) static inline long temp_from_reg(u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) return reg * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) static inline u8 temp_to_reg(long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) if (val <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) if (val >= 1000 * 0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) return 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) return (val + 500) / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) * Device I/O access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) /* Must be called with data->update_lock held, except during initialization */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) static u8 f71805f_read8(struct f71805f_data *data, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) outb(reg, data->addr + ADDR_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) return inb(data->addr + DATA_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) /* Must be called with data->update_lock held, except during initialization */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) outb(reg, data->addr + ADDR_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) outb(val, data->addr + DATA_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) * It is important to read the MSB first, because doing so latches the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) * value of the LSB, so we are sure both bytes belong to the same value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) * Must be called with data->update_lock held, except during initialization
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) static u16 f71805f_read16(struct f71805f_data *data, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) u16 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) outb(reg, data->addr + ADDR_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) val = inb(data->addr + DATA_REG_OFFSET) << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) outb(++reg, data->addr + ADDR_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) val |= inb(data->addr + DATA_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) /* Must be called with data->update_lock held, except during initialization */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) outb(reg, data->addr + ADDR_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) outb(val >> 8, data->addr + DATA_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) outb(++reg, data->addr + ADDR_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) outb(val & 0xff, data->addr + DATA_REG_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) static struct f71805f_data *f71805f_update_device(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) struct f71805f_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) int nr, apnr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) /* Limit registers cache is refreshed after 60 seconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) if (time_after(jiffies, data->last_updated + 60 * HZ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) || !data->valid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) for (nr = 0; nr < 11; nr++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) if (!(data->has_in & (1 << nr)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) data->in_high[nr] = f71805f_read8(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) F71805F_REG_IN_HIGH(nr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) data->in_low[nr] = f71805f_read8(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) F71805F_REG_IN_LOW(nr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) for (nr = 0; nr < 3; nr++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) data->fan_low[nr] = f71805f_read16(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) F71805F_REG_FAN_LOW(nr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) data->fan_target[nr] = f71805f_read16(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) F71805F_REG_FAN_TARGET(nr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) data->pwm_freq[nr] = f71805f_read8(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) F71805F_REG_PWM_FREQ(nr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) for (nr = 0; nr < 3; nr++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) data->temp_high[nr] = f71805f_read8(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) F71805F_REG_TEMP_HIGH(nr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) data->temp_hyst[nr] = f71805f_read8(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) F71805F_REG_TEMP_HYST(nr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) for (nr = 0; nr < 3; nr++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) for (apnr = 0; apnr < 3; apnr++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) data->auto_points[nr].temp[apnr] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) f71805f_read8(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) F71805F_REG_PWM_AUTO_POINT_TEMP(nr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) apnr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) data->auto_points[nr].fan[apnr] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) f71805f_read16(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) F71805F_REG_PWM_AUTO_POINT_FAN(nr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) apnr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) data->last_limits = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) /* Measurement registers cache is refreshed after 1 second */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) if (time_after(jiffies, data->last_updated + HZ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) || !data->valid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) for (nr = 0; nr < 11; nr++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) if (!(data->has_in & (1 << nr)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) data->in[nr] = f71805f_read8(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) F71805F_REG_IN(nr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) for (nr = 0; nr < 3; nr++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) data->fan[nr] = f71805f_read16(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) F71805F_REG_FAN(nr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) data->fan_ctrl[nr] = f71805f_read8(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) F71805F_REG_FAN_CTRL(nr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) data->pwm[nr] = f71805f_read8(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) F71805F_REG_PWM_DUTY(nr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) for (nr = 0; nr < 3; nr++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) data->temp[nr] = f71805f_read8(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) F71805F_REG_TEMP(nr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) data->alarms = f71805f_read8(data, F71805F_REG_STATUS(0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) + (f71805f_read8(data, F71805F_REG_STATUS(1)) << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) + (f71805f_read8(data, F71805F_REG_STATUS(2)) << 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) data->last_updated = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) data->valid = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) return data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) * Sysfs interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) static ssize_t show_in0(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) struct f71805f_data *data = f71805f_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) return sprintf(buf, "%ld\n", in0_from_reg(data->in[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) static ssize_t show_in0_max(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) struct f71805f_data *data = f71805f_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) static ssize_t show_in0_min(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) struct f71805f_data *data = f71805f_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) static ssize_t set_in0_max(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) *devattr, const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) struct f71805f_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) data->in_high[nr] = in0_to_reg(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) static ssize_t set_in0_min(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) *devattr, const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) struct f71805f_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) data->in_low[nr] = in0_to_reg(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) struct f71805f_data *data = f71805f_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) return sprintf(buf, "%ld\n", in_from_reg(data->in[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) static ssize_t show_in_max(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) struct f71805f_data *data = f71805f_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) static ssize_t show_in_min(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) struct f71805f_data *data = f71805f_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) static ssize_t set_in_max(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) *devattr, const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) struct f71805f_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) data->in_high[nr] = in_to_reg(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) static ssize_t set_in_min(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) *devattr, const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) struct f71805f_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) data->in_low[nr] = in_to_reg(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) struct f71805f_data *data = f71805f_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) static ssize_t show_fan_min(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) struct f71805f_data *data = f71805f_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) static ssize_t show_fan_target(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) struct f71805f_data *data = f71805f_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) return sprintf(buf, "%ld\n", fan_from_reg(data->fan_target[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) static ssize_t set_fan_min(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) *devattr, const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) struct f71805f_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) data->fan_low[nr] = fan_to_reg(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) static ssize_t set_fan_target(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) *devattr, const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) struct f71805f_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) data->fan_target[nr] = fan_to_reg(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) f71805f_write16(data, F71805F_REG_FAN_TARGET(nr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) data->fan_target[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) struct f71805f_data *data = f71805f_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) return sprintf(buf, "%d\n", (int)data->pwm[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) static ssize_t show_pwm_enable(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) struct f71805f_data *data = f71805f_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) int mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) switch (data->fan_ctrl[nr] & FAN_CTRL_MODE_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) case FAN_CTRL_MODE_SPEED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) mode = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) case FAN_CTRL_MODE_TEMPERATURE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) mode = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) default: /* MANUAL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) mode = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) return sprintf(buf, "%d\n", mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) static ssize_t show_pwm_freq(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) struct f71805f_data *data = f71805f_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) return sprintf(buf, "%lu\n", pwm_freq_from_reg(data->pwm_freq[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) static ssize_t show_pwm_mode(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) struct f71805f_data *data = f71805f_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) return sprintf(buf, "%d\n", pwm_mode_from_reg(data->fan_ctrl[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) struct f71805f_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) if (val > 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) data->pwm[nr] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) f71805f_write8(data, F71805F_REG_PWM_DUTY(nr), data->pwm[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) static struct attribute *f71805f_attr_pwm[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) static ssize_t set_pwm_enable(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) *devattr, const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) struct f71805f_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) if (val < 1 || val > 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) if (val > 1) { /* Automatic mode, user can't set PWM value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) S_IRUGO))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) dev_dbg(dev, "chmod -w pwm%d failed\n", nr + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) & ~FAN_CTRL_MODE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) switch (val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) reg |= FAN_CTRL_MODE_MANUAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) reg |= FAN_CTRL_MODE_TEMPERATURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) reg |= FAN_CTRL_MODE_SPEED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) data->fan_ctrl[nr] = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) f71805f_write8(data, F71805F_REG_FAN_CTRL(nr), reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) if (val == 1) { /* Manual mode, user can set PWM value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) S_IRUGO | S_IWUSR))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) dev_dbg(dev, "chmod +w pwm%d failed\n", nr + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) static ssize_t set_pwm_freq(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) *devattr, const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) struct f71805f_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) data->pwm_freq[nr] = pwm_freq_to_reg(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) f71805f_write8(data, F71805F_REG_PWM_FREQ(nr), data->pwm_freq[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) static ssize_t show_pwm_auto_point_temp(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) struct f71805f_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) int pwmnr = attr->nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) int apnr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) return sprintf(buf, "%ld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) temp_from_reg(data->auto_points[pwmnr].temp[apnr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) static ssize_t set_pwm_auto_point_temp(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) struct f71805f_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) int pwmnr = attr->nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) int apnr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) data->auto_points[pwmnr].temp[apnr] = temp_to_reg(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) f71805f_write8(data, F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) data->auto_points[pwmnr].temp[apnr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) static ssize_t show_pwm_auto_point_fan(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) struct f71805f_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) int pwmnr = attr->nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) int apnr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) return sprintf(buf, "%ld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) fan_from_reg(data->auto_points[pwmnr].fan[apnr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) static ssize_t set_pwm_auto_point_fan(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) struct f71805f_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) int pwmnr = attr->nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) int apnr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) data->auto_points[pwmnr].fan[apnr] = fan_to_reg(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) f71805f_write16(data, F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) data->auto_points[pwmnr].fan[apnr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) struct f71805f_data *data = f71805f_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) static ssize_t show_temp_max(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) struct f71805f_data *data = f71805f_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) static ssize_t show_temp_hyst(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) struct f71805f_data *data = f71805f_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) static ssize_t show_temp_type(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) struct f71805f_data *data = f71805f_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) /* 3 is diode, 4 is thermistor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) static ssize_t set_temp_max(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) *devattr, const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) struct f71805f_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) data->temp_high[nr] = temp_to_reg(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) static ssize_t set_temp_hyst(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) *devattr, const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) struct f71805f_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) int nr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) data->temp_hyst[nr] = temp_to_reg(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) static ssize_t alarms_in_show(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) struct f71805f_data *data = f71805f_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) return sprintf(buf, "%lu\n", data->alarms & 0x7ff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) static ssize_t alarms_fan_show(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) struct f71805f_data *data = f71805f_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) return sprintf(buf, "%lu\n", (data->alarms >> 16) & 0x07);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) static ssize_t alarms_temp_show(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) struct f71805f_data *data = f71805f_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) return sprintf(buf, "%lu\n", (data->alarms >> 11) & 0x07);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) static ssize_t show_alarm(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) struct f71805f_data *data = f71805f_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) int bitnr = attr->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) return sprintf(buf, "%lu\n", (data->alarms >> bitnr) & 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) static ssize_t name_show(struct device *dev, struct device_attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) struct f71805f_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) return sprintf(buf, "%s\n", data->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) static SENSOR_DEVICE_ATTR(in0_input, S_IRUGO, show_in0, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) static SENSOR_DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) show_in0_max, set_in0_max, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) static SENSOR_DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) show_in0_min, set_in0_min, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_in, NULL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) static SENSOR_DEVICE_ATTR(in1_max, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) show_in_max, set_in_max, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) static SENSOR_DEVICE_ATTR(in1_min, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) show_in_min, set_in_min, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_in, NULL, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) static SENSOR_DEVICE_ATTR(in2_max, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) show_in_max, set_in_max, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) static SENSOR_DEVICE_ATTR(in2_min, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) show_in_min, set_in_min, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_in, NULL, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) static SENSOR_DEVICE_ATTR(in3_max, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) show_in_max, set_in_max, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) static SENSOR_DEVICE_ATTR(in3_min, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) show_in_min, set_in_min, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_in, NULL, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) static SENSOR_DEVICE_ATTR(in4_max, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) show_in_max, set_in_max, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) static SENSOR_DEVICE_ATTR(in4_min, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) show_in_min, set_in_min, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_in, NULL, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) static SENSOR_DEVICE_ATTR(in5_max, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) show_in_max, set_in_max, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) static SENSOR_DEVICE_ATTR(in5_min, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) show_in_min, set_in_min, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_in, NULL, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) static SENSOR_DEVICE_ATTR(in6_max, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) show_in_max, set_in_max, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) static SENSOR_DEVICE_ATTR(in6_min, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) show_in_min, set_in_min, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_in, NULL, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) static SENSOR_DEVICE_ATTR(in7_max, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) show_in_max, set_in_max, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) static SENSOR_DEVICE_ATTR(in7_min, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) show_in_min, set_in_min, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_in, NULL, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) static SENSOR_DEVICE_ATTR(in8_max, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) show_in_max, set_in_max, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) static SENSOR_DEVICE_ATTR(in8_min, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) show_in_min, set_in_min, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) static SENSOR_DEVICE_ATTR(in9_input, S_IRUGO, show_in0, NULL, 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) static SENSOR_DEVICE_ATTR(in9_max, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) show_in0_max, set_in0_max, 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) static SENSOR_DEVICE_ATTR(in9_min, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) show_in0_min, set_in0_min, 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) static SENSOR_DEVICE_ATTR(in10_input, S_IRUGO, show_in0, NULL, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) static SENSOR_DEVICE_ATTR(in10_max, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) show_in0_max, set_in0_max, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) static SENSOR_DEVICE_ATTR(in10_min, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) show_in0_min, set_in0_min, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) show_fan_min, set_fan_min, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) static SENSOR_DEVICE_ATTR(fan1_target, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) show_fan_target, set_fan_target, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) show_fan_min, set_fan_min, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) static SENSOR_DEVICE_ATTR(fan2_target, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) show_fan_target, set_fan_target, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) show_fan_min, set_fan_min, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) static SENSOR_DEVICE_ATTR(fan3_target, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) show_fan_target, set_fan_target, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) show_temp_max, set_temp_max, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) show_temp_hyst, set_temp_hyst, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) show_temp_max, set_temp_max, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) static SENSOR_DEVICE_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) show_temp_hyst, set_temp_hyst, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) show_temp_max, set_temp_max, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) static SENSOR_DEVICE_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) show_temp_hyst, set_temp_hyst, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) * pwm (value) files are created read-only, write permission is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) * then added or removed dynamically as needed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO, show_pwm, set_pwm, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) show_pwm_enable, set_pwm_enable, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) show_pwm_freq, set_pwm_freq, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) static SENSOR_DEVICE_ATTR(pwm1_mode, S_IRUGO, show_pwm_mode, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO, show_pwm, set_pwm, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) show_pwm_enable, set_pwm_enable, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) show_pwm_freq, set_pwm_freq, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) static SENSOR_DEVICE_ATTR(pwm2_mode, S_IRUGO, show_pwm_mode, NULL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO, show_pwm, set_pwm, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) show_pwm_enable, set_pwm_enable, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) show_pwm_freq, set_pwm_freq, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) static SENSOR_DEVICE_ATTR(pwm3_mode, S_IRUGO, show_pwm_mode, NULL, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) show_pwm_auto_point_temp, set_pwm_auto_point_temp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_fan, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) show_pwm_auto_point_fan, set_pwm_auto_point_fan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) show_pwm_auto_point_temp, set_pwm_auto_point_temp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) 0, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_fan, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) show_pwm_auto_point_fan, set_pwm_auto_point_fan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) 0, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) show_pwm_auto_point_temp, set_pwm_auto_point_temp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) 0, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_fan, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) show_pwm_auto_point_fan, set_pwm_auto_point_fan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) 0, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) show_pwm_auto_point_temp, set_pwm_auto_point_temp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_fan, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) show_pwm_auto_point_fan, set_pwm_auto_point_fan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) show_pwm_auto_point_temp, set_pwm_auto_point_temp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_fan, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) show_pwm_auto_point_fan, set_pwm_auto_point_fan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) show_pwm_auto_point_temp, set_pwm_auto_point_temp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) 1, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_fan, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) show_pwm_auto_point_fan, set_pwm_auto_point_fan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) 1, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) show_pwm_auto_point_temp, set_pwm_auto_point_temp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) 2, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_fan, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) show_pwm_auto_point_fan, set_pwm_auto_point_fan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) 2, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) show_pwm_auto_point_temp, set_pwm_auto_point_temp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) 2, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_fan, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) show_pwm_auto_point_fan, set_pwm_auto_point_fan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) 2, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) show_pwm_auto_point_temp, set_pwm_auto_point_temp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) 2, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_fan, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) show_pwm_auto_point_fan, set_pwm_auto_point_fan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) 2, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 17);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 18);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) static DEVICE_ATTR_RO(alarms_in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) static DEVICE_ATTR_RO(alarms_fan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) static DEVICE_ATTR_RO(alarms_temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) static DEVICE_ATTR_RO(name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) static struct attribute *f71805f_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) &sensor_dev_attr_in0_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) &sensor_dev_attr_in0_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) &sensor_dev_attr_in0_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) &sensor_dev_attr_in1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) &sensor_dev_attr_in1_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) &sensor_dev_attr_in1_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) &sensor_dev_attr_in2_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) &sensor_dev_attr_in2_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) &sensor_dev_attr_in2_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) &sensor_dev_attr_in3_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) &sensor_dev_attr_in3_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) &sensor_dev_attr_in3_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) &sensor_dev_attr_in5_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) &sensor_dev_attr_in5_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) &sensor_dev_attr_in5_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) &sensor_dev_attr_in6_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) &sensor_dev_attr_in6_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) &sensor_dev_attr_in6_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) &sensor_dev_attr_in7_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) &sensor_dev_attr_in7_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) &sensor_dev_attr_in7_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) &sensor_dev_attr_fan1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) &sensor_dev_attr_fan1_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) &sensor_dev_attr_fan1_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) &sensor_dev_attr_fan1_target.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) &sensor_dev_attr_fan2_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) &sensor_dev_attr_fan2_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) &sensor_dev_attr_fan2_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) &sensor_dev_attr_fan2_target.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) &sensor_dev_attr_fan3_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) &sensor_dev_attr_fan3_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) &sensor_dev_attr_fan3_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) &sensor_dev_attr_fan3_target.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) &sensor_dev_attr_pwm1.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) &sensor_dev_attr_pwm1_enable.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) &sensor_dev_attr_pwm1_mode.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) &sensor_dev_attr_pwm2.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) &sensor_dev_attr_pwm2_enable.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) &sensor_dev_attr_pwm2_mode.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) &sensor_dev_attr_pwm3.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) &sensor_dev_attr_pwm3_enable.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) &sensor_dev_attr_pwm3_mode.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) &sensor_dev_attr_temp1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) &sensor_dev_attr_temp1_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) &sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) &sensor_dev_attr_temp1_type.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) &sensor_dev_attr_temp2_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) &sensor_dev_attr_temp2_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) &sensor_dev_attr_temp2_max_hyst.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) &sensor_dev_attr_temp2_type.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) &sensor_dev_attr_temp3_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) &sensor_dev_attr_temp3_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) &sensor_dev_attr_temp3_max_hyst.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) &sensor_dev_attr_temp3_type.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) &sensor_dev_attr_pwm1_auto_point1_fan.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) &sensor_dev_attr_pwm1_auto_point2_fan.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) &sensor_dev_attr_pwm1_auto_point3_fan.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) &sensor_dev_attr_pwm2_auto_point1_fan.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) &sensor_dev_attr_pwm2_auto_point2_fan.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) &sensor_dev_attr_pwm2_auto_point3_fan.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) &sensor_dev_attr_pwm3_auto_point1_fan.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) &sensor_dev_attr_pwm3_auto_point2_fan.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) &sensor_dev_attr_pwm3_auto_point3_fan.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) &sensor_dev_attr_in0_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) &sensor_dev_attr_in1_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) &sensor_dev_attr_in2_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) &sensor_dev_attr_in3_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) &sensor_dev_attr_in5_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) &sensor_dev_attr_in6_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) &sensor_dev_attr_in7_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) &dev_attr_alarms_in.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) &sensor_dev_attr_temp1_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) &sensor_dev_attr_temp2_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) &sensor_dev_attr_temp3_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) &dev_attr_alarms_temp.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) &dev_attr_alarms_fan.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) &dev_attr_name.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) static const struct attribute_group f71805f_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) .attrs = f71805f_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) static struct attribute *f71805f_attributes_optin[4][5] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) &sensor_dev_attr_in4_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) &sensor_dev_attr_in4_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) &sensor_dev_attr_in4_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) &sensor_dev_attr_in4_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) &sensor_dev_attr_in8_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) &sensor_dev_attr_in8_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) &sensor_dev_attr_in8_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) &sensor_dev_attr_in8_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) &sensor_dev_attr_in9_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) &sensor_dev_attr_in9_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) &sensor_dev_attr_in9_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) &sensor_dev_attr_in9_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) &sensor_dev_attr_in10_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) &sensor_dev_attr_in10_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) &sensor_dev_attr_in10_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) &sensor_dev_attr_in10_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) static const struct attribute_group f71805f_group_optin[4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) { .attrs = f71805f_attributes_optin[0] },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) { .attrs = f71805f_attributes_optin[1] },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) { .attrs = f71805f_attributes_optin[2] },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) { .attrs = f71805f_attributes_optin[3] },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) * We don't include pwm_freq files in the arrays above, because they must be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) * created conditionally (only if pwm_mode is 1 == PWM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) static struct attribute *f71805f_attributes_pwm_freq[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) &sensor_dev_attr_pwm1_freq.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) &sensor_dev_attr_pwm2_freq.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) &sensor_dev_attr_pwm3_freq.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) static const struct attribute_group f71805f_group_pwm_freq = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) .attrs = f71805f_attributes_pwm_freq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) /* We also need an indexed access to pwmN files to toggle writability */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) static struct attribute *f71805f_attr_pwm[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) &sensor_dev_attr_pwm1.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) &sensor_dev_attr_pwm2.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) &sensor_dev_attr_pwm3.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) * Device registration and initialization
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) static void f71805f_init_device(struct f71805f_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) reg = f71805f_read8(data, F71805F_REG_START);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) if ((reg & 0x41) != 0x01) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) pr_debug("Starting monitoring operations\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) * Fan monitoring can be disabled. If it is, we won't be polling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) * the register values, and won't create the related sysfs files.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) for (i = 0; i < 3; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) data->fan_ctrl[i] = f71805f_read8(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) F71805F_REG_FAN_CTRL(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) * Clear latch full bit, else "speed mode" fan speed control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) * doesn't work
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) if (data->fan_ctrl[i] & FAN_CTRL_LATCH_FULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) data->fan_ctrl[i] &= ~FAN_CTRL_LATCH_FULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) f71805f_write8(data, F71805F_REG_FAN_CTRL(i),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) data->fan_ctrl[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) static int f71805f_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) struct f71805f_sio_data *sio_data = dev_get_platdata(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) struct f71805f_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) int i, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) static const char * const names[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) "f71805f",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) "f71872f",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) data = devm_kzalloc(&pdev->dev, sizeof(struct f71805f_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) res = platform_get_resource(pdev, IORESOURCE_IO, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) if (!devm_request_region(&pdev->dev, res->start + ADDR_REG_OFFSET, 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) DRVNAME)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) dev_err(&pdev->dev, "Failed to request region 0x%lx-0x%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) (unsigned long)(res->start + ADDR_REG_OFFSET),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) (unsigned long)(res->start + ADDR_REG_OFFSET + 1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) data->addr = res->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) data->name = names[sio_data->kind];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) mutex_init(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) platform_set_drvdata(pdev, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) /* Some voltage inputs depend on chip model and configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) switch (sio_data->kind) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) case f71805f:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) data->has_in = 0x1ff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) case f71872f:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) data->has_in = 0x6ef;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) if (sio_data->fnsel1 & 0x01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) data->has_in |= (1 << 4); /* in4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) if (sio_data->fnsel1 & 0x02)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) data->has_in |= (1 << 8); /* in8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) /* Initialize the F71805F chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) f71805f_init_device(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) /* Register sysfs interface files */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) err = sysfs_create_group(&pdev->dev.kobj, &f71805f_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) if (data->has_in & (1 << 4)) { /* in4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) err = sysfs_create_group(&pdev->dev.kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) &f71805f_group_optin[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) goto exit_remove_files;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) if (data->has_in & (1 << 8)) { /* in8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) err = sysfs_create_group(&pdev->dev.kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) &f71805f_group_optin[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) goto exit_remove_files;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) if (data->has_in & (1 << 9)) { /* in9 (F71872F/FG only) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) err = sysfs_create_group(&pdev->dev.kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) &f71805f_group_optin[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) goto exit_remove_files;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) if (data->has_in & (1 << 10)) { /* in9 (F71872F/FG only) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) err = sysfs_create_group(&pdev->dev.kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) &f71805f_group_optin[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) goto exit_remove_files;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) for (i = 0; i < 3; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) /* If control mode is PWM, create pwm_freq file */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) if (!(data->fan_ctrl[i] & FAN_CTRL_DC_MODE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) err = sysfs_create_file(&pdev->dev.kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) f71805f_attributes_pwm_freq[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) goto exit_remove_files;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) /* If PWM is in manual mode, add write permission */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) if (data->fan_ctrl[i] & FAN_CTRL_MODE_MANUAL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) err = sysfs_chmod_file(&pdev->dev.kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) f71805f_attr_pwm[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) S_IRUGO | S_IWUSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) dev_err(&pdev->dev, "chmod +w pwm%d failed\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) i + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) goto exit_remove_files;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) data->hwmon_dev = hwmon_device_register(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) if (IS_ERR(data->hwmon_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) err = PTR_ERR(data->hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) goto exit_remove_files;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) exit_remove_files:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) for (i = 0; i < 4; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) static int f71805f_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) struct f71805f_data *data = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) hwmon_device_unregister(data->hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) for (i = 0; i < 4; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) static struct platform_driver f71805f_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) .name = DRVNAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) .probe = f71805f_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) .remove = f71805f_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) static int __init f71805f_device_add(unsigned short address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) const struct f71805f_sio_data *sio_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) struct resource res = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) .start = address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) .end = address + REGION_LENGTH - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) .flags = IORESOURCE_IO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) pdev = platform_device_alloc(DRVNAME, address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) if (!pdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) err = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) pr_err("Device allocation failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) res.name = pdev->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) err = acpi_check_resource_conflict(&res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) goto exit_device_put;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) err = platform_device_add_resources(pdev, &res, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) pr_err("Device resource addition failed (%d)\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) goto exit_device_put;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) err = platform_device_add_data(pdev, sio_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) sizeof(struct f71805f_sio_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) pr_err("Platform data allocation failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) goto exit_device_put;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) err = platform_device_add(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) pr_err("Device addition failed (%d)\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) goto exit_device_put;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) exit_device_put:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) platform_device_put(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) static int __init f71805f_find(int sioaddr, unsigned short *address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) struct f71805f_sio_data *sio_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) u16 devid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) static const char * const names[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) "F71805F/FG",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) "F71872F/FG or F71806F/FG",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) err = superio_enter(sioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) devid = superio_inw(sioaddr, SIO_REG_MANID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) if (devid != SIO_FINTEK_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) switch (devid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) case SIO_F71805F_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) sio_data->kind = f71805f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) case SIO_F71872F_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) sio_data->kind = f71872f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) sio_data->fnsel1 = superio_inb(sioaddr, SIO_REG_FNSEL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) pr_info("Unsupported Fintek device, skipping\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) superio_select(sioaddr, F71805F_LD_HWM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) pr_warn("Device not activated, skipping\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) *address = superio_inw(sioaddr, SIO_REG_ADDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) if (*address == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) pr_warn("Base address not set, skipping\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) *address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) pr_info("Found %s chip at %#x, revision %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) names[sio_data->kind], *address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) superio_inb(sioaddr, SIO_REG_DEVREV));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) superio_exit(sioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) static int __init f71805f_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) unsigned short address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) struct f71805f_sio_data sio_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) if (f71805f_find(0x2e, &address, &sio_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) && f71805f_find(0x4e, &address, &sio_data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) err = platform_driver_register(&f71805f_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) /* Sets global pdev as a side effect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) err = f71805f_device_add(address, &sio_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) goto exit_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) exit_driver:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) platform_driver_unregister(&f71805f_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) static void __exit f71805f_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) platform_device_unregister(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) platform_driver_unregister(&f71805f_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) MODULE_DESCRIPTION("F71805F/F71872F hardware monitoring driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) module_init(f71805f_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) module_exit(f71805f_exit);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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