Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * ds1621.c - Part of lm_sensors, Linux kernel modules for hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *	      monitoring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Christian W. Zuckschwerdt  <zany@triq.net>  2000-11-23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * based on lm75.c by Frodo Looijaard <frodol@dds.nl>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Ported to Linux 2.6 by Aurelien Jarno <aurelien@aurel32.net> with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * the help of Jean Delvare <jdelvare@suse.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * The DS1621 device is a digital temperature/thermometer with 9-bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * resolution, a thermal alarm output (Tout), and user-defined minimum
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * and maximum temperature thresholds (TH and TL).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * The DS1625, DS1631, DS1721, and DS1731 are pin compatible with the DS1621
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * and similar in operation, with slight variations as noted in the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * datasheets (please refer to www.maximintegrated.com for specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  * device information).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  * Since the DS1621 was the first chipset supported by this driver,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  * most comments will refer to this chipset, but are actually general
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)  * and concern all supported chipsets, unless mentioned otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include <linux/hwmon-sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #include <linux/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) /* Supported devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) enum chips { ds1621, ds1625, ds1631, ds1721, ds1731 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) /* Insmod parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) static int polarity = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) module_param(polarity, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) MODULE_PARM_DESC(polarity, "Output's polarity: 0 = active high, 1 = active low");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)  * The Configuration/Status register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47)  * - DS1621:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)  *   7    6    5    4    3    2    1    0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)  * |Done|THF |TLF |NVB | X  | X  |POL |1SHOT|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51)  * - DS1625:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52)  *   7    6    5    4    3    2    1    0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53)  * |Done|THF |TLF |NVB | 1  | 0  |POL |1SHOT|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55)  * - DS1631, DS1731:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56)  *   7    6    5    4    3    2    1    0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57)  * |Done|THF |TLF |NVB | R1 | R0 |POL |1SHOT|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59)  * - DS1721:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60)  *   7    6    5    4    3    2    1    0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61)  * |Done| X  | X  | U  | R1 | R0 |POL |1SHOT|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63)  * Where:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64)  * - 'X' is Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65)  * - 'U' is Undefined
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) #define DS1621_REG_CONFIG_NVB		0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) #define DS1621_REG_CONFIG_RESOL		0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) #define DS1621_REG_CONFIG_POLARITY	0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) #define DS1621_REG_CONFIG_1SHOT		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) #define DS1621_REG_CONFIG_DONE		0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) #define DS1621_REG_CONFIG_RESOL_SHIFT	2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) /* ds1721 conversion rates: {C/LSB, time(ms), resolution bit setting} */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) static const unsigned short ds1721_convrates[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	94,	/*  9-bits (0.5,  93.75, RES[0..1] = 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	188,	/* 10-bits (0.25, 187.5, RES[0..1] = 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	375,	/* 11-bits (0.125,  375, RES[0..1] = 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	750,	/* 12-bits (0.0625, 750, RES[0..1] = 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) #define DS1621_CONVERSION_MAX	750
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) #define DS1625_CONVERSION_MAX	500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) #define DS1621_TEMP_MAX	125000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) #define DS1621_TEMP_MIN	(-55000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) /* The DS1621 temperature registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) static const u8 DS1621_REG_TEMP[3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	0xAA,		/* input, word, RO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	0xA2,		/* min, word, RW */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	0xA1,		/* max, word, RW */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) #define DS1621_REG_CONF			0xAC /* byte, RW */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) #define DS1621_COM_START		0xEE /* no data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) #define DS1721_COM_START		0x51 /* no data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) #define DS1621_COM_STOP			0x22 /* no data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) /* The DS1621 configuration register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define DS1621_ALARM_TEMP_HIGH		0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define DS1621_ALARM_TEMP_LOW		0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /* Conversions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define ALARMS_FROM_REG(val) ((val) & \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 			(DS1621_ALARM_TEMP_HIGH | DS1621_ALARM_TEMP_LOW))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /* Each client has this additional data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct ds1621_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	struct mutex update_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	char valid;			/* !=0 if following fields are valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	unsigned long last_updated;	/* In jiffies */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	enum chips kind;		/* device type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	u16 temp[3];			/* Register values, word */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	u8 conf;			/* Register encoding, combined */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	u8 zbits;			/* Resolution encoded as number of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 					 * zero bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	u16 update_interval;		/* Conversion rate in milliseconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static inline int DS1621_TEMP_FROM_REG(u16 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	return DIV_ROUND_CLOSEST(((s16)reg / 16) * 625, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)  * TEMP: 0.001C/bit (-55C to +125C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)  * REG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)  *  - 1621, 1625: 0.5C/bit, 7 zero-bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)  *  - 1631, 1721, 1731: 0.0625C/bit, 4 zero-bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static inline u16 DS1621_TEMP_TO_REG(long temp, u8 zbits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	temp = clamp_val(temp, DS1621_TEMP_MIN, DS1621_TEMP_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	temp = DIV_ROUND_CLOSEST(temp * (1 << (8 - zbits)), 1000) << zbits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	return temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static void ds1621_init_client(struct ds1621_data *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 			       struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	u8 conf, new_conf, sreg, resol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	new_conf = conf = i2c_smbus_read_byte_data(client, DS1621_REG_CONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	/* switch to continuous conversion mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	new_conf &= ~DS1621_REG_CONFIG_1SHOT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	/* setup output polarity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	if (polarity == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		new_conf &= ~DS1621_REG_CONFIG_POLARITY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	else if (polarity == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		new_conf |= DS1621_REG_CONFIG_POLARITY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	if (conf != new_conf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		i2c_smbus_write_byte_data(client, DS1621_REG_CONF, new_conf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	switch (data->kind) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	case ds1625:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		data->update_interval = DS1625_CONVERSION_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		data->zbits = 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		sreg = DS1621_COM_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	case ds1631:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	case ds1721:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	case ds1731:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		resol = (new_conf & DS1621_REG_CONFIG_RESOL) >>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 			 DS1621_REG_CONFIG_RESOL_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		data->update_interval = ds1721_convrates[resol];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		data->zbits = 7 - resol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		sreg = DS1721_COM_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		data->update_interval = DS1621_CONVERSION_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		data->zbits = 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		sreg = DS1621_COM_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	/* start conversion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	i2c_smbus_write_byte(client, sreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static struct ds1621_data *ds1621_update_client(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	struct ds1621_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	u8 new_conf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	if (time_after(jiffies, data->last_updated + data->update_interval) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	    !data->valid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		dev_dbg(&client->dev, "Starting ds1621 update\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		data->conf = i2c_smbus_read_byte_data(client, DS1621_REG_CONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		for (i = 0; i < ARRAY_SIZE(data->temp); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 			data->temp[i] = i2c_smbus_read_word_swapped(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 							 DS1621_REG_TEMP[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		/* reset alarms if necessary */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		new_conf = data->conf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		if (data->temp[0] > data->temp[1])	/* input > min */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 			new_conf &= ~DS1621_ALARM_TEMP_LOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		if (data->temp[0] < data->temp[2])	/* input < max */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 			new_conf &= ~DS1621_ALARM_TEMP_HIGH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		if (data->conf != new_conf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 			i2c_smbus_write_byte_data(client, DS1621_REG_CONF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 						  new_conf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		data->last_updated = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		data->valid = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	return data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static ssize_t temp_show(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 			 char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	struct ds1621_data *data = ds1621_update_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	return sprintf(buf, "%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		       DS1621_TEMP_FROM_REG(data->temp[attr->index]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) static ssize_t temp_store(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 			  const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	struct ds1621_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	err = kstrtol(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	data->temp[attr->index] = DS1621_TEMP_TO_REG(val, data->zbits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	i2c_smbus_write_word_swapped(data->client, DS1621_REG_TEMP[attr->index],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 				     data->temp[attr->index]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) static ssize_t alarms_show(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 			   char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	struct ds1621_data *data = ds1621_update_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	return sprintf(buf, "%d\n", ALARMS_FROM_REG(data->conf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) static ssize_t alarm_show(struct device *dev, struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 			  char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	struct ds1621_data *data = ds1621_update_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	return sprintf(buf, "%d\n", !!(data->conf & attr->index));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) static ssize_t update_interval_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 				    struct device_attribute *da, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	struct ds1621_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	return scnprintf(buf, PAGE_SIZE, "%hu\n", data->update_interval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) static ssize_t update_interval_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 				     struct device_attribute *da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 				     const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	struct ds1621_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	unsigned long convrate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	s32 err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	int resol = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	err = kstrtoul(buf, 10, &convrate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	/* Convert rate into resolution bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	while (resol < (ARRAY_SIZE(ds1721_convrates) - 1) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	       convrate > ds1721_convrates[resol])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 		resol++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	data->conf = i2c_smbus_read_byte_data(client, DS1621_REG_CONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	data->conf &= ~DS1621_REG_CONFIG_RESOL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	data->conf |= (resol << DS1621_REG_CONFIG_RESOL_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	i2c_smbus_write_byte_data(client, DS1621_REG_CONF, data->conf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	data->update_interval = ds1721_convrates[resol];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	data->zbits = 7 - resol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) static DEVICE_ATTR_RO(alarms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) static DEVICE_ATTR_RW(update_interval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) static SENSOR_DEVICE_ATTR_RW(temp1_min, temp, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) static SENSOR_DEVICE_ATTR_RW(temp1_max, temp, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) static SENSOR_DEVICE_ATTR_RO(temp1_min_alarm, alarm, DS1621_ALARM_TEMP_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) static SENSOR_DEVICE_ATTR_RO(temp1_max_alarm, alarm, DS1621_ALARM_TEMP_HIGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) static struct attribute *ds1621_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	&sensor_dev_attr_temp1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	&sensor_dev_attr_temp1_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	&sensor_dev_attr_temp1_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	&sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	&dev_attr_alarms.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	&dev_attr_update_interval.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) static umode_t ds1621_attribute_visible(struct kobject *kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 					struct attribute *attr, int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	struct device *dev = container_of(kobj, struct device, kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	struct ds1621_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	if (attr == &dev_attr_update_interval.attr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 		if (data->kind == ds1621 || data->kind == ds1625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 			/* shhh, we're hiding update_interval */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	return attr->mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) static const struct attribute_group ds1621_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	.attrs = ds1621_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	.is_visible = ds1621_attribute_visible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) __ATTRIBUTE_GROUPS(ds1621);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) static const struct i2c_device_id ds1621_id[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) static int ds1621_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	struct ds1621_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	data = devm_kzalloc(&client->dev, sizeof(struct ds1621_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 			    GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	mutex_init(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	data->kind = i2c_match_id(ds1621_id, client)->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	/* Initialize the DS1621 chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	ds1621_init_client(data, client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	hwmon_dev = devm_hwmon_device_register_with_groups(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 							   client->name, data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 							   ds1621_groups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	return PTR_ERR_OR_ZERO(hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) static const struct i2c_device_id ds1621_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	{ "ds1621", ds1621 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	{ "ds1625", ds1625 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	{ "ds1631", ds1631 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	{ "ds1721", ds1721 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	{ "ds1731", ds1731 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) MODULE_DEVICE_TABLE(i2c, ds1621_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) /* This is the driver that will be inserted */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) static struct i2c_driver ds1621_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	.class		= I2C_CLASS_HWMON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 		.name	= "ds1621",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	.probe_new	= ds1621_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	.id_table	= ds1621_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) module_i2c_driver(ds1621_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) MODULE_AUTHOR("Christian W. Zuckschwerdt <zany@triq.net>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) MODULE_DESCRIPTION("DS1621 driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) MODULE_LICENSE("GPL");