^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * HWMON Driver for Dialog DA9055
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright(c) 2012 Dialog Semiconductor Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: David Dajun Chen <dchen@diasemi.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/hwmon-sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/completion.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/mfd/da9055/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/mfd/da9055/reg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define DA9055_ADCIN_DIV 102
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define DA9055_VSYS_DIV 85
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define DA9055_ADC_VSYS 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define DA9055_ADC_ADCIN1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define DA9055_ADC_ADCIN2 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define DA9055_ADC_ADCIN3 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define DA9055_ADC_TJUNC 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct da9055_hwmon {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct da9055 *da9055;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct mutex hwmon_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct mutex irq_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct completion done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static const char * const input_names[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) [DA9055_ADC_VSYS] = "VSYS",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) [DA9055_ADC_ADCIN1] = "ADC IN1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) [DA9055_ADC_ADCIN2] = "ADC IN2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) [DA9055_ADC_ADCIN3] = "ADC IN3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) [DA9055_ADC_TJUNC] = "CHIP TEMP",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static const u8 chan_mux[DA9055_ADC_TJUNC + 1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) [DA9055_ADC_VSYS] = DA9055_ADC_MUX_VSYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) [DA9055_ADC_ADCIN1] = DA9055_ADC_MUX_ADCIN1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) [DA9055_ADC_ADCIN2] = DA9055_ADC_MUX_ADCIN2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) [DA9055_ADC_ADCIN3] = DA9055_ADC_MUX_ADCIN3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) [DA9055_ADC_TJUNC] = DA9055_ADC_MUX_T_SENSE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static int da9055_adc_manual_read(struct da9055_hwmon *hwmon,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) unsigned char channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) unsigned short calc_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) unsigned short data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) unsigned char mux_sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct da9055 *da9055 = hwmon->da9055;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) if (channel > DA9055_ADC_TJUNC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) mutex_lock(&hwmon->irq_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /* Selects desired MUX for manual conversion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) mux_sel = chan_mux[channel] | DA9055_ADC_MAN_CONV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) ret = da9055_reg_write(da9055, DA9055_REG_ADC_MAN, mux_sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /* Wait for an interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (!wait_for_completion_timeout(&hwmon->done,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) msecs_to_jiffies(500))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) dev_err(da9055->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) "timeout waiting for ADC conversion interrupt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) ret = -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) ret = da9055_reg_read(da9055, DA9055_REG_ADC_RES_H);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) calc_data = (unsigned short)ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) data = calc_data << 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) ret = da9055_reg_read(da9055, DA9055_REG_ADC_RES_L);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) calc_data = (unsigned short)(ret & DA9055_ADC_LSB_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) data |= calc_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) ret = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) mutex_unlock(&hwmon->irq_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static irqreturn_t da9055_auxadc_irq(int irq, void *irq_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct da9055_hwmon *hwmon = irq_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) complete(&hwmon->done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /* Conversion function for VSYS and ADCINx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static inline int volt_reg_to_mv(int value, int channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if (channel == DA9055_ADC_VSYS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return DIV_ROUND_CLOSEST(value * 1000, DA9055_VSYS_DIV) + 2500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return DIV_ROUND_CLOSEST(value * 1000, DA9055_ADCIN_DIV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static int da9055_enable_auto_mode(struct da9055 *da9055, int channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return da9055_reg_update(da9055, DA9055_REG_ADC_CONT, 1 << channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 1 << channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static int da9055_disable_auto_mode(struct da9055 *da9055, int channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return da9055_reg_update(da9055, DA9055_REG_ADC_CONT, 1 << channel, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static ssize_t da9055_auto_ch_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) struct da9055_hwmon *hwmon = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) int ret, adc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) int channel = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) mutex_lock(&hwmon->hwmon_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) ret = da9055_enable_auto_mode(hwmon->da9055, channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) goto hwmon_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) usleep_range(10000, 10500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) adc = da9055_reg_read(hwmon->da9055, DA9055_REG_VSYS_RES + channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (adc < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) ret = adc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) goto hwmon_err_release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) ret = da9055_disable_auto_mode(hwmon->da9055, channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) goto hwmon_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) mutex_unlock(&hwmon->hwmon_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) return sprintf(buf, "%d\n", volt_reg_to_mv(adc, channel));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) hwmon_err_release:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) da9055_disable_auto_mode(hwmon->da9055, channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) hwmon_err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) mutex_unlock(&hwmon->hwmon_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static ssize_t da9055_tjunc_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) struct da9055_hwmon *hwmon = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) int tjunc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) int toffset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) tjunc = da9055_adc_manual_read(hwmon, DA9055_ADC_TJUNC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) if (tjunc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) return tjunc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) toffset = da9055_reg_read(hwmon->da9055, DA9055_REG_T_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) if (toffset < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) return toffset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) * Degrees celsius = -0.4084 * (ADC_RES - T_OFFSET) + 307.6332
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) * T_OFFSET is a trim value used to improve accuracy of the result
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) return sprintf(buf, "%d\n", DIV_ROUND_CLOSEST(-4084 * (tjunc - toffset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) + 3076332, 10000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static ssize_t label_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) return sprintf(buf, "%s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) input_names[to_sensor_dev_attr(devattr)->index]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static SENSOR_DEVICE_ATTR_RO(in0_input, da9055_auto_ch, DA9055_ADC_VSYS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static SENSOR_DEVICE_ATTR_RO(in0_label, label, DA9055_ADC_VSYS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static SENSOR_DEVICE_ATTR_RO(in1_input, da9055_auto_ch, DA9055_ADC_ADCIN1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static SENSOR_DEVICE_ATTR_RO(in1_label, label, DA9055_ADC_ADCIN1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static SENSOR_DEVICE_ATTR_RO(in2_input, da9055_auto_ch, DA9055_ADC_ADCIN2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static SENSOR_DEVICE_ATTR_RO(in2_label, label, DA9055_ADC_ADCIN2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) static SENSOR_DEVICE_ATTR_RO(in3_input, da9055_auto_ch, DA9055_ADC_ADCIN3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) static SENSOR_DEVICE_ATTR_RO(in3_label, label, DA9055_ADC_ADCIN3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static SENSOR_DEVICE_ATTR_RO(temp1_input, da9055_tjunc, DA9055_ADC_TJUNC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static SENSOR_DEVICE_ATTR_RO(temp1_label, label, DA9055_ADC_TJUNC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static struct attribute *da9055_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) &sensor_dev_attr_in0_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) &sensor_dev_attr_in0_label.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) &sensor_dev_attr_in1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) &sensor_dev_attr_in1_label.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) &sensor_dev_attr_in2_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) &sensor_dev_attr_in2_label.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) &sensor_dev_attr_in3_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) &sensor_dev_attr_in3_label.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) &sensor_dev_attr_temp1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) &sensor_dev_attr_temp1_label.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) ATTRIBUTE_GROUPS(da9055);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) static int da9055_hwmon_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) struct da9055_hwmon *hwmon;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) int hwmon_irq, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) hwmon = devm_kzalloc(dev, sizeof(struct da9055_hwmon), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) if (!hwmon)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) mutex_init(&hwmon->hwmon_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) mutex_init(&hwmon->irq_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) init_completion(&hwmon->done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) hwmon->da9055 = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) hwmon_irq = platform_get_irq_byname(pdev, "HWMON");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (hwmon_irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) return hwmon_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) ret = devm_request_threaded_irq(&pdev->dev, hwmon_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) NULL, da9055_auxadc_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) "adc-irq", hwmon);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) if (ret != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) dev_err(hwmon->da9055->dev, "DA9055 ADC IRQ failed ret=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) hwmon_dev = devm_hwmon_device_register_with_groups(dev, "da9055",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) hwmon,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) da9055_groups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) return PTR_ERR_OR_ZERO(hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) static struct platform_driver da9055_hwmon_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) .probe = da9055_hwmon_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) .name = "da9055-hwmon",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) module_platform_driver(da9055_hwmon_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) MODULE_DESCRIPTION("DA9055 HWMON driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) MODULE_ALIAS("platform:da9055-hwmon");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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