^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * HWMON Driver for Dialog DA9052
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright(c) 2012 Dialog Semiconductor Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: David Dajun Chen <dchen@diasemi.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/hwmon-sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/property.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/mfd/da9052/da9052.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/mfd/da9052/reg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct da9052_hwmon {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct da9052 *da9052;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct mutex hwmon_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) bool tsi_as_adc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) int tsiref_mv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct regulator *tsiref;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct completion tsidone;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static const char * const input_names[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) [DA9052_ADC_VDDOUT] = "VDDOUT",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) [DA9052_ADC_ICH] = "CHARGING CURRENT",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) [DA9052_ADC_TBAT] = "BATTERY TEMP",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) [DA9052_ADC_VBAT] = "BATTERY VOLTAGE",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) [DA9052_ADC_IN4] = "ADC IN4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) [DA9052_ADC_IN5] = "ADC IN5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) [DA9052_ADC_IN6] = "ADC IN6",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) [DA9052_ADC_TSI_XP] = "ADC TS X+",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) [DA9052_ADC_TSI_YP] = "ADC TS Y+",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) [DA9052_ADC_TSI_XN] = "ADC TS X-",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) [DA9052_ADC_TSI_YN] = "ADC TS Y-",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) [DA9052_ADC_TJUNC] = "BATTERY JUNCTION TEMP",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) [DA9052_ADC_VBBAT] = "BACK-UP BATTERY VOLTAGE",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /* Conversion function for VDDOUT and VBAT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static inline int volt_reg_to_mv(int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return DIV_ROUND_CLOSEST(value * 2000, 1023) + 2500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* Conversion function for ADC channels 4, 5 and 6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static inline int input_reg_to_mv(int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return DIV_ROUND_CLOSEST(value * 2500, 1023);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* Conversion function for VBBAT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static inline int vbbat_reg_to_mv(int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) return DIV_ROUND_CLOSEST(value * 5000, 1023);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static inline int input_tsireg_to_mv(struct da9052_hwmon *hwmon, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return DIV_ROUND_CLOSEST(value * hwmon->tsiref_mv, 1023);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static inline int da9052_enable_vddout_channel(struct da9052 *da9052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return da9052_reg_update(da9052, DA9052_ADC_CONT_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) DA9052_ADCCONT_AUTOVDDEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) DA9052_ADCCONT_AUTOVDDEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static inline int da9052_disable_vddout_channel(struct da9052 *da9052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return da9052_reg_update(da9052, DA9052_ADC_CONT_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) DA9052_ADCCONT_AUTOVDDEN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static ssize_t da9052_vddout_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) struct da9052_hwmon *hwmon = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) int ret, vdd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) mutex_lock(&hwmon->hwmon_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) ret = da9052_enable_vddout_channel(hwmon->da9052);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) goto hwmon_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) vdd = da9052_reg_read(hwmon->da9052, DA9052_VDD_RES_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) if (vdd < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) ret = vdd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) goto hwmon_err_release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) ret = da9052_disable_vddout_channel(hwmon->da9052);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) goto hwmon_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) mutex_unlock(&hwmon->hwmon_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return sprintf(buf, "%d\n", volt_reg_to_mv(vdd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) hwmon_err_release:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) da9052_disable_vddout_channel(hwmon->da9052);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) hwmon_err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) mutex_unlock(&hwmon->hwmon_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static ssize_t da9052_ich_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct da9052_hwmon *hwmon = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) ret = da9052_reg_read(hwmon->da9052, DA9052_ICHG_AV_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /* Equivalent to 3.9mA/bit in register ICHG_AV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return sprintf(buf, "%d\n", DIV_ROUND_CLOSEST(ret * 39, 10));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static ssize_t da9052_tbat_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) struct da9052_hwmon *hwmon = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) return sprintf(buf, "%d\n", da9052_adc_read_temp(hwmon->da9052));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static ssize_t da9052_vbat_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) struct da9052_hwmon *hwmon = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) ret = da9052_adc_manual_read(hwmon->da9052, DA9052_ADC_VBAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) return sprintf(buf, "%d\n", volt_reg_to_mv(ret));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static ssize_t da9052_misc_channel_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) struct da9052_hwmon *hwmon = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) int channel = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) ret = da9052_adc_manual_read(hwmon->da9052, channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) return sprintf(buf, "%d\n", input_reg_to_mv(ret));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static int da9052_request_tsi_read(struct da9052_hwmon *hwmon, int channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) u8 val = DA9052_TSICONTB_TSIMAN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) switch (channel) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) case DA9052_ADC_TSI_XP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) val |= DA9052_TSICONTB_TSIMUX_XP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) case DA9052_ADC_TSI_YP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) val |= DA9052_TSICONTB_TSIMUX_YP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) case DA9052_ADC_TSI_XN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) val |= DA9052_TSICONTB_TSIMUX_XN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) case DA9052_ADC_TSI_YN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) val |= DA9052_TSICONTB_TSIMUX_YN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) return da9052_reg_write(hwmon->da9052, DA9052_TSI_CONT_B_REG, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static int da9052_get_tsi_result(struct da9052_hwmon *hwmon, int channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) u8 regs[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) int msb, lsb, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) /* block read to avoid separation of MSB and LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) err = da9052_group_read(hwmon->da9052, DA9052_TSI_X_MSB_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) ARRAY_SIZE(regs), regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) switch (channel) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) case DA9052_ADC_TSI_XP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) case DA9052_ADC_TSI_XN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) msb = regs[0] << DA9052_TSILSB_TSIXL_BITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) lsb = regs[2] & DA9052_TSILSB_TSIXL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) lsb >>= DA9052_TSILSB_TSIXL_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) case DA9052_ADC_TSI_YP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) case DA9052_ADC_TSI_YN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) msb = regs[1] << DA9052_TSILSB_TSIYL_BITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) lsb = regs[2] & DA9052_TSILSB_TSIYL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) lsb >>= DA9052_TSILSB_TSIYL_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) return msb | lsb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) static ssize_t __da9052_read_tsi(struct device *dev, int channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) struct da9052_hwmon *hwmon = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) reinit_completion(&hwmon->tsidone);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) ret = da9052_request_tsi_read(hwmon, channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) /* Wait for an conversion done interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) if (!wait_for_completion_timeout(&hwmon->tsidone,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) msecs_to_jiffies(500)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) return da9052_get_tsi_result(hwmon, channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static ssize_t da9052_tsi_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) struct da9052_hwmon *hwmon = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) int channel = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) mutex_lock(&hwmon->da9052->auxadc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) ret = __da9052_read_tsi(dev, channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) mutex_unlock(&hwmon->da9052->auxadc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) return sprintf(buf, "%d\n", input_tsireg_to_mv(hwmon, ret));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) static ssize_t da9052_tjunc_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) struct da9052_hwmon *hwmon = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) int tjunc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) int toffset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) tjunc = da9052_reg_read(hwmon->da9052, DA9052_TJUNC_RES_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) if (tjunc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) return tjunc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) toffset = da9052_reg_read(hwmon->da9052, DA9052_T_OFFSET_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) if (toffset < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) return toffset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) * Degrees celsius = 1.708 * (TJUNC_RES - T_OFFSET) - 108.8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) * T_OFFSET is a trim value used to improve accuracy of the result
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) return sprintf(buf, "%d\n", 1708 * (tjunc - toffset) - 108800);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) static ssize_t da9052_vbbat_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) struct da9052_hwmon *hwmon = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) ret = da9052_adc_manual_read(hwmon->da9052, DA9052_ADC_VBBAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) return sprintf(buf, "%d\n", vbbat_reg_to_mv(ret));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) static ssize_t label_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) return sprintf(buf, "%s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) input_names[to_sensor_dev_attr(devattr)->index]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) static umode_t da9052_channel_is_visible(struct kobject *kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) struct attribute *attr, int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) struct device *dev = container_of(kobj, struct device, kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) struct da9052_hwmon *hwmon = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) struct device_attribute *dattr = container_of(attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) struct device_attribute, attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) struct sensor_device_attribute *sattr = to_sensor_dev_attr(dattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) if (!hwmon->tsi_as_adc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) switch (sattr->index) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) case DA9052_ADC_TSI_XP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) case DA9052_ADC_TSI_YP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) case DA9052_ADC_TSI_XN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) case DA9052_ADC_TSI_YN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) return attr->mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) static SENSOR_DEVICE_ATTR_RO(in0_input, da9052_vddout, DA9052_ADC_VDDOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) static SENSOR_DEVICE_ATTR_RO(in0_label, label, DA9052_ADC_VDDOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) static SENSOR_DEVICE_ATTR_RO(in3_input, da9052_vbat, DA9052_ADC_VBAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) static SENSOR_DEVICE_ATTR_RO(in3_label, label, DA9052_ADC_VBAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) static SENSOR_DEVICE_ATTR_RO(in4_input, da9052_misc_channel, DA9052_ADC_IN4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) static SENSOR_DEVICE_ATTR_RO(in4_label, label, DA9052_ADC_IN4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) static SENSOR_DEVICE_ATTR_RO(in5_input, da9052_misc_channel, DA9052_ADC_IN5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) static SENSOR_DEVICE_ATTR_RO(in5_label, label, DA9052_ADC_IN5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) static SENSOR_DEVICE_ATTR_RO(in6_input, da9052_misc_channel, DA9052_ADC_IN6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) static SENSOR_DEVICE_ATTR_RO(in6_label, label, DA9052_ADC_IN6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) static SENSOR_DEVICE_ATTR_RO(in9_input, da9052_vbbat, DA9052_ADC_VBBAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) static SENSOR_DEVICE_ATTR_RO(in9_label, label, DA9052_ADC_VBBAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) static SENSOR_DEVICE_ATTR_RO(in70_input, da9052_tsi, DA9052_ADC_TSI_XP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) static SENSOR_DEVICE_ATTR_RO(in70_label, label, DA9052_ADC_TSI_XP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) static SENSOR_DEVICE_ATTR_RO(in71_input, da9052_tsi, DA9052_ADC_TSI_XN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) static SENSOR_DEVICE_ATTR_RO(in71_label, label, DA9052_ADC_TSI_XN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) static SENSOR_DEVICE_ATTR_RO(in72_input, da9052_tsi, DA9052_ADC_TSI_YP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) static SENSOR_DEVICE_ATTR_RO(in72_label, label, DA9052_ADC_TSI_YP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) static SENSOR_DEVICE_ATTR_RO(in73_input, da9052_tsi, DA9052_ADC_TSI_YN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) static SENSOR_DEVICE_ATTR_RO(in73_label, label, DA9052_ADC_TSI_YN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) static SENSOR_DEVICE_ATTR_RO(curr1_input, da9052_ich, DA9052_ADC_ICH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) static SENSOR_DEVICE_ATTR_RO(curr1_label, label, DA9052_ADC_ICH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) static SENSOR_DEVICE_ATTR_RO(temp2_input, da9052_tbat, DA9052_ADC_TBAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) static SENSOR_DEVICE_ATTR_RO(temp2_label, label, DA9052_ADC_TBAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) static SENSOR_DEVICE_ATTR_RO(temp8_input, da9052_tjunc, DA9052_ADC_TJUNC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) static SENSOR_DEVICE_ATTR_RO(temp8_label, label, DA9052_ADC_TJUNC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) static struct attribute *da9052_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) &sensor_dev_attr_in0_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) &sensor_dev_attr_in0_label.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) &sensor_dev_attr_in3_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) &sensor_dev_attr_in3_label.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) &sensor_dev_attr_in4_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) &sensor_dev_attr_in4_label.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) &sensor_dev_attr_in5_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) &sensor_dev_attr_in5_label.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) &sensor_dev_attr_in6_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) &sensor_dev_attr_in6_label.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) &sensor_dev_attr_in70_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) &sensor_dev_attr_in70_label.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) &sensor_dev_attr_in71_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) &sensor_dev_attr_in71_label.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) &sensor_dev_attr_in72_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) &sensor_dev_attr_in72_label.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) &sensor_dev_attr_in73_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) &sensor_dev_attr_in73_label.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) &sensor_dev_attr_in9_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) &sensor_dev_attr_in9_label.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) &sensor_dev_attr_curr1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) &sensor_dev_attr_curr1_label.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) &sensor_dev_attr_temp2_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) &sensor_dev_attr_temp2_label.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) &sensor_dev_attr_temp8_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) &sensor_dev_attr_temp8_label.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) static const struct attribute_group da9052_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) .attrs = da9052_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) .is_visible = da9052_channel_is_visible,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) __ATTRIBUTE_GROUPS(da9052);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) static irqreturn_t da9052_tsi_datardy_irq(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) struct da9052_hwmon *hwmon = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) complete(&hwmon->tsidone);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) static int da9052_hwmon_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) struct da9052_hwmon *hwmon;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) hwmon = devm_kzalloc(dev, sizeof(struct da9052_hwmon), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) if (!hwmon)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) platform_set_drvdata(pdev, hwmon);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) mutex_init(&hwmon->hwmon_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) hwmon->da9052 = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) init_completion(&hwmon->tsidone);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) hwmon->tsi_as_adc =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) device_property_read_bool(pdev->dev.parent, "dlg,tsi-as-adc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) if (hwmon->tsi_as_adc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) hwmon->tsiref = devm_regulator_get(pdev->dev.parent, "tsiref");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) if (IS_ERR(hwmon->tsiref)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) err = PTR_ERR(hwmon->tsiref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) dev_err(&pdev->dev, "failed to get tsiref: %d", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) err = regulator_enable(hwmon->tsiref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) hwmon->tsiref_mv = regulator_get_voltage(hwmon->tsiref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) if (hwmon->tsiref_mv < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) err = hwmon->tsiref_mv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) goto exit_regulator;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) /* convert from microvolt (DT) to millivolt (hwmon) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) hwmon->tsiref_mv /= 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) /* TSIREF limits from datasheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) if (hwmon->tsiref_mv < 1800 || hwmon->tsiref_mv > 2600) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) dev_err(hwmon->da9052->dev, "invalid TSIREF voltage: %d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) hwmon->tsiref_mv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) err = -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) goto exit_regulator;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) /* disable touchscreen features */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) da9052_reg_write(hwmon->da9052, DA9052_TSI_CONT_A_REG, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) /* Sample every 1ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) da9052_reg_update(hwmon->da9052, DA9052_ADC_CONT_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) DA9052_ADCCONT_ADCMODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) DA9052_ADCCONT_ADCMODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) err = da9052_request_irq(hwmon->da9052, DA9052_IRQ_TSIREADY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) "tsiready-irq", da9052_tsi_datardy_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) hwmon);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) dev_err(&pdev->dev, "Failed to register TSIRDY IRQ: %d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) goto exit_regulator;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) hwmon_dev = devm_hwmon_device_register_with_groups(dev, "da9052",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) hwmon,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) da9052_groups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) err = PTR_ERR_OR_ZERO(hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) goto exit_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) exit_irq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) if (hwmon->tsi_as_adc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) da9052_free_irq(hwmon->da9052, DA9052_IRQ_TSIREADY, hwmon);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) exit_regulator:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) if (hwmon->tsiref)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) regulator_disable(hwmon->tsiref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) static int da9052_hwmon_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) struct da9052_hwmon *hwmon = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) if (hwmon->tsi_as_adc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) da9052_free_irq(hwmon->da9052, DA9052_IRQ_TSIREADY, hwmon);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) regulator_disable(hwmon->tsiref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) static struct platform_driver da9052_hwmon_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) .probe = da9052_hwmon_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) .remove = da9052_hwmon_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) .name = "da9052-hwmon",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) module_platform_driver(da9052_hwmon_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) MODULE_DESCRIPTION("DA9052 HWMON driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) MODULE_ALIAS("platform:da9052-hwmon");