Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * ADM1177 Hot Swap Controller and Digital Power Monitor with Soft Start Pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright 2015-2019 Analog Devices Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/bits.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) /*  Command Byte Operations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #define ADM1177_CMD_V_CONT	BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define ADM1177_CMD_I_CONT	BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define ADM1177_CMD_VRANGE	BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) /* Extended Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define ADM1177_REG_ALERT_TH	2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define ADM1177_BITS		12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  * struct adm1177_state - driver instance specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  * @client		pointer to i2c client
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)  * @reg			regulator info for the the power supply of the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  * @r_sense_uohm	current sense resistor value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  * @alert_threshold_ua	current limit for shutdown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  * @vrange_high		internal voltage divider
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) struct adm1177_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	struct i2c_client	*client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	struct regulator	*reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	u32			r_sense_uohm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	u32			alert_threshold_ua;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	bool			vrange_high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) static int adm1177_read_raw(struct adm1177_state *st, u8 num, u8 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	return i2c_master_recv(st->client, data, num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) static int adm1177_write_cmd(struct adm1177_state *st, u8 cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	return i2c_smbus_write_byte(st->client, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) static int adm1177_write_alert_thr(struct adm1177_state *st,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 				   u32 alert_threshold_ua)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	u64 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	val = 0xFFULL * alert_threshold_ua * st->r_sense_uohm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	val = div_u64(val, 105840000U);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	val = div_u64(val, 1000U);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	if (val > 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		val = 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	ret = i2c_smbus_write_byte_data(st->client, ADM1177_REG_ALERT_TH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 					val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	st->alert_threshold_ua = alert_threshold_ua;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) static int adm1177_read(struct device *dev, enum hwmon_sensor_types type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 			u32 attr, int channel, long *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	struct adm1177_state *st = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	u8 data[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	long dummy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	case hwmon_curr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		switch (attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		case hwmon_curr_input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 			ret = adm1177_read_raw(st, 3, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 			if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 				return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 			dummy = (data[1] << 4) | (data[2] & 0xF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 			 * convert to milliamperes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 			 * ((105.84mV / 4096) x raw) / senseResistor(ohm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 			*val = div_u64((105840000ull * dummy),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 				       4096 * st->r_sense_uohm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		case hwmon_curr_max_alarm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 			*val = st->alert_threshold_ua;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 			return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	case hwmon_in:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		ret = adm1177_read_raw(st, 3, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		dummy = (data[0] << 4) | (data[2] >> 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		 * convert to millivolts based on resistor devision
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		 * (V_fullscale / 4096) * raw
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		if (st->vrange_high)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 			dummy *= 26350;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 			dummy *= 6650;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		*val = DIV_ROUND_CLOSEST(dummy, 4096);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static int adm1177_write(struct device *dev, enum hwmon_sensor_types type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 			 u32 attr, int channel, long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	struct adm1177_state *st = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	case hwmon_curr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		switch (attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		case hwmon_curr_max_alarm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 			adm1177_write_alert_thr(st, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 			return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static umode_t adm1177_is_visible(const void *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 				  enum hwmon_sensor_types type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 				  u32 attr, int channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	const struct adm1177_state *st = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	case hwmon_in:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		switch (attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		case hwmon_in_input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 			return 0444;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	case hwmon_curr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		switch (attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		case hwmon_curr_input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 			if (st->r_sense_uohm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 				return 0444;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		case hwmon_curr_max_alarm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 			if (st->r_sense_uohm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 				return 0644;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static const struct hwmon_channel_info *adm1177_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	HWMON_CHANNEL_INFO(curr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 			   HWMON_C_INPUT | HWMON_C_MAX_ALARM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	HWMON_CHANNEL_INFO(in,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 			   HWMON_I_INPUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static const struct hwmon_ops adm1177_hwmon_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	.is_visible = adm1177_is_visible,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	.read = adm1177_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	.write = adm1177_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static const struct hwmon_chip_info adm1177_chip_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	.ops = &adm1177_hwmon_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	.info = adm1177_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static void adm1177_remove(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	struct adm1177_state *st = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	regulator_disable(st->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static int adm1177_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	struct adm1177_state *st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	u32 alert_threshold_ua;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	st = devm_kzalloc(dev, sizeof(*st), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	if (!st)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	st->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	st->reg = devm_regulator_get_optional(&client->dev, "vref");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	if (IS_ERR(st->reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		if (PTR_ERR(st->reg) == -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 			return -EPROBE_DEFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		st->reg = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		ret = regulator_enable(st->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		ret = devm_add_action_or_reset(&client->dev, adm1177_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 					       st);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	if (device_property_read_u32(dev, "shunt-resistor-micro-ohms",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 				     &st->r_sense_uohm))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		st->r_sense_uohm = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	if (device_property_read_u32(dev, "adi,shutdown-threshold-microamp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 				     &alert_threshold_ua)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		if (st->r_sense_uohm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 			 * set maximum default value from datasheet based on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 			 * shunt-resistor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 			alert_threshold_ua = div_u64(105840000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 						     st->r_sense_uohm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 			alert_threshold_ua = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	st->vrange_high = device_property_read_bool(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 						    "adi,vrange-high-enable");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	if (alert_threshold_ua && st->r_sense_uohm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 		adm1177_write_alert_thr(st, alert_threshold_ua);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	ret = adm1177_write_cmd(st, ADM1177_CMD_V_CONT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 				    ADM1177_CMD_I_CONT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 				    (st->vrange_high ? 0 : ADM1177_CMD_VRANGE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	hwmon_dev =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		devm_hwmon_device_register_with_info(dev, client->name, st,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 						     &adm1177_chip_info, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	return PTR_ERR_OR_ZERO(hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) static const struct i2c_device_id adm1177_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	{"adm1177", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) MODULE_DEVICE_TABLE(i2c, adm1177_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) static const struct of_device_id adm1177_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	{ .compatible = "adi,adm1177" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) MODULE_DEVICE_TABLE(of, adm1177_dt_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) static struct i2c_driver adm1177_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	.class = I2C_CLASS_HWMON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 		.name = "adm1177",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 		.of_match_table = adm1177_dt_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	.probe_new = adm1177_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	.id_table = adm1177_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) module_i2c_driver(adm1177_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) MODULE_AUTHOR("Beniamin Bia <beniamin.bia@analog.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) MODULE_DESCRIPTION("Analog Devices ADM1177 ADC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) MODULE_LICENSE("GPL v2");