Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * adm1021.c - Part of lm_sensors, Linux kernel modules for hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *	       monitoring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (c) 1998, 1999  Frodo Looijaard <frodol@dds.nl> and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *			     Philip Edelbrock <phil@netroedge.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/hwmon-sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) /* Addresses to scan */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) static const unsigned short normal_i2c[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x4c, 0x4d, 0x4e, I2C_CLIENT_END };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) enum chips {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	adm1021, adm1023, max1617, max1617a, thmc10, lm84, gl523sm, mc1066 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) /* adm1021 constants specified below */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) /* The adm1021 registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) /* Read-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) /* For nr in 0-1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define ADM1021_REG_TEMP(nr)		(nr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define ADM1021_REG_STATUS		0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) /* 0x41 = AD, 0x49 = TI, 0x4D = Maxim, 0x23 = Genesys , 0x54 = Onsemi */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define ADM1021_REG_MAN_ID		0xFE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) /* ADM1021 = 0x0X, ADM1023 = 0x3X */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define ADM1021_REG_DEV_ID		0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) /* These use different addresses for reading/writing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define ADM1021_REG_CONFIG_R		0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define ADM1021_REG_CONFIG_W		0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define ADM1021_REG_CONV_RATE_R		0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define ADM1021_REG_CONV_RATE_W		0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) /* These are for the ADM1023's additional precision on the remote temp sensor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define ADM1023_REG_REM_TEMP_PREC	0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define ADM1023_REG_REM_OFFSET		0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define ADM1023_REG_REM_OFFSET_PREC	0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define ADM1023_REG_REM_TOS_PREC	0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define ADM1023_REG_REM_THYST_PREC	0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) /* limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) /* For nr in 0-1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define ADM1021_REG_TOS_R(nr)		(0x05 + 2 * (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define ADM1021_REG_TOS_W(nr)		(0x0B + 2 * (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define ADM1021_REG_THYST_R(nr)		(0x06 + 2 * (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define ADM1021_REG_THYST_W(nr)		(0x0C + 2 * (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) /* write-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) #define ADM1021_REG_ONESHOT		0x0F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) /* Initial values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61)  * Note: Even though I left the low and high limits named os and hyst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62)  * they don't quite work like a thermostat the way the LM75 does.  I.e.,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63)  * a lower temp than THYST actually triggers an alarm instead of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64)  * clearing it.  Weird, ey?   --Phil
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) /* Each client has this additional data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) struct adm1021_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	enum chips type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	const struct attribute_group *groups[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	struct mutex update_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	char valid;		/* !=0 if following fields are valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	char low_power;		/* !=0 if device in low power mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	unsigned long last_updated;	/* In jiffies */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	int temp_max[2];		/* Register values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	int temp_min[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	int temp[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	u8 alarms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	/* Special values for ADM1023 only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	u8 remote_temp_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	u8 remote_temp_offset_prec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) /* (amalysh) read only mode, otherwise any limit's writing confuse BIOS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) static bool read_only;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) static struct adm1021_data *adm1021_update_device(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	struct adm1021_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	    || !data->valid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		dev_dbg(dev, "Starting adm1021 update\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		for (i = 0; i < 2; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 			data->temp[i] = 1000 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 				(s8) i2c_smbus_read_byte_data(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 					client, ADM1021_REG_TEMP(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 			data->temp_max[i] = 1000 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 				(s8) i2c_smbus_read_byte_data(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 					client, ADM1021_REG_TOS_R(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 			if (data->type != lm84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 				data->temp_min[i] = 1000 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 				  (s8) i2c_smbus_read_byte_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 							ADM1021_REG_THYST_R(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		data->alarms = i2c_smbus_read_byte_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 						ADM1021_REG_STATUS) & 0x7c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		if (data->type == adm1023) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 			 * The ADM1023 provides 3 extra bits of precision for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 			 * the remote sensor in extra registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 			data->temp[1] += 125 * (i2c_smbus_read_byte_data(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 				client, ADM1023_REG_REM_TEMP_PREC) >> 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 			data->temp_max[1] += 125 * (i2c_smbus_read_byte_data(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 				client, ADM1023_REG_REM_TOS_PREC) >> 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 			data->temp_min[1] += 125 * (i2c_smbus_read_byte_data(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 				client, ADM1023_REG_REM_THYST_PREC) >> 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 			data->remote_temp_offset =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 				i2c_smbus_read_byte_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 						ADM1023_REG_REM_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 			data->remote_temp_offset_prec =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 				i2c_smbus_read_byte_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 						ADM1023_REG_REM_OFFSET_PREC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		data->last_updated = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		data->valid = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	return data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static ssize_t temp_show(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 			 char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	int index = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	struct adm1021_data *data = adm1021_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	return sprintf(buf, "%d\n", data->temp[index]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static ssize_t temp_max_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 			     struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	int index = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	struct adm1021_data *data = adm1021_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	return sprintf(buf, "%d\n", data->temp_max[index]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static ssize_t temp_min_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 			     struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	int index = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	struct adm1021_data *data = adm1021_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	return sprintf(buf, "%d\n", data->temp_min[index]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static ssize_t alarm_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 			  char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	int index = to_sensor_dev_attr(attr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	struct adm1021_data *data = adm1021_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	return sprintf(buf, "%u\n", (data->alarms >> index) & 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static ssize_t alarms_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 			   struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 			   char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	struct adm1021_data *data = adm1021_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	return sprintf(buf, "%u\n", data->alarms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static ssize_t temp_max_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 			      struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 			      const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	int index = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	struct adm1021_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	long temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	int reg_val, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	err = kstrtol(buf, 10, &temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	temp /= 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	reg_val = clamp_val(temp, -128, 127);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	data->temp_max[index] = reg_val * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	if (!read_only)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		i2c_smbus_write_byte_data(client, ADM1021_REG_TOS_W(index),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 					  reg_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static ssize_t temp_min_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 			      struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 			      const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	int index = to_sensor_dev_attr(devattr)->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	struct adm1021_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	long temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	int reg_val, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	err = kstrtol(buf, 10, &temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	temp /= 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	reg_val = clamp_val(temp, -128, 127);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	data->temp_min[index] = reg_val * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	if (!read_only)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		i2c_smbus_write_byte_data(client, ADM1021_REG_THYST_W(index),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 					  reg_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static ssize_t low_power_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 			      struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	struct adm1021_data *data = adm1021_update_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	return sprintf(buf, "%d\n", data->low_power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static ssize_t low_power_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 			       struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 			       const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	struct adm1021_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	char low_power;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	err = kstrtoul(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	low_power = val != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	mutex_lock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	if (low_power != data->low_power) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		int config = i2c_smbus_read_byte_data(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 			client, ADM1021_REG_CONFIG_R);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		data->low_power = low_power;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		i2c_smbus_write_byte_data(client, ADM1021_REG_CONFIG_W,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 			(config & 0xBF) | (low_power << 6));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	mutex_unlock(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) static SENSOR_DEVICE_ATTR_RW(temp1_max, temp_max, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) static SENSOR_DEVICE_ATTR_RW(temp1_min, temp_min, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) static SENSOR_DEVICE_ATTR_RO(temp2_input, temp, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) static SENSOR_DEVICE_ATTR_RW(temp2_max, temp_max, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) static SENSOR_DEVICE_ATTR_RW(temp2_min, temp_min, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) static SENSOR_DEVICE_ATTR_RO(temp1_max_alarm, alarm, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) static SENSOR_DEVICE_ATTR_RO(temp1_min_alarm, alarm, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static SENSOR_DEVICE_ATTR_RO(temp2_max_alarm, alarm, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static SENSOR_DEVICE_ATTR_RO(temp2_min_alarm, alarm, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) static SENSOR_DEVICE_ATTR_RO(temp2_fault, alarm, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) static DEVICE_ATTR_RO(alarms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) static DEVICE_ATTR_RW(low_power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) static struct attribute *adm1021_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	&sensor_dev_attr_temp1_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	&sensor_dev_attr_temp1_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	&sensor_dev_attr_temp2_max.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	&sensor_dev_attr_temp2_input.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	&sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	&sensor_dev_attr_temp2_fault.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	&dev_attr_alarms.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	&dev_attr_low_power.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) static const struct attribute_group adm1021_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	.attrs = adm1021_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) static struct attribute *adm1021_min_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	&sensor_dev_attr_temp1_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	&sensor_dev_attr_temp2_min.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	&sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	&sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) static const struct attribute_group adm1021_min_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	.attrs = adm1021_min_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) /* Return 0 if detection is successful, -ENODEV otherwise */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) static int adm1021_detect(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 			  struct i2c_board_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	struct i2c_adapter *adapter = client->adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	const char *type_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	int conv_rate, status, config, man_id, dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 		pr_debug("detect failed, smbus byte data not supported!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	status = i2c_smbus_read_byte_data(client, ADM1021_REG_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	conv_rate = i2c_smbus_read_byte_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 					     ADM1021_REG_CONV_RATE_R);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	config = i2c_smbus_read_byte_data(client, ADM1021_REG_CONFIG_R);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	/* Check unused bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	if ((status & 0x03) || (config & 0x3F) || (conv_rate & 0xF8)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 		pr_debug("detect failed, chip not detected!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	/* Determine the chip type. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	man_id = i2c_smbus_read_byte_data(client, ADM1021_REG_MAN_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	dev_id = i2c_smbus_read_byte_data(client, ADM1021_REG_DEV_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	if (man_id < 0 || dev_id < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	if (man_id == 0x4d && dev_id == 0x01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 		type_name = "max1617a";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	else if (man_id == 0x41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 		if ((dev_id & 0xF0) == 0x30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 			type_name = "adm1023";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 		else if ((dev_id & 0xF0) == 0x00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 			type_name = "adm1021";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 			return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	} else if (man_id == 0x49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 		type_name = "thmc10";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	else if (man_id == 0x23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 		type_name = "gl523sm";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	else if (man_id == 0x54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 		type_name = "mc1066";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 		int lte, rte, lhi, rhi, llo, rlo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 		/* extra checks for LM84 and MAX1617 to avoid misdetections */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 		llo = i2c_smbus_read_byte_data(client, ADM1021_REG_THYST_R(0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 		rlo = i2c_smbus_read_byte_data(client, ADM1021_REG_THYST_R(1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 		/* fail if any of the additional register reads failed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 		if (llo < 0 || rlo < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 			return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 		lte = i2c_smbus_read_byte_data(client, ADM1021_REG_TEMP(0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 		rte = i2c_smbus_read_byte_data(client, ADM1021_REG_TEMP(1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 		lhi = i2c_smbus_read_byte_data(client, ADM1021_REG_TOS_R(0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 		rhi = i2c_smbus_read_byte_data(client, ADM1021_REG_TOS_R(1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 		 * Fail for negative temperatures and negative high limits.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 		 * This check also catches read errors on the tested registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 		if ((s8)lte < 0 || (s8)rte < 0 || (s8)lhi < 0 || (s8)rhi < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 			return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 		/* fail if all registers hold the same value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 		if (lte == rte && lte == lhi && lte == rhi && lte == llo
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 		    && lte == rlo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 			return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 		 * LM84 Mfr ID is in a different place,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 		 * and it has more unused bits.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 		if (conv_rate == 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 		    && (config & 0x7F) == 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 		    && (status & 0xAB) == 0x00) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 			type_name = "lm84";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 			/* fail if low limits are larger than high limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 			if ((s8)llo > lhi || (s8)rlo > rhi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 				return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 			type_name = "max1617";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	pr_debug("Detected chip %s at adapter %d, address 0x%02x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 		 type_name, i2c_adapter_id(adapter), client->addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 	strlcpy(info->type, type_name, I2C_NAME_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) static void adm1021_init_client(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 	/* Enable ADC and disable suspend mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	i2c_smbus_write_byte_data(client, ADM1021_REG_CONFIG_W,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 		i2c_smbus_read_byte_data(client, ADM1021_REG_CONFIG_R) & 0xBF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 	/* Set Conversion rate to 1/sec (this can be tinkered with) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 	i2c_smbus_write_byte_data(client, ADM1021_REG_CONV_RATE_W, 0x04);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) static const struct i2c_device_id adm1021_id[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) static int adm1021_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 	struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 	struct adm1021_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 	struct device *hwmon_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 	data = devm_kzalloc(dev, sizeof(struct adm1021_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 	if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 	data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 	data->type = i2c_match_id(adm1021_id, client)->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 	mutex_init(&data->update_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 	/* Initialize the ADM1021 chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	if (data->type != lm84 && !read_only)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 		adm1021_init_client(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 	data->groups[0] = &adm1021_group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 	if (data->type != lm84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 		data->groups[1] = &adm1021_min_group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 	hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 							   data, data->groups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 	return PTR_ERR_OR_ZERO(hwmon_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) static const struct i2c_device_id adm1021_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 	{ "adm1021", adm1021 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 	{ "adm1023", adm1023 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 	{ "max1617", max1617 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 	{ "max1617a", max1617a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 	{ "thmc10", thmc10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 	{ "lm84", lm84 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 	{ "gl523sm", gl523sm },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 	{ "mc1066", mc1066 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) MODULE_DEVICE_TABLE(i2c, adm1021_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) static struct i2c_driver adm1021_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 	.class		= I2C_CLASS_HWMON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 		.name	= "adm1021",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 	.probe_new	= adm1021_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 	.id_table	= adm1021_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 	.detect		= adm1021_detect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 	.address_list	= normal_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) module_i2c_driver(adm1021_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl> and "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 		"Philip Edelbrock <phil@netroedge.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) MODULE_DESCRIPTION("adm1021 driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) module_param(read_only, bool, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) MODULE_PARM_DESC(read_only, "Don't set any values, read only mode");