^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* OMAP SSI internal interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2010 Nokia Corporation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2013 Sebastian Reichel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Contact: Carlos Chinea <carlos.chinea@nokia.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef __LINUX_HSI_OMAP_SSI_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define __LINUX_HSI_OMAP_SSI_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/hsi/hsi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define SSI_MAX_CHANNELS 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define SSI_MAX_GDD_LCH 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define SSI_BYTES_TO_FRAMES(x) ((((x) - 1) >> 2) + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define SSI_WAKE_EN 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * struct omap_ssm_ctx - OMAP synchronous serial module (TX/RX) context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * @mode: Bit transmission mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * @channels: Number of channels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * @framesize: Frame size in bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * @timeout: RX frame timeout
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * @divisor: TX divider
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * @arb_mode: Arbitration mode for TX frame (Round robin, priority)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct omap_ssm_ctx {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) u32 mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) u32 channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) u32 frame_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) u32 timeout; /* Rx Only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) u32 arb_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) u32 divisor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }; /* Tx only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * struct omap_ssi_port - OMAP SSI port data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * @dev: device associated to the port (HSI port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * @pdev: platform device associated to the port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * @sst_dma: SSI transmitter physical base address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * @ssr_dma: SSI receiver physical base address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * @sst_base: SSI transmitter base address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * @ssr_base: SSI receiver base address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * @wk_lock: spin lock to serialize access to the wake lines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * @lock: Spin lock to serialize access to the SSI port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * @channels: Current number of channels configured (1,2,4 or 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * @txqueue: TX message queues
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * @rxqueue: RX message queues
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * @brkqueue: Queue of incoming HWBREAK requests (FRAME mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * @errqueue: Queue for failed messages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * @errqueue_work: Delayed Work for failed messages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * @irq: IRQ number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * @wake_irq: IRQ number for incoming wake line (-1 if none)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * @wake_gpio: GPIO number for incoming wake line (-1 if none)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * @flags: flags to keep track of states
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * @wk_refcount: Reference count for output wake line
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * @work: worker for starting TX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * @sys_mpu_enable: Context for the interrupt enable register for irq 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * @sst: Context for the synchronous serial transmitter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * @ssr: Context for the synchronous serial receiver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct omap_ssi_port {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) struct device *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) dma_addr_t sst_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) dma_addr_t ssr_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) void __iomem *sst_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) void __iomem *ssr_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) spinlock_t wk_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) unsigned int channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct list_head txqueue[SSI_MAX_CHANNELS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct list_head rxqueue[SSI_MAX_CHANNELS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct list_head brkqueue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) struct list_head errqueue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) struct delayed_work errqueue_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) unsigned int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) int wake_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct gpio_desc *wake_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) bool wktest:1; /* FIXME: HACK to be removed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) unsigned int wk_refcount;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct work_struct work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /* OMAP SSI port context */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) u32 sys_mpu_enable; /* We use only one irq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct omap_ssm_ctx sst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct omap_ssm_ctx ssr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) u32 loss_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) u32 port_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #ifdef CONFIG_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct dentry *dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * struct gdd_trn - GDD transaction data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * @msg: Pointer to the HSI message being served
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * @sg: Pointer to the current sg entry being served
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) struct gdd_trn {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct hsi_msg *msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct scatterlist *sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * struct omap_ssi_controller - OMAP SSI controller data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * @dev: device associated to the controller (HSI controller)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * @sys: SSI I/O base address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * @gdd: GDD I/O base address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * @fck: SSI functional clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * @gdd_irq: IRQ line for GDD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * @gdd_tasklet: bottom half for DMA transfers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * @gdd_trn: Array of GDD transaction data for ongoing GDD transfers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * @lock: lock to serialize access to GDD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * @fck_nb: DVFS notfifier block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * @fck_rate: clock rate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * @loss_count: To follow if we need to restore context or not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * @max_speed: Maximum TX speed (Kb/s) set by the clients.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * @gdd_gcr: SSI GDD saved context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) * @get_loss: Pointer to omap_pm_get_dev_context_loss_count, if any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * @port: Array of pointers of the ports of the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * @dir: Debugfs SSI root directory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) struct omap_ssi_controller {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) void __iomem *sys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) void __iomem *gdd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) struct clk *fck;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) unsigned int gdd_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) struct tasklet_struct gdd_tasklet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct gdd_trn gdd_trn[SSI_MAX_GDD_LCH];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) struct notifier_block fck_nb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) unsigned long fck_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) u32 loss_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) u32 max_speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) /* OMAP SSI Controller context */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) u32 gdd_gcr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) int (*get_loss)(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) struct omap_ssi_port **port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #ifdef CONFIG_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) struct dentry *dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) void omap_ssi_port_update_fclk(struct hsi_controller *ssi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) struct omap_ssi_port *omap_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) extern struct platform_driver ssi_port_pdriver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #endif /* __LINUX_HSI_OMAP_SSI_H__ */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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