^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2010 Sascha Hauer <s.hauer@pengutronix.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2005-2009 Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <video/imx-ipu-v3.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "ipu-prv.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define DP_SYNC 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define DP_ASYNC0 0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define DP_ASYNC1 0xBC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define DP_COM_CONF 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define DP_GRAPH_WIND_CTRL 0x0004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define DP_FG_POS 0x0008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define DP_CSC_A_0 0x0044
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define DP_CSC_A_1 0x0048
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define DP_CSC_A_2 0x004C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define DP_CSC_A_3 0x0050
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define DP_CSC_0 0x0054
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define DP_CSC_1 0x0058
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define DP_COM_CONF_FG_EN (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define DP_COM_CONF_GWSEL (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define DP_COM_CONF_GWAM (1 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define DP_COM_CONF_GWCKE (1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define DP_COM_CONF_CSC_DEF_MASK (3 << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define DP_COM_CONF_CSC_DEF_OFFSET 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define DP_COM_CONF_CSC_DEF_FG (3 << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define DP_COM_CONF_CSC_DEF_BG (2 << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define DP_COM_CONF_CSC_DEF_BOTH (1 << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define IPUV3_NUM_FLOWS 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct ipu_dp_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct ipu_dp {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) u32 flow;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) bool in_use;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) bool foreground;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) enum ipu_color_space in_cs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct ipu_flow {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct ipu_dp foreground;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct ipu_dp background;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) enum ipu_color_space out_cs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct ipu_dp_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct ipu_dp_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct ipu_soc *ipu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct ipu_flow flow[IPUV3_NUM_FLOWS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct mutex mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) int use_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static u32 ipu_dp_flow_base[] = {DP_SYNC, DP_ASYNC0, DP_ASYNC1};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static inline struct ipu_flow *to_flow(struct ipu_dp *dp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) if (dp->foreground)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) return container_of(dp, struct ipu_flow, foreground);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return container_of(dp, struct ipu_flow, background);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) int ipu_dp_set_global_alpha(struct ipu_dp *dp, bool enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) u8 alpha, bool bg_chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) struct ipu_flow *flow = to_flow(dp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct ipu_dp_priv *priv = flow->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) mutex_lock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) reg = readl(flow->base + DP_COM_CONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) if (bg_chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) reg &= ~DP_COM_CONF_GWSEL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) reg |= DP_COM_CONF_GWSEL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) writel(reg, flow->base + DP_COM_CONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) if (enable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) reg = readl(flow->base + DP_GRAPH_WIND_CTRL) & 0x00FFFFFFL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) writel(reg | ((u32) alpha << 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) flow->base + DP_GRAPH_WIND_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) reg = readl(flow->base + DP_COM_CONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) writel(reg | DP_COM_CONF_GWAM, flow->base + DP_COM_CONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) reg = readl(flow->base + DP_COM_CONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) writel(reg & ~DP_COM_CONF_GWAM, flow->base + DP_COM_CONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) ipu_srm_dp_update(priv->ipu, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) mutex_unlock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) EXPORT_SYMBOL_GPL(ipu_dp_set_global_alpha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) int ipu_dp_set_window_pos(struct ipu_dp *dp, u16 x_pos, u16 y_pos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) struct ipu_flow *flow = to_flow(dp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct ipu_dp_priv *priv = flow->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) writel((x_pos << 16) | y_pos, flow->base + DP_FG_POS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) ipu_srm_dp_update(priv->ipu, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) EXPORT_SYMBOL_GPL(ipu_dp_set_window_pos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static void ipu_dp_csc_init(struct ipu_flow *flow,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) enum ipu_color_space in,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) enum ipu_color_space out,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) u32 place)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) reg = readl(flow->base + DP_COM_CONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) reg &= ~DP_COM_CONF_CSC_DEF_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) if (in == out) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) writel(reg, flow->base + DP_COM_CONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) if (in == IPUV3_COLORSPACE_RGB && out == IPUV3_COLORSPACE_YUV) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) writel(0x099 | (0x12d << 16), flow->base + DP_CSC_A_0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) writel(0x03a | (0x3a9 << 16), flow->base + DP_CSC_A_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) writel(0x356 | (0x100 << 16), flow->base + DP_CSC_A_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) writel(0x100 | (0x329 << 16), flow->base + DP_CSC_A_3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) writel(0x3d6 | (0x0000 << 16) | (2 << 30),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) flow->base + DP_CSC_0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) writel(0x200 | (2 << 14) | (0x200 << 16) | (2 << 30),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) flow->base + DP_CSC_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) writel(0x095 | (0x000 << 16), flow->base + DP_CSC_A_0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) writel(0x0cc | (0x095 << 16), flow->base + DP_CSC_A_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) writel(0x3ce | (0x398 << 16), flow->base + DP_CSC_A_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) writel(0x095 | (0x0ff << 16), flow->base + DP_CSC_A_3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) writel(0x000 | (0x3e42 << 16) | (1 << 30),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) flow->base + DP_CSC_0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) writel(0x10a | (1 << 14) | (0x3dd6 << 16) | (1 << 30),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) flow->base + DP_CSC_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) reg |= place;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) writel(reg, flow->base + DP_COM_CONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) int ipu_dp_setup_channel(struct ipu_dp *dp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) enum ipu_color_space in,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) enum ipu_color_space out)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) struct ipu_flow *flow = to_flow(dp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) struct ipu_dp_priv *priv = flow->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) mutex_lock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) dp->in_cs = in;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) if (!dp->foreground)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) flow->out_cs = out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) if (flow->foreground.in_cs == flow->background.in_cs) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * foreground and background are of same colorspace, put
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) * colorspace converter after combining unit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) ipu_dp_csc_init(flow, flow->foreground.in_cs, flow->out_cs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) DP_COM_CONF_CSC_DEF_BOTH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) if (flow->foreground.in_cs == IPUV3_COLORSPACE_UNKNOWN ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) flow->foreground.in_cs == flow->out_cs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) * foreground identical to output, apply color
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) * conversion on background
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) ipu_dp_csc_init(flow, flow->background.in_cs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) flow->out_cs, DP_COM_CONF_CSC_DEF_BG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) ipu_dp_csc_init(flow, flow->foreground.in_cs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) flow->out_cs, DP_COM_CONF_CSC_DEF_FG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) ipu_srm_dp_update(priv->ipu, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) mutex_unlock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) EXPORT_SYMBOL_GPL(ipu_dp_setup_channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) int ipu_dp_enable(struct ipu_soc *ipu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) struct ipu_dp_priv *priv = ipu->dp_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) mutex_lock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) if (!priv->use_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) ipu_module_enable(priv->ipu, IPU_CONF_DP_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) priv->use_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) mutex_unlock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) EXPORT_SYMBOL_GPL(ipu_dp_enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) int ipu_dp_enable_channel(struct ipu_dp *dp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) struct ipu_flow *flow = to_flow(dp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) struct ipu_dp_priv *priv = flow->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) if (!dp->foreground)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) mutex_lock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) reg = readl(flow->base + DP_COM_CONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) reg |= DP_COM_CONF_FG_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) writel(reg, flow->base + DP_COM_CONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) ipu_srm_dp_update(priv->ipu, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) mutex_unlock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) EXPORT_SYMBOL_GPL(ipu_dp_enable_channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) void ipu_dp_disable_channel(struct ipu_dp *dp, bool sync)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) struct ipu_flow *flow = to_flow(dp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) struct ipu_dp_priv *priv = flow->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) u32 reg, csc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) dp->in_cs = IPUV3_COLORSPACE_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) if (!dp->foreground)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) mutex_lock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) reg = readl(flow->base + DP_COM_CONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) csc = reg & DP_COM_CONF_CSC_DEF_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) reg &= ~DP_COM_CONF_CSC_DEF_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) if (csc == DP_COM_CONF_CSC_DEF_BOTH || csc == DP_COM_CONF_CSC_DEF_BG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) reg |= DP_COM_CONF_CSC_DEF_BG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) reg &= ~DP_COM_CONF_FG_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) writel(reg, flow->base + DP_COM_CONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) writel(0, flow->base + DP_FG_POS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) ipu_srm_dp_update(priv->ipu, sync);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) mutex_unlock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) EXPORT_SYMBOL_GPL(ipu_dp_disable_channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) void ipu_dp_disable(struct ipu_soc *ipu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) struct ipu_dp_priv *priv = ipu->dp_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) mutex_lock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) priv->use_count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) if (!priv->use_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) ipu_module_disable(priv->ipu, IPU_CONF_DP_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) if (priv->use_count < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) priv->use_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) mutex_unlock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) EXPORT_SYMBOL_GPL(ipu_dp_disable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) struct ipu_dp *ipu_dp_get(struct ipu_soc *ipu, unsigned int flow)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) struct ipu_dp_priv *priv = ipu->dp_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) struct ipu_dp *dp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) if ((flow >> 1) >= IPUV3_NUM_FLOWS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) if (flow & 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) dp = &priv->flow[flow >> 1].foreground;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) dp = &priv->flow[flow >> 1].background;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) if (dp->in_use)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) return ERR_PTR(-EBUSY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) dp->in_use = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) return dp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) EXPORT_SYMBOL_GPL(ipu_dp_get);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) void ipu_dp_put(struct ipu_dp *dp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) dp->in_use = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) EXPORT_SYMBOL_GPL(ipu_dp_put);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) int ipu_dp_init(struct ipu_soc *ipu, struct device *dev, unsigned long base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) struct ipu_dp_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) if (!priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) priv->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) priv->ipu = ipu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) ipu->dp_priv = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) priv->base = devm_ioremap(dev, base, PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) if (!priv->base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) mutex_init(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) for (i = 0; i < IPUV3_NUM_FLOWS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) priv->flow[i].background.in_cs = IPUV3_COLORSPACE_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) priv->flow[i].foreground.in_cs = IPUV3_COLORSPACE_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) priv->flow[i].foreground.foreground = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) priv->flow[i].base = priv->base + ipu_dp_flow_base[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) priv->flow[i].priv = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) void ipu_dp_exit(struct ipu_soc *ipu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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