Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * DRM driver for Ilitek ILI9225 panels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright 2017 David Lechner <david@lechnology.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Some code copied from mipi-dbi.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Copyright 2016 Noralf Trønnes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/dma-buf.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/property.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <video/mipi_display.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <drm/drm_atomic_helper.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <drm/drm_damage_helper.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <drm/drm_drv.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <drm/drm_fb_cma_helper.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <drm/drm_fb_helper.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <drm/drm_fourcc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <drm/drm_gem_cma_helper.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <drm/drm_gem_framebuffer_helper.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <drm/drm_managed.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <drm/drm_mipi_dbi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <drm/drm_rect.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define ILI9225_DRIVER_READ_CODE	0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define ILI9225_DRIVER_OUTPUT_CONTROL	0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define ILI9225_LCD_AC_DRIVING_CONTROL	0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define ILI9225_ENTRY_MODE		0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define ILI9225_DISPLAY_CONTROL_1	0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define ILI9225_BLANK_PERIOD_CONTROL_1	0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define ILI9225_FRAME_CYCLE_CONTROL	0x0b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define ILI9225_INTERFACE_CONTROL	0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define ILI9225_OSCILLATION_CONTROL	0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define ILI9225_POWER_CONTROL_1		0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define ILI9225_POWER_CONTROL_2		0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define ILI9225_POWER_CONTROL_3		0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define ILI9225_POWER_CONTROL_4		0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define ILI9225_POWER_CONTROL_5		0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define ILI9225_VCI_RECYCLING		0x15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define ILI9225_RAM_ADDRESS_SET_1	0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define ILI9225_RAM_ADDRESS_SET_2	0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define ILI9225_WRITE_DATA_TO_GRAM	0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define ILI9225_SOFTWARE_RESET		0x28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define ILI9225_GATE_SCAN_CONTROL	0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define ILI9225_VERTICAL_SCROLL_1	0x31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define ILI9225_VERTICAL_SCROLL_2	0x32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define ILI9225_VERTICAL_SCROLL_3	0x33
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define ILI9225_PARTIAL_DRIVING_POS_1	0x34
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #define ILI9225_PARTIAL_DRIVING_POS_2	0x35
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) #define ILI9225_HORIZ_WINDOW_ADDR_1	0x36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) #define ILI9225_HORIZ_WINDOW_ADDR_2	0x37
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) #define ILI9225_VERT_WINDOW_ADDR_1	0x38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) #define ILI9225_VERT_WINDOW_ADDR_2	0x39
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #define ILI9225_GAMMA_CONTROL_1		0x50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) #define ILI9225_GAMMA_CONTROL_2		0x51
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) #define ILI9225_GAMMA_CONTROL_3		0x52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) #define ILI9225_GAMMA_CONTROL_4		0x53
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) #define ILI9225_GAMMA_CONTROL_5		0x54
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) #define ILI9225_GAMMA_CONTROL_6		0x55
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) #define ILI9225_GAMMA_CONTROL_7		0x56
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) #define ILI9225_GAMMA_CONTROL_8		0x57
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) #define ILI9225_GAMMA_CONTROL_9		0x58
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) #define ILI9225_GAMMA_CONTROL_10	0x59
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) static inline int ili9225_command(struct mipi_dbi *dbi, u8 cmd, u16 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	u8 par[2] = { data >> 8, data & 0xff };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	return mipi_dbi_command_buf(dbi, cmd, par, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) static void ili9225_fb_dirty(struct drm_framebuffer *fb, struct drm_rect *rect)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	struct drm_gem_cma_object *cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(fb->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	unsigned int height = rect->y2 - rect->y1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	unsigned int width = rect->x2 - rect->x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	struct mipi_dbi *dbi = &dbidev->dbi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	bool swap = dbi->swap_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	u16 x_start, y_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	u16 x1, x2, y1, y2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	int idx, ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	bool full;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	void *tr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	if (!drm_dev_enter(fb->dev, &idx))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	full = width == fb->width && height == fb->height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	DRM_DEBUG_KMS("Flushing [FB:%d] " DRM_RECT_FMT "\n", fb->base.id, DRM_RECT_ARG(rect));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	if (!dbi->dc || !full || swap ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	    fb->format->format == DRM_FORMAT_XRGB8888) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		tr = dbidev->tx_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		ret = mipi_dbi_buf_copy(dbidev->tx_buf, fb, rect, swap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 			goto err_msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		tr = cma_obj->vaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	switch (dbidev->rotation) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		x1 = rect->x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		x2 = rect->x2 - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		y1 = rect->y1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		y2 = rect->y2 - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		x_start = x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		y_start = y1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	case 90:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		x1 = rect->y1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		x2 = rect->y2 - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		y1 = fb->width - rect->x2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		y2 = fb->width - rect->x1 - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		x_start = x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		y_start = y2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	case 180:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		x1 = fb->width - rect->x2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 		x2 = fb->width - rect->x1 - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		y1 = fb->height - rect->y2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		y2 = fb->height - rect->y1 - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		x_start = x2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		y_start = y2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	case 270:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		x1 = fb->height - rect->y2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		x2 = fb->height - rect->y1 - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		y1 = rect->x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		y2 = rect->x2 - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		x_start = x2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		y_start = y1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	ili9225_command(dbi, ILI9225_HORIZ_WINDOW_ADDR_1, x2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	ili9225_command(dbi, ILI9225_HORIZ_WINDOW_ADDR_2, x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	ili9225_command(dbi, ILI9225_VERT_WINDOW_ADDR_1, y2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	ili9225_command(dbi, ILI9225_VERT_WINDOW_ADDR_2, y1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	ili9225_command(dbi, ILI9225_RAM_ADDRESS_SET_1, x_start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	ili9225_command(dbi, ILI9225_RAM_ADDRESS_SET_2, y_start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	ret = mipi_dbi_command_buf(dbi, ILI9225_WRITE_DATA_TO_GRAM, tr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 				   width * height * 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) err_msg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		dev_err_once(fb->dev->dev, "Failed to update display %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	drm_dev_exit(idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static void ili9225_pipe_update(struct drm_simple_display_pipe *pipe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 				struct drm_plane_state *old_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	struct drm_plane_state *state = pipe->plane.state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	struct drm_rect rect;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	if (!pipe->crtc.state->active)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	if (drm_atomic_helper_damage_merged(old_state, state, &rect))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		ili9225_fb_dirty(state->fb, &rect);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static void ili9225_pipe_enable(struct drm_simple_display_pipe *pipe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 				struct drm_crtc_state *crtc_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 				struct drm_plane_state *plane_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	struct drm_framebuffer *fb = plane_state->fb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	struct device *dev = pipe->crtc.dev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	struct mipi_dbi *dbi = &dbidev->dbi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	struct drm_rect rect = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		.x1 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		.x2 = fb->width,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		.y1 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		.y2 = fb->height,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	int ret, idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	u8 am_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	if (!drm_dev_enter(pipe->crtc.dev, &idx))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	DRM_DEBUG_KMS("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	mipi_dbi_hw_reset(dbi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	 * There don't seem to be two example init sequences that match, so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	 * using the one from the popular Arduino library for this display.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	 * https://github.com/Nkawu/TFT_22_ILI9225/blob/master/src/TFT_22_ILI9225.cpp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	ret = ili9225_command(dbi, ILI9225_POWER_CONTROL_1, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		DRM_DEV_ERROR(dev, "Error sending command %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		goto out_exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	ili9225_command(dbi, ILI9225_POWER_CONTROL_2, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	ili9225_command(dbi, ILI9225_POWER_CONTROL_3, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	ili9225_command(dbi, ILI9225_POWER_CONTROL_4, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	ili9225_command(dbi, ILI9225_POWER_CONTROL_5, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	msleep(40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	ili9225_command(dbi, ILI9225_POWER_CONTROL_2, 0x0018);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	ili9225_command(dbi, ILI9225_POWER_CONTROL_3, 0x6121);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	ili9225_command(dbi, ILI9225_POWER_CONTROL_4, 0x006f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	ili9225_command(dbi, ILI9225_POWER_CONTROL_5, 0x495f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	ili9225_command(dbi, ILI9225_POWER_CONTROL_1, 0x0800);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	ili9225_command(dbi, ILI9225_POWER_CONTROL_2, 0x103b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	msleep(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	switch (dbidev->rotation) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		am_id = 0x30;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	case 90:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		am_id = 0x18;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	case 180:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		am_id = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	case 270:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		am_id = 0x28;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	ili9225_command(dbi, ILI9225_DRIVER_OUTPUT_CONTROL, 0x011c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	ili9225_command(dbi, ILI9225_LCD_AC_DRIVING_CONTROL, 0x0100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	ili9225_command(dbi, ILI9225_ENTRY_MODE, 0x1000 | am_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	ili9225_command(dbi, ILI9225_DISPLAY_CONTROL_1, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	ili9225_command(dbi, ILI9225_BLANK_PERIOD_CONTROL_1, 0x0808);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	ili9225_command(dbi, ILI9225_FRAME_CYCLE_CONTROL, 0x1100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	ili9225_command(dbi, ILI9225_INTERFACE_CONTROL, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	ili9225_command(dbi, ILI9225_OSCILLATION_CONTROL, 0x0d01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	ili9225_command(dbi, ILI9225_VCI_RECYCLING, 0x0020);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	ili9225_command(dbi, ILI9225_RAM_ADDRESS_SET_1, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	ili9225_command(dbi, ILI9225_RAM_ADDRESS_SET_2, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	ili9225_command(dbi, ILI9225_GATE_SCAN_CONTROL, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	ili9225_command(dbi, ILI9225_VERTICAL_SCROLL_1, 0x00db);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	ili9225_command(dbi, ILI9225_VERTICAL_SCROLL_2, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	ili9225_command(dbi, ILI9225_VERTICAL_SCROLL_3, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	ili9225_command(dbi, ILI9225_PARTIAL_DRIVING_POS_1, 0x00db);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	ili9225_command(dbi, ILI9225_PARTIAL_DRIVING_POS_2, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	ili9225_command(dbi, ILI9225_GAMMA_CONTROL_1, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	ili9225_command(dbi, ILI9225_GAMMA_CONTROL_2, 0x0808);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	ili9225_command(dbi, ILI9225_GAMMA_CONTROL_3, 0x080a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	ili9225_command(dbi, ILI9225_GAMMA_CONTROL_4, 0x000a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	ili9225_command(dbi, ILI9225_GAMMA_CONTROL_5, 0x0a08);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	ili9225_command(dbi, ILI9225_GAMMA_CONTROL_6, 0x0808);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	ili9225_command(dbi, ILI9225_GAMMA_CONTROL_7, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	ili9225_command(dbi, ILI9225_GAMMA_CONTROL_8, 0x0a00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	ili9225_command(dbi, ILI9225_GAMMA_CONTROL_9, 0x0710);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	ili9225_command(dbi, ILI9225_GAMMA_CONTROL_10, 0x0710);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	ili9225_command(dbi, ILI9225_DISPLAY_CONTROL_1, 0x0012);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	msleep(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	ili9225_command(dbi, ILI9225_DISPLAY_CONTROL_1, 0x1017);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	ili9225_fb_dirty(fb, &rect);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) out_exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	drm_dev_exit(idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) static void ili9225_pipe_disable(struct drm_simple_display_pipe *pipe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	struct mipi_dbi *dbi = &dbidev->dbi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	DRM_DEBUG_KMS("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	 * This callback is not protected by drm_dev_enter/exit since we want to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	 * turn off the display on regular driver unload. It's highly unlikely
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	 * that the underlying SPI controller is gone should this be called after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	 * unplug.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	ili9225_command(dbi, ILI9225_DISPLAY_CONTROL_1, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	msleep(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	ili9225_command(dbi, ILI9225_POWER_CONTROL_2, 0x0007);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	msleep(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	ili9225_command(dbi, ILI9225_POWER_CONTROL_1, 0x0a02);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) static int ili9225_dbi_command(struct mipi_dbi *dbi, u8 *cmd, u8 *par,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 			       size_t num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	struct spi_device *spi = dbi->spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	unsigned int bpw = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	u32 speed_hz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	gpiod_set_value_cansleep(dbi->dc, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	speed_hz = mipi_dbi_spi_cmd_max_speed(spi, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	ret = mipi_dbi_spi_transfer(spi, speed_hz, 8, cmd, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	if (ret || !num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	if (*cmd == ILI9225_WRITE_DATA_TO_GRAM && !dbi->swap_bytes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 		bpw = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	gpiod_set_value_cansleep(dbi->dc, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	speed_hz = mipi_dbi_spi_cmd_max_speed(spi, num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	return mipi_dbi_spi_transfer(spi, speed_hz, bpw, par, num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) static const struct drm_simple_display_pipe_funcs ili9225_pipe_funcs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	.enable		= ili9225_pipe_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	.disable	= ili9225_pipe_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	.update		= ili9225_pipe_update,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	.prepare_fb	= drm_gem_fb_simple_display_pipe_prepare_fb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) static const struct drm_display_mode ili9225_mode = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	DRM_SIMPLE_MODE(176, 220, 35, 44),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) DEFINE_DRM_GEM_CMA_FOPS(ili9225_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) static struct drm_driver ili9225_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	.driver_features	= DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	.fops			= &ili9225_fops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	DRM_GEM_CMA_DRIVER_OPS_VMAP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	.name			= "ili9225",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	.desc			= "Ilitek ILI9225",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	.date			= "20171106",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	.major			= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	.minor			= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) static const struct of_device_id ili9225_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	{ .compatible = "vot,v220hf01a-t" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) MODULE_DEVICE_TABLE(of, ili9225_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) static const struct spi_device_id ili9225_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	{ "v220hf01a-t", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) MODULE_DEVICE_TABLE(spi, ili9225_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) static int ili9225_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	struct device *dev = &spi->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	struct mipi_dbi_dev *dbidev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	struct drm_device *drm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	struct mipi_dbi *dbi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	struct gpio_desc *rs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	u32 rotation = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	dbidev = devm_drm_dev_alloc(dev, &ili9225_driver,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 				    struct mipi_dbi_dev, drm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	if (IS_ERR(dbidev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 		return PTR_ERR(dbidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	dbi = &dbidev->dbi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	drm = &dbidev->drm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	dbi->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	if (IS_ERR(dbi->reset)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 		DRM_DEV_ERROR(dev, "Failed to get gpio 'reset'\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 		return PTR_ERR(dbi->reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	rs = devm_gpiod_get(dev, "rs", GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	if (IS_ERR(rs)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 		DRM_DEV_ERROR(dev, "Failed to get gpio 'rs'\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 		return PTR_ERR(rs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	device_property_read_u32(dev, "rotation", &rotation);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	ret = mipi_dbi_spi_init(spi, dbi, rs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	/* override the command function set in  mipi_dbi_spi_init() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	dbi->command = ili9225_dbi_command;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	ret = mipi_dbi_dev_init(dbidev, &ili9225_pipe_funcs, &ili9225_mode, rotation);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	drm_mode_config_reset(drm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	ret = drm_dev_register(drm, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	spi_set_drvdata(spi, drm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 	drm_fbdev_generic_setup(drm, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) static int ili9225_remove(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 	struct drm_device *drm = spi_get_drvdata(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 	drm_dev_unplug(drm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 	drm_atomic_helper_shutdown(drm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) static void ili9225_shutdown(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	drm_atomic_helper_shutdown(spi_get_drvdata(spi));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) static struct spi_driver ili9225_spi_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 		.name = "ili9225",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 		.owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 		.of_match_table = ili9225_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 	.id_table = ili9225_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 	.probe = ili9225_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 	.remove = ili9225_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 	.shutdown = ili9225_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) module_spi_driver(ili9225_spi_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) MODULE_DESCRIPTION("Ilitek ILI9225 DRM driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) MODULE_AUTHOR("David Lechner <david@lechnology.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) MODULE_LICENSE("GPL");