Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) #undef TRACE_SYSTEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #define TRACE_SYSTEM tegra
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) #if !defined(DRM_TEGRA_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) #define DRM_TEGRA_TRACE_H 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/tracepoint.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) DECLARE_EVENT_CLASS(register_access,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 	TP_PROTO(struct device *dev, unsigned int offset, u32 value),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 	TP_ARGS(dev, offset, value),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	TP_STRUCT__entry(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 		__field(struct device *, dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 		__field(unsigned int, offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 		__field(u32, value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	TP_fast_assign(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 		__entry->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 		__entry->offset = offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 		__entry->value = value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	TP_printk("%s %04x %08x", dev_name(__entry->dev), __entry->offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 		  __entry->value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) DEFINE_EVENT(register_access, dc_writel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	TP_PROTO(struct device *dev, unsigned int offset, u32 value),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	TP_ARGS(dev, offset, value));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) DEFINE_EVENT(register_access, dc_readl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	TP_PROTO(struct device *dev, unsigned int offset, u32 value),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	TP_ARGS(dev, offset, value));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) DEFINE_EVENT(register_access, hdmi_writel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	TP_PROTO(struct device *dev, unsigned int offset, u32 value),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	TP_ARGS(dev, offset, value));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) DEFINE_EVENT(register_access, hdmi_readl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	TP_PROTO(struct device *dev, unsigned int offset, u32 value),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	TP_ARGS(dev, offset, value));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) DEFINE_EVENT(register_access, dsi_writel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	TP_PROTO(struct device *dev, unsigned int offset, u32 value),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	TP_ARGS(dev, offset, value));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) DEFINE_EVENT(register_access, dsi_readl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	TP_PROTO(struct device *dev, unsigned int offset, u32 value),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	TP_ARGS(dev, offset, value));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) DEFINE_EVENT(register_access, dpaux_writel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	TP_PROTO(struct device *dev, unsigned int offset, u32 value),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	TP_ARGS(dev, offset, value));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) DEFINE_EVENT(register_access, dpaux_readl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	TP_PROTO(struct device *dev, unsigned int offset, u32 value),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	TP_ARGS(dev, offset, value));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) DEFINE_EVENT(register_access, sor_writel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	TP_PROTO(struct device *dev, unsigned int offset, u32 value),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	TP_ARGS(dev, offset, value));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) DEFINE_EVENT(register_access, sor_readl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	TP_PROTO(struct device *dev, unsigned int offset, u32 value),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	TP_ARGS(dev, offset, value));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #endif /* DRM_TEGRA_TRACE_H */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* This part must be outside protection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #undef TRACE_INCLUDE_PATH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/tegra
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define TRACE_INCLUDE_FILE trace
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #include <trace/define_trace.h>