^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2013 NVIDIA Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include "mipi-phy.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Default D-PHY timings based on MIPI D-PHY specification. Derived from the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * valid ranges specified in Section 6.9, Table 14, Page 40 of the D-PHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * specification (v1.2) with minor adjustments.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) int mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) unsigned long period)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) timing->clkmiss = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) timing->clkpost = 70 + 52 * period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) timing->clkpre = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) timing->clkprepare = 65;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) timing->clksettle = 95;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) timing->clktermen = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) timing->clktrail = 80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) timing->clkzero = 260;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) timing->dtermen = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) timing->eot = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) timing->hsexit = 120;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) timing->hsprepare = 65 + 5 * period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) timing->hszero = 145 + 5 * period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) timing->hssettle = 85 + 6 * period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) timing->hsskip = 40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * The MIPI D-PHY specification (Section 6.9, v1.2, Table 14, Page 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * contains this formula as:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * T_HS-TRAIL = max(n * 8 * period, 60 + n * 4 * period)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * where n = 1 for forward-direction HS mode and n = 4 for reverse-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * direction HS mode. There's only one setting and this function does
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * not parameterize on anything other that period, so this code will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * assumes that reverse-direction HS mode is supported and uses n = 4.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) timing->hstrail = max(4 * 8 * period, 60 + 4 * 4 * period);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) timing->init = 100000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) timing->lpx = 60;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) timing->taget = 5 * timing->lpx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) timing->tago = 4 * timing->lpx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) timing->tasure = 2 * timing->lpx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) timing->wakeup = 1000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * Validate D-PHY timing according to MIPI D-PHY specification (v1.2, Section
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * Section 6.9 "Global Operation Timing Parameters").
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) int mipi_dphy_timing_validate(struct mipi_dphy_timing *timing,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) unsigned long period)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) if (timing->clkmiss > 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if (timing->clkpost < (60 + 52 * period))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) if (timing->clkpre < 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) if (timing->clkprepare < 38 || timing->clkprepare > 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (timing->clksettle < 95 || timing->clksettle > 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) if (timing->clktermen > 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) if (timing->clktrail < 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) if (timing->clkprepare + timing->clkzero < 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (timing->dtermen > 35 + 4 * period)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (timing->eot > 105 + 12 * period)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (timing->hsexit < 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) if (timing->hsprepare < 40 + 4 * period ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) timing->hsprepare > 85 + 6 * period)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) if (timing->hsprepare + timing->hszero < 145 + 10 * period)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if ((timing->hssettle < 85 + 6 * period) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) (timing->hssettle > 145 + 10 * period))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) if (timing->hsskip < 40 || timing->hsskip > 55 + 4 * period)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) if (timing->hstrail < max(8 * period, 60 + 4 * period))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if (timing->init < 100000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if (timing->lpx < 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) if (timing->taget != 5 * timing->lpx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) if (timing->tago != 4 * timing->lpx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) if (timing->tasure < timing->lpx || timing->tasure > 2 * timing->lpx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) if (timing->wakeup < 1000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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