^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2013 NVIDIA Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #ifndef TEGRA_GR2D_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define TEGRA_GR2D_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define GR2D_UA_BASE_ADDR 0x1a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define GR2D_VA_BASE_ADDR 0x1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define GR2D_PAT_BASE_ADDR 0x26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define GR2D_DSTA_BASE_ADDR 0x2b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define GR2D_DSTB_BASE_ADDR 0x2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define GR2D_DSTC_BASE_ADDR 0x2d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define GR2D_SRCA_BASE_ADDR 0x31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define GR2D_SRCB_BASE_ADDR 0x32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define GR2D_PATBASE_ADDR 0x47
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define GR2D_SRC_BASE_ADDR_SB 0x48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define GR2D_DSTA_BASE_ADDR_SB 0x49
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define GR2D_DSTB_BASE_ADDR_SB 0x4a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define GR2D_UA_BASE_ADDR_SB 0x4b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define GR2D_VA_BASE_ADDR_SB 0x4c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define GR2D_NUM_REGS 0x4d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #endif