Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Tegra host1x GEM implementation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (c) 2012-2013, NVIDIA Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #ifndef __HOST1X_GEM_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define __HOST1X_GEM_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/host1x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <drm/drm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <drm/drm_gem.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define TEGRA_BO_BOTTOM_UP (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) enum tegra_bo_tiling_mode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	TEGRA_BO_TILING_MODE_PITCH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	TEGRA_BO_TILING_MODE_TILED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	TEGRA_BO_TILING_MODE_BLOCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct tegra_bo_tiling {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	enum tegra_bo_tiling_mode mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	unsigned long value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct tegra_bo {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	struct drm_gem_object gem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	struct host1x_bo base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	struct sg_table *sgt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	dma_addr_t iova;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	void *vaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	struct drm_mm_node *mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	unsigned long num_pages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	struct page **pages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	/* size of IOMMU mapping */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	size_t size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	struct tegra_bo_tiling tiling;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static inline struct tegra_bo *to_tegra_bo(struct drm_gem_object *gem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	return container_of(gem, struct tegra_bo, gem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static inline struct tegra_bo *host1x_to_tegra_bo(struct host1x_bo *bo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	return container_of(bo, struct tegra_bo, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct tegra_bo *tegra_bo_create(struct drm_device *drm, size_t size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 				 unsigned long flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct tegra_bo *tegra_bo_create_with_handle(struct drm_file *file,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 					     struct drm_device *drm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 					     size_t size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 					     unsigned long flags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 					     u32 *handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) void tegra_bo_free_object(struct drm_gem_object *gem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) int tegra_bo_dumb_create(struct drm_file *file, struct drm_device *drm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 			 struct drm_mode_create_dumb *args);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) extern const struct vm_operations_struct tegra_bo_vm_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) int __tegra_gem_mmap(struct drm_gem_object *gem, struct vm_area_struct *vma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) int tegra_drm_mmap(struct file *file, struct vm_area_struct *vma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) struct dma_buf *tegra_gem_prime_export(struct drm_gem_object *gem,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 				       int flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct drm_gem_object *tegra_gem_prime_import(struct drm_device *drm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 					      struct dma_buf *buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #endif