Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (C) 2012 Avionic Design GmbH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (C) 2012-2013 NVIDIA CORPORATION.  All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #ifndef HOST1X_DRM_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #define HOST1X_DRM_H 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/host1x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/iova.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <drm/drm_atomic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <drm/drm_bridge.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <drm/drm_edid.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <drm/drm_encoder.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <drm/drm_fb_helper.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <drm/drm_fixed.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <drm/drm_probe_helper.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <uapi/drm/tegra_drm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include "gem.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include "hub.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include "trace.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) struct reset_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #ifdef CONFIG_DRM_FBDEV_EMULATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) struct tegra_fbdev {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	struct drm_fb_helper base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	struct drm_framebuffer *fb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) struct tegra_drm {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	struct drm_device *drm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	struct iommu_domain *domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	bool use_explicit_iommu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	struct mutex mm_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	struct drm_mm mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 		struct iova_domain domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 		unsigned long shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 		unsigned long limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	} carveout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	struct mutex clients_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	struct list_head clients;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #ifdef CONFIG_DRM_FBDEV_EMULATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	struct tegra_fbdev *fbdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	unsigned int pitch_align;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	struct tegra_display_hub *hub;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) struct tegra_drm_client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) struct tegra_drm_context {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	struct tegra_drm_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	struct host1x_channel *channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	unsigned int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) struct tegra_drm_client_ops {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	int (*open_channel)(struct tegra_drm_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 			    struct tegra_drm_context *context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	void (*close_channel)(struct tegra_drm_context *context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	int (*is_addr_reg)(struct device *dev, u32 class, u32 offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	int (*is_valid_class)(u32 class);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	int (*submit)(struct tegra_drm_context *context,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		      struct drm_tegra_submit *args, struct drm_device *drm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		      struct drm_file *file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) int tegra_drm_submit(struct tegra_drm_context *context,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		     struct drm_tegra_submit *args, struct drm_device *drm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		     struct drm_file *file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) struct tegra_drm_client {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	struct host1x_client base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	struct tegra_drm *drm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	unsigned int version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	const struct tegra_drm_client_ops *ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) static inline struct tegra_drm_client *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) host1x_to_drm_client(struct host1x_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	return container_of(client, struct tegra_drm_client, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) int tegra_drm_register_client(struct tegra_drm *tegra,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 			      struct tegra_drm_client *client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) int tegra_drm_unregister_client(struct tegra_drm *tegra,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 				struct tegra_drm_client *client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) int host1x_client_iommu_attach(struct host1x_client *client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) void host1x_client_iommu_detach(struct host1x_client *client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) int tegra_drm_init(struct tegra_drm *tegra, struct drm_device *drm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) int tegra_drm_exit(struct tegra_drm *tegra);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) void *tegra_drm_alloc(struct tegra_drm *tegra, size_t size, dma_addr_t *iova);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) void tegra_drm_free(struct tegra_drm *tegra, size_t size, void *virt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		    dma_addr_t iova);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct cec_notifier;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) struct tegra_output {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	struct device_node *of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	struct drm_bridge *bridge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	struct drm_panel *panel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	struct i2c_adapter *ddc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	const struct edid *edid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	struct cec_notifier *cec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	unsigned int hpd_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	struct gpio_desc *hpd_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	struct drm_encoder encoder;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	struct drm_connector connector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static inline struct tegra_output *encoder_to_output(struct drm_encoder *e)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	return container_of(e, struct tegra_output, encoder);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static inline struct tegra_output *connector_to_output(struct drm_connector *c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	return container_of(c, struct tegra_output, connector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /* from output.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) int tegra_output_probe(struct tegra_output *output);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) void tegra_output_remove(struct tegra_output *output);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) int tegra_output_init(struct drm_device *drm, struct tegra_output *output);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) void tegra_output_exit(struct tegra_output *output);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) void tegra_output_find_possible_crtcs(struct tegra_output *output,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 				      struct drm_device *drm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) int tegra_output_suspend(struct tegra_output *output);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) int tegra_output_resume(struct tegra_output *output);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) int tegra_output_connector_get_modes(struct drm_connector *connector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) enum drm_connector_status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) tegra_output_connector_detect(struct drm_connector *connector, bool force);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) void tegra_output_connector_destroy(struct drm_connector *connector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) /* from dpaux.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) struct drm_dp_aux *drm_dp_aux_find_by_of_node(struct device_node *np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) enum drm_connector_status drm_dp_aux_detect(struct drm_dp_aux *aux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) int drm_dp_aux_attach(struct drm_dp_aux *aux, struct tegra_output *output);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) int drm_dp_aux_detach(struct drm_dp_aux *aux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) int drm_dp_aux_enable(struct drm_dp_aux *aux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) int drm_dp_aux_disable(struct drm_dp_aux *aux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) /* from fb.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) struct tegra_bo *tegra_fb_get_plane(struct drm_framebuffer *framebuffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 				    unsigned int index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) bool tegra_fb_is_bottom_up(struct drm_framebuffer *framebuffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) int tegra_fb_get_tiling(struct drm_framebuffer *framebuffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 			struct tegra_bo_tiling *tiling);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) struct drm_framebuffer *tegra_fb_create(struct drm_device *drm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 					struct drm_file *file,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 					const struct drm_mode_fb_cmd2 *cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) int tegra_drm_fb_prepare(struct drm_device *drm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) void tegra_drm_fb_free(struct drm_device *drm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) int tegra_drm_fb_init(struct drm_device *drm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) void tegra_drm_fb_exit(struct drm_device *drm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) extern struct platform_driver tegra_display_hub_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) extern struct platform_driver tegra_dc_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) extern struct platform_driver tegra_hdmi_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) extern struct platform_driver tegra_dsi_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) extern struct platform_driver tegra_dpaux_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) extern struct platform_driver tegra_sor_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) extern struct platform_driver tegra_gr2d_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) extern struct platform_driver tegra_gr3d_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) extern struct platform_driver tegra_vic_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #endif /* HOST1X_DRM_H */