^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright 2008 Advanced Micro Devices, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright 2008 Red Hat Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright 2009 Jerome Glisse.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Permission is hereby granted, free of charge, to any person obtaining a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * copy of this software and associated documentation files (the "Software"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * to deal in the Software without restriction, including without limitation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * the rights to use, copy, modify, merge, publish, distribute, sublicense,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * and/or sell copies of the Software, and to permit persons to whom the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Software is furnished to do so, subject to the following conditions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * The above copyright notice and this permission notice shall be included in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * all copies or substantial portions of the Software.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * OTHER DEALINGS IN THE SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * Authors: Dave Airlie
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * Alex Deucher
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * Jerome Glisse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #ifndef __RS690D_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define __RS690D_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /* Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define R_00001E_K8_FB_LOCATION 0x00001E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define R_00005F_MC_MISC_UMA_CNTL 0x00005F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define G_00005F_K8_ADDR_EXT(x) (((x) >> 0) & 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define R_000078_MC_INDEX 0x000078
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define S_000078_MC_IND_ADDR(x) (((x) & 0x1FF) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define G_000078_MC_IND_ADDR(x) (((x) >> 0) & 0x1FF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define C_000078_MC_IND_ADDR 0xFFFFFE00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define S_000078_MC_IND_WR_EN(x) (((x) & 0x1) << 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define G_000078_MC_IND_WR_EN(x) (((x) >> 9) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define C_000078_MC_IND_WR_EN 0xFFFFFDFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define R_00007C_MC_DATA 0x00007C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define S_00007C_MC_DATA(x) (((x) & 0xFFFFFFFF) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define G_00007C_MC_DATA(x) (((x) >> 0) & 0xFFFFFFFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define C_00007C_MC_DATA 0x00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define R_0000F8_CONFIG_MEMSIZE 0x0000F8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define S_0000F8_CONFIG_MEMSIZE(x) (((x) & 0xFFFFFFFF) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define G_0000F8_CONFIG_MEMSIZE(x) (((x) >> 0) & 0xFFFFFFFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define C_0000F8_CONFIG_MEMSIZE 0x00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define R_000134_HDP_FB_LOCATION 0x000134
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define S_000134_HDP_FB_START(x) (((x) & 0xFFFF) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define G_000134_HDP_FB_START(x) (((x) >> 0) & 0xFFFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define C_000134_HDP_FB_START 0xFFFF0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define R_0007C0_CP_STAT 0x0007C0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define C_0007C0_MRU_BUSY 0xFFFFFFFE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define C_0007C0_MWU_BUSY 0xFFFFFFFD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define C_0007C0_RSIU_BUSY 0xFFFFFFFB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define C_0007C0_RCIU_BUSY 0xFFFFFFF7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define C_0007C0_CSF_PRIMARY_BUSY 0xFFFFFDFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define C_0007C0_CSF_INDIRECT_BUSY 0xFFFFFBFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define C_0007C0_CSQ_PRIMARY_BUSY 0xFFFFF7FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define C_0007C0_CSQ_INDIRECT_BUSY 0xFFFFEFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define C_0007C0_CSI_BUSY 0xFFFFDFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define C_0007C0_CSF_INDIRECT2_BUSY 0xFFFFBFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define C_0007C0_CSQ_INDIRECT2_BUSY 0xFFFF7FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define C_0007C0_GUIDMA_BUSY 0xEFFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define C_0007C0_VIDDMA_BUSY 0xDFFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define C_0007C0_CMDSTRM_BUSY 0xBFFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define C_0007C0_CP_BUSY 0x7FFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define R_000E40_RBBM_STATUS 0x000E40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define C_000E40_CMDFIFO_AVAIL 0xFFFFFF80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define C_000E40_HIRQ_ON_RBB 0xFFFFFEFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define C_000E40_CPRQ_ON_RBB 0xFFFFFDFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define C_000E40_CFRQ_ON_RBB 0xFFFFFBFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define C_000E40_HIRQ_IN_RTBUF 0xFFFFF7FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define C_000E40_CPRQ_IN_RTBUF 0xFFFFEFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define C_000E40_CFRQ_IN_RTBUF 0xFFFFDFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define C_000E40_CF_PIPE_BUSY 0xFFFFBFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define C_000E40_ENG_EV_BUSY 0xFFFF7FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define C_000E40_CP_CMDSTRM_BUSY 0xFFFEFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define C_000E40_E2_BUSY 0xFFFDFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define C_000E40_RB2D_BUSY 0xFFFBFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define C_000E40_RB3D_BUSY 0xFFF7FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define C_000E40_VAP_BUSY 0xFFEFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define C_000E40_RE_BUSY 0xFFDFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define C_000E40_TAM_BUSY 0xFFBFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define C_000E40_TDM_BUSY 0xFF7FFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define C_000E40_PB_BUSY 0xFEFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #define C_000E40_TIM_BUSY 0xFDFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define C_000E40_GA_BUSY 0xFBFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define C_000E40_CBA2D_BUSY 0xF7FFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define C_000E40_GUI_ACTIVE 0x7FFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define R_006520_DC_LB_MEMORY_SPLIT 0x006520
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #define S_006520_DC_LB_MEMORY_SPLIT(x) (((x) & 0x3) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #define G_006520_DC_LB_MEMORY_SPLIT(x) (((x) >> 0) & 0x3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #define C_006520_DC_LB_MEMORY_SPLIT 0xFFFFFFFC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #define S_006520_DC_LB_MEMORY_SPLIT_MODE(x) (((x) & 0x1) << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define G_006520_DC_LB_MEMORY_SPLIT_MODE(x) (((x) >> 2) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define C_006520_DC_LB_MEMORY_SPLIT_MODE 0xFFFFFFFB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define V_006520_DC_LB_MEMORY_SPLIT_D1HALF_D2HALF 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define V_006520_DC_LB_MEMORY_SPLIT_D1_3Q_D2_1Q 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #define V_006520_DC_LB_MEMORY_SPLIT_D1_ONLY 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define V_006520_DC_LB_MEMORY_SPLIT_D1_1Q_D2_3Q 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #define S_006520_DC_LB_DISP1_END_ADR(x) (((x) & 0x7FF) << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #define G_006520_DC_LB_DISP1_END_ADR(x) (((x) >> 4) & 0x7FF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #define C_006520_DC_LB_DISP1_END_ADR 0xFFFF800F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #define R_006548_D1MODE_PRIORITY_A_CNT 0x006548
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #define S_006548_D1MODE_PRIORITY_MARK_A(x) (((x) & 0x7FFF) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #define G_006548_D1MODE_PRIORITY_MARK_A(x) (((x) >> 0) & 0x7FFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #define C_006548_D1MODE_PRIORITY_MARK_A 0xFFFF8000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #define S_006548_D1MODE_PRIORITY_A_OFF(x) (((x) & 0x1) << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #define G_006548_D1MODE_PRIORITY_A_OFF(x) (((x) >> 16) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #define C_006548_D1MODE_PRIORITY_A_OFF 0xFFFEFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #define S_006548_D1MODE_PRIORITY_A_ALWAYS_ON(x) (((x) & 0x1) << 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #define G_006548_D1MODE_PRIORITY_A_ALWAYS_ON(x) (((x) >> 20) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) #define C_006548_D1MODE_PRIORITY_A_ALWAYS_ON 0xFFEFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #define S_006548_D1MODE_PRIORITY_A_FORCE_MASK(x) (((x) & 0x1) << 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #define G_006548_D1MODE_PRIORITY_A_FORCE_MASK(x) (((x) >> 24) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) #define C_006548_D1MODE_PRIORITY_A_FORCE_MASK 0xFEFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #define R_00654C_D1MODE_PRIORITY_B_CNT 0x00654C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) #define S_00654C_D1MODE_PRIORITY_MARK_B(x) (((x) & 0x7FFF) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #define G_00654C_D1MODE_PRIORITY_MARK_B(x) (((x) >> 0) & 0x7FFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) #define C_00654C_D1MODE_PRIORITY_MARK_B 0xFFFF8000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) #define S_00654C_D1MODE_PRIORITY_B_OFF(x) (((x) & 0x1) << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #define G_00654C_D1MODE_PRIORITY_B_OFF(x) (((x) >> 16) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define C_00654C_D1MODE_PRIORITY_B_OFF 0xFFFEFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #define S_00654C_D1MODE_PRIORITY_B_ALWAYS_ON(x) (((x) & 0x1) << 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) #define G_00654C_D1MODE_PRIORITY_B_ALWAYS_ON(x) (((x) >> 20) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) #define C_00654C_D1MODE_PRIORITY_B_ALWAYS_ON 0xFFEFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) #define S_00654C_D1MODE_PRIORITY_B_FORCE_MASK(x) (((x) & 0x1) << 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #define G_00654C_D1MODE_PRIORITY_B_FORCE_MASK(x) (((x) >> 24) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) #define C_00654C_D1MODE_PRIORITY_B_FORCE_MASK 0xFEFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) #define R_006C9C_DCP_CONTROL 0x006C9C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #define R_006D48_D2MODE_PRIORITY_A_CNT 0x006D48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) #define S_006D48_D2MODE_PRIORITY_MARK_A(x) (((x) & 0x7FFF) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) #define G_006D48_D2MODE_PRIORITY_MARK_A(x) (((x) >> 0) & 0x7FFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) #define C_006D48_D2MODE_PRIORITY_MARK_A 0xFFFF8000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) #define S_006D48_D2MODE_PRIORITY_A_OFF(x) (((x) & 0x1) << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) #define G_006D48_D2MODE_PRIORITY_A_OFF(x) (((x) >> 16) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) #define C_006D48_D2MODE_PRIORITY_A_OFF 0xFFFEFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) #define S_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(x) (((x) & 0x1) << 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) #define G_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(x) (((x) >> 20) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) #define C_006D48_D2MODE_PRIORITY_A_ALWAYS_ON 0xFFEFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) #define S_006D48_D2MODE_PRIORITY_A_FORCE_MASK(x) (((x) & 0x1) << 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) #define G_006D48_D2MODE_PRIORITY_A_FORCE_MASK(x) (((x) >> 24) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) #define C_006D48_D2MODE_PRIORITY_A_FORCE_MASK 0xFEFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) #define R_006D4C_D2MODE_PRIORITY_B_CNT 0x006D4C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) #define S_006D4C_D2MODE_PRIORITY_MARK_B(x) (((x) & 0x7FFF) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) #define G_006D4C_D2MODE_PRIORITY_MARK_B(x) (((x) >> 0) & 0x7FFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) #define C_006D4C_D2MODE_PRIORITY_MARK_B 0xFFFF8000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) #define S_006D4C_D2MODE_PRIORITY_B_OFF(x) (((x) & 0x1) << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) #define G_006D4C_D2MODE_PRIORITY_B_OFF(x) (((x) >> 16) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) #define C_006D4C_D2MODE_PRIORITY_B_OFF 0xFFFEFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) #define S_006D4C_D2MODE_PRIORITY_B_ALWAYS_ON(x) (((x) & 0x1) << 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) #define G_006D4C_D2MODE_PRIORITY_B_ALWAYS_ON(x) (((x) >> 20) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) #define C_006D4C_D2MODE_PRIORITY_B_ALWAYS_ON 0xFFEFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) #define S_006D4C_D2MODE_PRIORITY_B_FORCE_MASK(x) (((x) & 0x1) << 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) #define G_006D4C_D2MODE_PRIORITY_B_FORCE_MASK(x) (((x) >> 24) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) #define C_006D4C_D2MODE_PRIORITY_B_FORCE_MASK 0xFEFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) #define R_006D58_LB_MAX_REQ_OUTSTANDING 0x006D58
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) #define S_006D58_LB_D1_MAX_REQ_OUTSTANDING(x) (((x) & 0xF) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) #define G_006D58_LB_D1_MAX_REQ_OUTSTANDING(x) (((x) >> 0) & 0xF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) #define C_006D58_LB_D1_MAX_REQ_OUTSTANDING 0xFFFFFFF0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) #define S_006D58_LB_D2_MAX_REQ_OUTSTANDING(x) (((x) & 0xF) << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) #define G_006D58_LB_D2_MAX_REQ_OUTSTANDING(x) (((x) >> 16) & 0xF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) #define C_006D58_LB_D2_MAX_REQ_OUTSTANDING 0xFFF0FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) #define R_000090_MC_SYSTEM_STATUS 0x000090
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) #define S_000090_MC_SYSTEM_IDLE(x) (((x) & 0x1) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) #define G_000090_MC_SYSTEM_IDLE(x) (((x) >> 0) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) #define C_000090_MC_SYSTEM_IDLE 0xFFFFFFFE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) #define S_000090_MC_SEQUENCER_IDLE(x) (((x) & 0x1) << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) #define G_000090_MC_SEQUENCER_IDLE(x) (((x) >> 1) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) #define C_000090_MC_SEQUENCER_IDLE 0xFFFFFFFD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) #define S_000090_MC_ARBITER_IDLE(x) (((x) & 0x1) << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) #define G_000090_MC_ARBITER_IDLE(x) (((x) >> 2) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) #define C_000090_MC_ARBITER_IDLE 0xFFFFFFFB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) #define S_000090_MC_SELECT_PM(x) (((x) & 0x1) << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) #define G_000090_MC_SELECT_PM(x) (((x) >> 3) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) #define C_000090_MC_SELECT_PM 0xFFFFFFF7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) #define S_000090_RESERVED4(x) (((x) & 0xF) << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) #define G_000090_RESERVED4(x) (((x) >> 4) & 0xF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) #define C_000090_RESERVED4 0xFFFFFF0F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) #define S_000090_RESERVED8(x) (((x) & 0xF) << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) #define G_000090_RESERVED8(x) (((x) >> 8) & 0xF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) #define C_000090_RESERVED8 0xFFFFF0FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) #define S_000090_RESERVED12(x) (((x) & 0xF) << 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) #define G_000090_RESERVED12(x) (((x) >> 12) & 0xF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) #define C_000090_RESERVED12 0xFFFF0FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) #define S_000090_MCA_INIT_EXECUTED(x) (((x) & 0x1) << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) #define G_000090_MCA_INIT_EXECUTED(x) (((x) >> 16) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) #define C_000090_MCA_INIT_EXECUTED 0xFFFEFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) #define S_000090_MCA_IDLE(x) (((x) & 0x1) << 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) #define G_000090_MCA_IDLE(x) (((x) >> 17) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) #define C_000090_MCA_IDLE 0xFFFDFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) #define S_000090_MCA_SEQ_IDLE(x) (((x) & 0x1) << 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) #define G_000090_MCA_SEQ_IDLE(x) (((x) >> 18) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) #define C_000090_MCA_SEQ_IDLE 0xFFFBFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) #define S_000090_MCA_ARB_IDLE(x) (((x) & 0x1) << 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) #define G_000090_MCA_ARB_IDLE(x) (((x) >> 19) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) #define C_000090_MCA_ARB_IDLE 0xFFF7FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) #define S_000090_RESERVED20(x) (((x) & 0xFFF) << 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) #define G_000090_RESERVED20(x) (((x) >> 20) & 0xFFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) #define C_000090_RESERVED20 0x000FFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) #define R_000100_MCCFG_FB_LOCATION 0x000100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) #define S_000100_MC_FB_START(x) (((x) & 0xFFFF) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) #define G_000100_MC_FB_START(x) (((x) >> 0) & 0xFFFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) #define C_000100_MC_FB_START 0xFFFF0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) #define S_000100_MC_FB_TOP(x) (((x) & 0xFFFF) << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) #define G_000100_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) #define C_000100_MC_FB_TOP 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) #define R_000104_MC_INIT_MISC_LAT_TIMER 0x000104
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) #define S_000104_MC_CPR_INIT_LAT(x) (((x) & 0xF) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) #define G_000104_MC_CPR_INIT_LAT(x) (((x) >> 0) & 0xF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) #define C_000104_MC_CPR_INIT_LAT 0xFFFFFFF0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) #define S_000104_MC_VF_INIT_LAT(x) (((x) & 0xF) << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) #define G_000104_MC_VF_INIT_LAT(x) (((x) >> 4) & 0xF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) #define C_000104_MC_VF_INIT_LAT 0xFFFFFF0F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) #define S_000104_MC_DISP0R_INIT_LAT(x) (((x) & 0xF) << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) #define G_000104_MC_DISP0R_INIT_LAT(x) (((x) >> 8) & 0xF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) #define C_000104_MC_DISP0R_INIT_LAT 0xFFFFF0FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) #define S_000104_MC_DISP1R_INIT_LAT(x) (((x) & 0xF) << 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) #define G_000104_MC_DISP1R_INIT_LAT(x) (((x) >> 12) & 0xF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) #define C_000104_MC_DISP1R_INIT_LAT 0xFFFF0FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) #define S_000104_MC_FIXED_INIT_LAT(x) (((x) & 0xF) << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) #define G_000104_MC_FIXED_INIT_LAT(x) (((x) >> 16) & 0xF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) #define C_000104_MC_FIXED_INIT_LAT 0xFFF0FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) #define S_000104_MC_E2R_INIT_LAT(x) (((x) & 0xF) << 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) #define G_000104_MC_E2R_INIT_LAT(x) (((x) >> 20) & 0xF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) #define C_000104_MC_E2R_INIT_LAT 0xFF0FFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) #define S_000104_SAME_PAGE_PRIO(x) (((x) & 0xF) << 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) #define G_000104_SAME_PAGE_PRIO(x) (((x) >> 24) & 0xF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) #define C_000104_SAME_PAGE_PRIO 0xF0FFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) #define S_000104_MC_GLOBW_INIT_LAT(x) (((x) & 0xF) << 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) #define G_000104_MC_GLOBW_INIT_LAT(x) (((x) >> 28) & 0xF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) #define C_000104_MC_GLOBW_INIT_LAT 0x0FFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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