^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright 2008 Advanced Micro Devices, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright 2008 Red Hat Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright 2009 Jerome Glisse.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Permission is hereby granted, free of charge, to any person obtaining a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * copy of this software and associated documentation files (the "Software"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * to deal in the Software without restriction, including without limitation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * the rights to use, copy, modify, merge, publish, distribute, sublicense,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * and/or sell copies of the Software, and to permit persons to whom the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Software is furnished to do so, subject to the following conditions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * The above copyright notice and this permission notice shall be included in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * all copies or substantial portions of the Software.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * OTHER DEALINGS IN THE SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * Authors: Dave Airlie
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * Alex Deucher
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * Jerome Glisse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #ifndef __R300D_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define __R300D_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define CP_PACKET0 0x00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define PACKET0_BASE_INDEX_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define PACKET0_BASE_INDEX_MASK (0x1ffff << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define PACKET0_COUNT_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define PACKET0_COUNT_MASK (0x3fff << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define CP_PACKET1 0x40000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define CP_PACKET2 0x80000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define PACKET2_PAD_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define PACKET2_PAD_MASK (0x3fffffff << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define CP_PACKET3 0xC0000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define PACKET3_IT_OPCODE_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define PACKET3_IT_OPCODE_MASK (0xff << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define PACKET3_COUNT_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define PACKET3_COUNT_MASK (0x3fff << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /* PACKET3 op code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define PACKET3_NOP 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define PACKET3_3D_DRAW_VBUF 0x28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define PACKET3_3D_DRAW_IMMD 0x29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define PACKET3_3D_DRAW_INDX 0x2A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define PACKET3_3D_LOAD_VBPNTR 0x2F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define PACKET3_3D_CLEAR_ZMASK 0x32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define PACKET3_INDX_BUFFER 0x33
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define PACKET3_3D_DRAW_VBUF_2 0x34
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define PACKET3_3D_DRAW_IMMD_2 0x35
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define PACKET3_3D_DRAW_INDX_2 0x36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define PACKET3_3D_CLEAR_HIZ 0x37
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define PACKET3_3D_CLEAR_CMASK 0x38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define PACKET3_BITBLT_MULTI 0x9B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define PACKET0(reg, n) (CP_PACKET0 | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) REG_SET(PACKET0_BASE_INDEX, (reg) >> 2) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) REG_SET(PACKET0_COUNT, (n)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define PACKET3(op, n) (CP_PACKET3 | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) REG_SET(PACKET3_IT_OPCODE, (op)) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) REG_SET(PACKET3_COUNT, (n)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define R_000148_MC_FB_LOCATION 0x000148
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define S_000148_MC_FB_START(x) (((x) & 0xFFFF) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define G_000148_MC_FB_START(x) (((x) >> 0) & 0xFFFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define C_000148_MC_FB_START 0xFFFF0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define S_000148_MC_FB_TOP(x) (((x) & 0xFFFF) << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define G_000148_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define C_000148_MC_FB_TOP 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define R_00014C_MC_AGP_LOCATION 0x00014C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define S_00014C_MC_AGP_START(x) (((x) & 0xFFFF) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define G_00014C_MC_AGP_START(x) (((x) >> 0) & 0xFFFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define C_00014C_MC_AGP_START 0xFFFF0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define S_00014C_MC_AGP_TOP(x) (((x) & 0xFFFF) << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define G_00014C_MC_AGP_TOP(x) (((x) >> 16) & 0xFFFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define C_00014C_MC_AGP_TOP 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define R_00015C_AGP_BASE_2 0x00015C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define S_00015C_AGP_BASE_ADDR_2(x) (((x) & 0xF) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define G_00015C_AGP_BASE_ADDR_2(x) (((x) >> 0) & 0xF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define C_00015C_AGP_BASE_ADDR_2 0xFFFFFFF0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define R_000170_AGP_BASE 0x000170
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define S_000170_AGP_BASE_ADDR(x) (((x) & 0xFFFFFFFF) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define G_000170_AGP_BASE_ADDR(x) (((x) >> 0) & 0xFFFFFFFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define C_000170_AGP_BASE_ADDR 0x00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define R_0007C0_CP_STAT 0x0007C0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define C_0007C0_MRU_BUSY 0xFFFFFFFE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define C_0007C0_MWU_BUSY 0xFFFFFFFD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define C_0007C0_RSIU_BUSY 0xFFFFFFFB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define C_0007C0_RCIU_BUSY 0xFFFFFFF7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define C_0007C0_CSF_PRIMARY_BUSY 0xFFFFFDFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define C_0007C0_CSF_INDIRECT_BUSY 0xFFFFFBFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define C_0007C0_CSQ_PRIMARY_BUSY 0xFFFFF7FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define C_0007C0_CSQ_INDIRECT_BUSY 0xFFFFEFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define C_0007C0_CSI_BUSY 0xFFFFDFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define C_0007C0_CSF_INDIRECT2_BUSY 0xFFFFBFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define C_0007C0_CSQ_INDIRECT2_BUSY 0xFFFF7FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define C_0007C0_GUIDMA_BUSY 0xEFFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define C_0007C0_VIDDMA_BUSY 0xDFFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define C_0007C0_CMDSTRM_BUSY 0xBFFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define C_0007C0_CP_BUSY 0x7FFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define R_000E40_RBBM_STATUS 0x000E40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define C_000E40_CMDFIFO_AVAIL 0xFFFFFF80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define C_000E40_HIRQ_ON_RBB 0xFFFFFEFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define C_000E40_CPRQ_ON_RBB 0xFFFFFDFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define C_000E40_CFRQ_ON_RBB 0xFFFFFBFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define C_000E40_HIRQ_IN_RTBUF 0xFFFFF7FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define C_000E40_CPRQ_IN_RTBUF 0xFFFFEFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define C_000E40_CFRQ_IN_RTBUF 0xFFFFDFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #define C_000E40_CF_PIPE_BUSY 0xFFFFBFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define C_000E40_ENG_EV_BUSY 0xFFFF7FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define C_000E40_CP_CMDSTRM_BUSY 0xFFFEFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #define C_000E40_E2_BUSY 0xFFFDFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define C_000E40_RB2D_BUSY 0xFFFBFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #define C_000E40_RB3D_BUSY 0xFFF7FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #define C_000E40_VAP_BUSY 0xFFEFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #define C_000E40_RE_BUSY 0xFFDFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #define C_000E40_TAM_BUSY 0xFFBFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #define C_000E40_TDM_BUSY 0xFF7FFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) #define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #define C_000E40_PB_BUSY 0xFEFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) #define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #define C_000E40_TIM_BUSY 0xFDFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) #define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) #define C_000E40_GA_BUSY 0xFBFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) #define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define C_000E40_CBA2D_BUSY 0xF7FFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) #define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) #define C_000E40_GUI_ACTIVE 0x7FFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) #define R_0000F0_RBBM_SOFT_RESET 0x0000F0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #define S_0000F0_SOFT_RESET_CP(x) (((x) & 0x1) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) #define G_0000F0_SOFT_RESET_CP(x) (((x) >> 0) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) #define C_0000F0_SOFT_RESET_CP 0xFFFFFFFE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #define S_0000F0_SOFT_RESET_HI(x) (((x) & 0x1) << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) #define G_0000F0_SOFT_RESET_HI(x) (((x) >> 1) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) #define C_0000F0_SOFT_RESET_HI 0xFFFFFFFD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) #define S_0000F0_SOFT_RESET_VAP(x) (((x) & 0x1) << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) #define G_0000F0_SOFT_RESET_VAP(x) (((x) >> 2) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) #define C_0000F0_SOFT_RESET_VAP 0xFFFFFFFB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) #define S_0000F0_SOFT_RESET_RE(x) (((x) & 0x1) << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) #define G_0000F0_SOFT_RESET_RE(x) (((x) >> 3) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) #define C_0000F0_SOFT_RESET_RE 0xFFFFFFF7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) #define S_0000F0_SOFT_RESET_PP(x) (((x) & 0x1) << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) #define G_0000F0_SOFT_RESET_PP(x) (((x) >> 4) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) #define C_0000F0_SOFT_RESET_PP 0xFFFFFFEF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) #define S_0000F0_SOFT_RESET_E2(x) (((x) & 0x1) << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) #define G_0000F0_SOFT_RESET_E2(x) (((x) >> 5) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) #define C_0000F0_SOFT_RESET_E2 0xFFFFFFDF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) #define S_0000F0_SOFT_RESET_RB(x) (((x) & 0x1) << 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) #define G_0000F0_SOFT_RESET_RB(x) (((x) >> 6) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) #define C_0000F0_SOFT_RESET_RB 0xFFFFFFBF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) #define S_0000F0_SOFT_RESET_HDP(x) (((x) & 0x1) << 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) #define G_0000F0_SOFT_RESET_HDP(x) (((x) >> 7) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) #define C_0000F0_SOFT_RESET_HDP 0xFFFFFF7F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) #define S_0000F0_SOFT_RESET_MC(x) (((x) & 0x1) << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) #define G_0000F0_SOFT_RESET_MC(x) (((x) >> 8) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) #define C_0000F0_SOFT_RESET_MC 0xFFFFFEFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) #define S_0000F0_SOFT_RESET_AIC(x) (((x) & 0x1) << 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) #define G_0000F0_SOFT_RESET_AIC(x) (((x) >> 9) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) #define C_0000F0_SOFT_RESET_AIC 0xFFFFFDFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) #define S_0000F0_SOFT_RESET_VIP(x) (((x) & 0x1) << 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) #define G_0000F0_SOFT_RESET_VIP(x) (((x) >> 10) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) #define C_0000F0_SOFT_RESET_VIP 0xFFFFFBFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) #define S_0000F0_SOFT_RESET_DISP(x) (((x) & 0x1) << 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) #define G_0000F0_SOFT_RESET_DISP(x) (((x) >> 11) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) #define C_0000F0_SOFT_RESET_DISP 0xFFFFF7FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) #define S_0000F0_SOFT_RESET_CG(x) (((x) & 0x1) << 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) #define G_0000F0_SOFT_RESET_CG(x) (((x) >> 12) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) #define C_0000F0_SOFT_RESET_CG 0xFFFFEFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) #define S_0000F0_SOFT_RESET_GA(x) (((x) & 0x1) << 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) #define G_0000F0_SOFT_RESET_GA(x) (((x) >> 13) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) #define C_0000F0_SOFT_RESET_GA 0xFFFFDFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) #define S_0000F0_SOFT_RESET_IDCT(x) (((x) & 0x1) << 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) #define G_0000F0_SOFT_RESET_IDCT(x) (((x) >> 14) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) #define C_0000F0_SOFT_RESET_IDCT 0xFFFFBFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) #define R_00000D_SCLK_CNTL 0x00000D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) #define S_00000D_SCLK_SRC_SEL(x) (((x) & 0x7) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) #define G_00000D_SCLK_SRC_SEL(x) (((x) >> 0) & 0x7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) #define C_00000D_SCLK_SRC_SEL 0xFFFFFFF8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) #define S_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) #define G_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) >> 3) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) #define C_00000D_CP_MAX_DYN_STOP_LAT 0xFFFFFFF7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) #define S_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) #define G_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) >> 4) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) #define C_00000D_HDP_MAX_DYN_STOP_LAT 0xFFFFFFEF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) #define S_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) #define G_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) >> 5) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) #define C_00000D_TV_MAX_DYN_STOP_LAT 0xFFFFFFDF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) #define S_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) #define G_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) >> 6) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) #define C_00000D_E2_MAX_DYN_STOP_LAT 0xFFFFFFBF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) #define S_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) #define G_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) >> 7) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) #define C_00000D_SE_MAX_DYN_STOP_LAT 0xFFFFFF7F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) #define S_00000D_IDCT_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) #define G_00000D_IDCT_MAX_DYN_STOP_LAT(x) (((x) >> 8) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) #define C_00000D_IDCT_MAX_DYN_STOP_LAT 0xFFFFFEFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) #define S_00000D_VIP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) #define G_00000D_VIP_MAX_DYN_STOP_LAT(x) (((x) >> 9) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) #define C_00000D_VIP_MAX_DYN_STOP_LAT 0xFFFFFDFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) #define S_00000D_RE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) #define G_00000D_RE_MAX_DYN_STOP_LAT(x) (((x) >> 10) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) #define C_00000D_RE_MAX_DYN_STOP_LAT 0xFFFFFBFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) #define S_00000D_PB_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) #define G_00000D_PB_MAX_DYN_STOP_LAT(x) (((x) >> 11) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) #define C_00000D_PB_MAX_DYN_STOP_LAT 0xFFFFF7FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) #define S_00000D_TAM_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) #define G_00000D_TAM_MAX_DYN_STOP_LAT(x) (((x) >> 12) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) #define C_00000D_TAM_MAX_DYN_STOP_LAT 0xFFFFEFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) #define S_00000D_TDM_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) #define G_00000D_TDM_MAX_DYN_STOP_LAT(x) (((x) >> 13) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) #define C_00000D_TDM_MAX_DYN_STOP_LAT 0xFFFFDFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) #define S_00000D_RB_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) #define G_00000D_RB_MAX_DYN_STOP_LAT(x) (((x) >> 14) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) #define C_00000D_RB_MAX_DYN_STOP_LAT 0xFFFFBFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) #define S_00000D_FORCE_DISP2(x) (((x) & 0x1) << 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) #define G_00000D_FORCE_DISP2(x) (((x) >> 15) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) #define C_00000D_FORCE_DISP2 0xFFFF7FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) #define S_00000D_FORCE_CP(x) (((x) & 0x1) << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) #define G_00000D_FORCE_CP(x) (((x) >> 16) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) #define C_00000D_FORCE_CP 0xFFFEFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) #define S_00000D_FORCE_HDP(x) (((x) & 0x1) << 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) #define G_00000D_FORCE_HDP(x) (((x) >> 17) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) #define C_00000D_FORCE_HDP 0xFFFDFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) #define S_00000D_FORCE_DISP1(x) (((x) & 0x1) << 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) #define G_00000D_FORCE_DISP1(x) (((x) >> 18) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) #define C_00000D_FORCE_DISP1 0xFFFBFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) #define S_00000D_FORCE_TOP(x) (((x) & 0x1) << 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) #define G_00000D_FORCE_TOP(x) (((x) >> 19) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) #define C_00000D_FORCE_TOP 0xFFF7FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) #define S_00000D_FORCE_E2(x) (((x) & 0x1) << 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) #define G_00000D_FORCE_E2(x) (((x) >> 20) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) #define C_00000D_FORCE_E2 0xFFEFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) #define S_00000D_FORCE_SE(x) (((x) & 0x1) << 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) #define G_00000D_FORCE_SE(x) (((x) >> 21) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) #define C_00000D_FORCE_SE 0xFFDFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) #define S_00000D_FORCE_IDCT(x) (((x) & 0x1) << 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) #define G_00000D_FORCE_IDCT(x) (((x) >> 22) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) #define C_00000D_FORCE_IDCT 0xFFBFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) #define S_00000D_FORCE_VIP(x) (((x) & 0x1) << 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) #define G_00000D_FORCE_VIP(x) (((x) >> 23) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) #define C_00000D_FORCE_VIP 0xFF7FFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) #define S_00000D_FORCE_RE(x) (((x) & 0x1) << 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) #define G_00000D_FORCE_RE(x) (((x) >> 24) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) #define C_00000D_FORCE_RE 0xFEFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) #define S_00000D_FORCE_PB(x) (((x) & 0x1) << 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) #define G_00000D_FORCE_PB(x) (((x) >> 25) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) #define C_00000D_FORCE_PB 0xFDFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) #define S_00000D_FORCE_TAM(x) (((x) & 0x1) << 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) #define G_00000D_FORCE_TAM(x) (((x) >> 26) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) #define C_00000D_FORCE_TAM 0xFBFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) #define S_00000D_FORCE_TDM(x) (((x) & 0x1) << 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) #define G_00000D_FORCE_TDM(x) (((x) >> 27) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) #define C_00000D_FORCE_TDM 0xF7FFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) #define S_00000D_FORCE_RB(x) (((x) & 0x1) << 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) #define G_00000D_FORCE_RB(x) (((x) >> 28) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) #define C_00000D_FORCE_RB 0xEFFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) #define S_00000D_FORCE_TV_SCLK(x) (((x) & 0x1) << 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) #define G_00000D_FORCE_TV_SCLK(x) (((x) >> 29) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) #define C_00000D_FORCE_TV_SCLK 0xDFFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) #define S_00000D_FORCE_SUBPIC(x) (((x) & 0x1) << 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) #define G_00000D_FORCE_SUBPIC(x) (((x) >> 30) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) #define C_00000D_FORCE_SUBPIC 0xBFFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) #define S_00000D_FORCE_OV0(x) (((x) & 0x1) << 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) #define G_00000D_FORCE_OV0(x) (((x) >> 31) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) #define C_00000D_FORCE_OV0 0x7FFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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